drm/amd/amdgpu: Widen mmio trace register address width
Support wider address spaces, make it 32-bit so we don't have to revisit this for a while. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -24,7 +24,7 @@ TRACE_EVENT(amdgpu_mm_rreg,
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__entry->reg = reg;
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__entry->value = value;
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),
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TP_printk("0x%04lx, 0x%04lx, 0x%08lx",
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TP_printk("0x%04lx, 0x%08lx, 0x%08lx",
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(unsigned long)__entry->did,
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(unsigned long)__entry->reg,
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(unsigned long)__entry->value)
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@ -43,7 +43,7 @@ TRACE_EVENT(amdgpu_mm_wreg,
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__entry->reg = reg;
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__entry->value = value;
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),
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TP_printk("0x%04lx, 0x%04lx, 0x%08lx",
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TP_printk("0x%04lx, 0x%08lx, 0x%08lx",
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(unsigned long)__entry->did,
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(unsigned long)__entry->reg,
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(unsigned long)__entry->value)
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