gpio: Implement tighter IRQ chip integration
Currently GPIO drivers are required to add the GPIO chip and its corresponding IRQ chip separately, which can result in a lot of boilerplate. Use the newly introduced struct gpio_irq_chip, embedded in struct gpio_chip, that drivers can fill in if they want the GPIO core to automatically register the IRQ chip associated with a GPIO chip. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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ca9df053fb
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@ -72,6 +72,7 @@ static LIST_HEAD(gpio_lookup_list);
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LIST_HEAD(gpio_devices);
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static void gpiochip_free_hogs(struct gpio_chip *chip);
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static int gpiochip_add_irqchip(struct gpio_chip *gpiochip);
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static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip);
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static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip);
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static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip);
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@ -1266,6 +1267,10 @@ int gpiochip_add_data(struct gpio_chip *chip, void *data)
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if (status)
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goto err_remove_from_list;
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status = gpiochip_add_irqchip(chip);
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if (status)
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goto err_remove_chip;
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status = of_gpiochip_add(chip);
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if (status)
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goto err_remove_chip;
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@ -1637,6 +1642,7 @@ static int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hwirq)
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{
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struct gpio_chip *chip = d->host_data;
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int err = 0;
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if (!gpiochip_irqchip_irq_valid(chip, hwirq))
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return -ENXIO;
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@ -1653,6 +1659,14 @@ static int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
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irq_set_nested_thread(irq, 1);
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irq_set_noprobe(irq);
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if (chip->irq.num_parents == 1)
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err = irq_set_parent(irq, chip->irq.parents[0]);
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else if (chip->irq.map)
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err = irq_set_parent(irq, chip->irq.map[hwirq]);
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if (err < 0)
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return err;
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/*
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* No set-up of the hardware will happen if IRQ_TYPE_NONE
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* is passed as default type.
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@ -1709,9 +1723,96 @@ static int gpiochip_to_irq(struct gpio_chip *chip, unsigned offset)
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{
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if (!gpiochip_irqchip_irq_valid(chip, offset))
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return -ENXIO;
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return irq_create_mapping(chip->irq.domain, offset);
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}
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/**
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* gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
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* @gpiochip: the GPIO chip to add the IRQ chip to
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*/
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static int gpiochip_add_irqchip(struct gpio_chip *gpiochip)
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{
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struct irq_chip *irqchip = gpiochip->irq.chip;
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const struct irq_domain_ops *ops;
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struct device_node *np;
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unsigned int type;
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unsigned int i;
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if (!irqchip)
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return 0;
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if (gpiochip->irq.parent_handler && gpiochip->can_sleep) {
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chip_err(gpiochip, "you cannot have chained interrupts on a "
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"chip that may sleep\n");
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return -EINVAL;
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}
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np = gpiochip->gpiodev->dev.of_node;
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type = gpiochip->irq.default_type;
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/*
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* Specifying a default trigger is a terrible idea if DT or ACPI is
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* used to configure the interrupts, as you may end up with
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* conflicting triggers. Tell the user, and reset to NONE.
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*/
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if (WARN(np && type != IRQ_TYPE_NONE,
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"%s: Ignoring %u default trigger\n", np->full_name, type))
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type = IRQ_TYPE_NONE;
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if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) {
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acpi_handle_warn(ACPI_HANDLE(gpiochip->parent),
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"Ignoring %u default trigger\n", type);
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type = IRQ_TYPE_NONE;
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}
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gpiochip->to_irq = gpiochip_to_irq;
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gpiochip->irq.default_type = type;
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if (gpiochip->irq.domain_ops)
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ops = gpiochip->irq.domain_ops;
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else
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ops = &gpiochip_domain_ops;
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gpiochip->irq.domain = irq_domain_add_simple(np, gpiochip->ngpio,
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0, ops, gpiochip);
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if (!gpiochip->irq.domain)
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return -EINVAL;
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/*
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* It is possible for a driver to override this, but only if the
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* alternative functions are both implemented.
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*/
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if (!irqchip->irq_request_resources &&
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!irqchip->irq_release_resources) {
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irqchip->irq_request_resources = gpiochip_irq_reqres;
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irqchip->irq_release_resources = gpiochip_irq_relres;
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}
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if (gpiochip->irq.parent_handler) {
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void *data = gpiochip->irq.parent_handler_data ?: gpiochip;
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for (i = 0; i < gpiochip->irq.num_parents; i++) {
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/*
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* The parent IRQ chip is already using the chip_data
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* for this IRQ chip, so our callbacks simply use the
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* handler_data.
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*/
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irq_set_chained_handler_and_data(gpiochip->irq.parents[i],
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gpiochip->irq.parent_handler,
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data);
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}
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gpiochip->irq.nested = false;
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} else {
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gpiochip->irq.nested = true;
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}
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acpi_gpiochip_request_interrupts(gpiochip);
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return 0;
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}
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/**
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* gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
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* @gpiochip: the gpiochip to remove the irqchip from
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@ -1724,7 +1825,7 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)
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acpi_gpiochip_free_interrupts(gpiochip);
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if (gpiochip->irq.num_parents > 0) {
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if (gpiochip->irq.chip && gpiochip->irq.parent_handler) {
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struct gpio_irq_chip *irq = &gpiochip->irq;
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unsigned int i;
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@ -1857,6 +1958,11 @@ EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_key);
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#else /* CONFIG_GPIOLIB_IRQCHIP */
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static inline int gpiochip_add_irqchip(struct gpio_chip *gpiochip)
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{
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return 0;
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}
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static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) {}
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static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip)
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{
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@ -100,6 +100,13 @@ struct gpio_irq_chip {
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*/
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unsigned int *parents;
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/**
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* @map:
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*
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* A list of interrupt parents for each line of a GPIO chip.
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*/
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unsigned int *map;
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/**
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* @nested:
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*
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