hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

A few MIPS fixes for 4.18: 

- A GPIO device name fix for a regression in v4.15-rc1.
 
   - An errata workaround for the BCM5300X platform.
 
   - A fix to ftrace function graph tracing, broken for a long time with
     the fix applying cleanly back as far as v3.17.
 
   - Addition of read barriers to in{b,w,l,q}() functions, matching
     behavior of other architectures & mirroring the equivalent addition
     to read{b,w,l,q} in v4.17-rc2.
 
 Plus changes to wire up new syscalls introduced in the 4.18 cycle:
 
   - Restartable sequences support is added, including MIPS support in
     the selftests.
 
   - io_pgetevents is wired up.
 -----BEGIN PGP SIGNATURE-----
 
 iIsEABYIADMWIQRgLjeFAZEXQzy86/s+p5+stXUA3QUCWy7dhBUccGF1bC5idXJ0
 b25AbWlwcy5jb20ACgkQPqefrLV1AN3jzAEA9QsaC/W2hsC/P4A49aNem1/LL2i+
 L6ZGhrquwdpGZHoBAIolXlc23LaMkeAVZGkHvgcJkxSnPGs3k1JuUMjP14EE
 =3P+z
 -----END PGP SIGNATURE-----

Merge tag 'mips_fixes_4.18_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS fixes from Paul Burton:
 "A few MIPS fixes for 4.18:

   - a GPIO device name fix for a regression in v4.15-rc1.

   - an errata workaround for the BCM5300X platform.

   - a fix to ftrace function graph tracing, broken for a long time with
     the fix applying cleanly back as far as v3.17.

   - addition of read barriers to in{b,w,l,q}() functions, matching
     behavior of other architectures & mirroring the equivalent addition
     to read{b,w,l,q} in v4.17-rc2.

  Plus changes to wire up new syscalls introduced in the 4.18 cycle:

   - Restartable sequences support is added, including MIPS support in
     the selftests.

   - io_pgetevents is wired up"

* tag 'mips_fixes_4.18_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
  MIPS: Wire up io_pgetevents syscall
  rseq/selftests: Implement MIPS support
  MIPS: Wire up the restartable sequences (rseq) syscall
  MIPS: Add syscall detection for restartable sequences
  MIPS: Add support for restartable sequences
  MIPS: io: Add barrier after register read in inX()
  mips: ftrace: fix static function graph tracing
  MIPS: BCM47XX: Enable 74K Core ExternalSync for PCIe erratum
  MIPS: pb44: Fix i2c-gpio GPIO descriptor table
This commit is contained in:
Linus Torvalds 2018-06-24 17:19:42 +08:00
parent 77072ca59f 4337aac1e1
commit e0bc833d10
16 changed files with 807 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/mips/Kconfig
View File

@ -65,6 +65,7 @@ config MIPS
select HAVE_OPROFILE
select HAVE_PERF_EVENTS
select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_RSEQ
select HAVE_STACKPROTECTOR
select HAVE_SYSCALL_TRACEPOINTS
select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP

2
arch/mips/ath79/mach-pb44.c
View File

@ -34,7 +34,7 @@
#define PB44_KEYS_DEBOUNCE_INTERVAL (3 * PB44_KEYS_POLL_INTERVAL)
static struct gpiod_lookup_table pb44_i2c_gpiod_table = {
.dev_id = "i2c-gpio",
.dev_id = "i2c-gpio.0",
.table = {
GPIO_LOOKUP_IDX("ath79-gpio", PB44_GPIO_I2C_SDA,
NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),

6
arch/mips/bcm47xx/setup.c
View File

@ -212,6 +212,12 @@ static int __init bcm47xx_cpu_fixes(void)
*/
if (bcm47xx_bus.bcma.bus.chipinfo.id == BCMA_CHIP_ID_BCM4706)
cpu_wait = NULL;
/*
* BCM47XX Erratum "R10: PCIe Transactions Periodically Fail"
* Enable ExternalSync for sync instruction to take effect
*/
set_c0_config7(MIPS_CONF7_ES);
break;
#endif
}

2
arch/mips/include/asm/io.h
View File

@ -414,6 +414,8 @@ static inline type pfx##in##bwlq##p(unsigned long port) \
__val = *__addr; \
slow; \
\
/* prevent prefetching of coherent DMA data prematurely */ \
rmb(); \
return pfx##ioswab##bwlq(__addr, __val); \
}

3
arch/mips/include/asm/mipsregs.h
View File

@ -681,6 +681,8 @@
#define MIPS_CONF7_WII (_ULCAST_(1) << 31)
#define MIPS_CONF7_RPS (_ULCAST_(1) << 2)
/* ExternalSync */
#define MIPS_CONF7_ES (_ULCAST_(1) << 8)
#define MIPS_CONF7_IAR (_ULCAST_(1) << 10)
#define MIPS_CONF7_AR (_ULCAST_(1) << 16)
@ -2765,6 +2767,7 @@ __BUILD_SET_C0(status)
__BUILD_SET_C0(cause)
__BUILD_SET_C0(config)
__BUILD_SET_C0(config5)
__BUILD_SET_C0(config7)
__BUILD_SET_C0(intcontrol)
__BUILD_SET_C0(intctl)
__BUILD_SET_C0(srsmap)

18
arch/mips/include/uapi/asm/unistd.h
View File

@ -388,17 +388,19 @@
#define __NR_pkey_alloc (__NR_Linux + 364)
#define __NR_pkey_free (__NR_Linux + 365)
#define __NR_statx (__NR_Linux + 366)
#define __NR_rseq (__NR_Linux + 367)
#define __NR_io_pgetevents (__NR_Linux + 368)
/*
* Offset of the last Linux o32 flavoured syscall
*/
#define __NR_Linux_syscalls 366
#define __NR_Linux_syscalls 368
#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
#define __NR_O32_Linux 4000
#define __NR_O32_Linux_syscalls 366
#define __NR_O32_Linux_syscalls 368
#if _MIPS_SIM == _MIPS_SIM_ABI64
@ -733,16 +735,18 @@
#define __NR_pkey_alloc (__NR_Linux + 324)
#define __NR_pkey_free (__NR_Linux + 325)
#define __NR_statx (__NR_Linux + 326)
#define __NR_rseq (__NR_Linux + 327)
#define __NR_io_pgetevents (__NR_Linux + 328)
/*
* Offset of the last Linux 64-bit flavoured syscall
*/
#define __NR_Linux_syscalls 326
#define __NR_Linux_syscalls 328
#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
#define __NR_64_Linux 5000
#define __NR_64_Linux_syscalls 326
#define __NR_64_Linux_syscalls 328
#if _MIPS_SIM == _MIPS_SIM_NABI32
@ -1081,15 +1085,17 @@
#define __NR_pkey_alloc (__NR_Linux + 328)
#define __NR_pkey_free (__NR_Linux + 329)
#define __NR_statx (__NR_Linux + 330)
#define __NR_rseq (__NR_Linux + 331)
#define __NR_io_pgetevents (__NR_Linux + 332)
/*
* Offset of the last N32 flavoured syscall
*/
#define __NR_Linux_syscalls 330
#define __NR_Linux_syscalls 332
#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
#define __NR_N32_Linux 6000
#define __NR_N32_Linux_syscalls 330
#define __NR_N32_Linux_syscalls 332
#endif /* _UAPI_ASM_UNISTD_H */

8
arch/mips/kernel/entry.S
View File

@ -79,6 +79,10 @@ FEXPORT(ret_from_fork)
jal schedule_tail # a0 = struct task_struct *prev
FEXPORT(syscall_exit)
#ifdef CONFIG_DEBUG_RSEQ
move a0, sp
jal rseq_syscall
#endif
local_irq_disable # make sure need_resched and
# signals dont change between
# sampling and return
@ -141,6 +145,10 @@ work_notifysig: # deal with pending signals and
j resume_userspace_check
FEXPORT(syscall_exit_partial)
#ifdef CONFIG_DEBUG_RSEQ
move a0, sp
jal rseq_syscall
#endif
local_irq_disable # make sure need_resched doesn't
# change between and return
LONG_L a2, TI_FLAGS($28) # current->work

27
arch/mips/kernel/mcount.S
View File

@ -119,10 +119,20 @@ NESTED(_mcount, PT_SIZE, ra)
EXPORT_SYMBOL(_mcount)
PTR_LA t1, ftrace_stub
PTR_L t2, ftrace_trace_function /* Prepare t2 for (1) */
bne t1, t2, static_trace
beq t1, t2, fgraph_trace
nop
MCOUNT_SAVE_REGS
move a0, ra /* arg1: self return address */
jalr t2 /* (1) call *ftrace_trace_function */
move a1, AT /* arg2: parent's return address */
MCOUNT_RESTORE_REGS
fgraph_trace:
#ifdef CONFIG_FUNCTION_GRAPH_TRACER
PTR_LA t1, ftrace_stub
PTR_L t3, ftrace_graph_return
bne t1, t3, ftrace_graph_caller
nop
@ -131,24 +141,11 @@ EXPORT_SYMBOL(_mcount)
bne t1, t3, ftrace_graph_caller
nop
#endif
b ftrace_stub
#ifdef CONFIG_32BIT
addiu sp, sp, 8
#else
nop
#endif
static_trace:
MCOUNT_SAVE_REGS
move a0, ra /* arg1: self return address */
jalr t2 /* (1) call *ftrace_trace_function */
move a1, AT /* arg2: parent's return address */
MCOUNT_RESTORE_REGS
#ifdef CONFIG_32BIT
addiu sp, sp, 8
#endif
.globl ftrace_stub
ftrace_stub:
RETURN_BACK

2
arch/mips/kernel/scall32-o32.S
View File

@ -590,3 +590,5 @@ EXPORT(sys_call_table)
PTR sys_pkey_alloc
PTR sys_pkey_free /* 4365 */
PTR sys_statx
PTR sys_rseq
PTR sys_io_pgetevents

2
arch/mips/kernel/scall64-64.S
View File

@ -439,4 +439,6 @@ EXPORT(sys_call_table)
PTR sys_pkey_alloc
PTR sys_pkey_free /* 5325 */
PTR sys_statx
PTR sys_rseq
PTR sys_io_pgetevents
.size sys_call_table,.-sys_call_table

2
arch/mips/kernel/scall64-n32.S
View File

@ -434,4 +434,6 @@ EXPORT(sysn32_call_table)
PTR sys_pkey_alloc
PTR sys_pkey_free
PTR sys_statx /* 6330 */
PTR sys_rseq
PTR compat_sys_io_pgetevents
.size sysn32_call_table,.-sysn32_call_table

2
arch/mips/kernel/scall64-o32.S
View File

@ -583,4 +583,6 @@ EXPORT(sys32_call_table)
PTR sys_pkey_alloc
PTR sys_pkey_free /* 4365 */
PTR sys_statx
PTR sys_rseq
PTR compat_sys_io_pgetevents
.size sys32_call_table,.-sys32_call_table

3
arch/mips/kernel/signal.c
View File

@ -801,6 +801,8 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs)
regs->regs[0] = 0; /* Don't deal with this again. */
}
rseq_signal_deliver(regs);
if (sig_uses_siginfo(&ksig->ka, abi))
ret = abi->setup_rt_frame(vdso + abi->vdso->off_rt_sigreturn,
ksig, regs, oldset);
@ -868,6 +870,7 @@ asmlinkage void do_notify_resume(struct pt_regs *regs, void *unused,
if (thread_info_flags & _TIF_NOTIFY_RESUME) {
clear_thread_flag(TIF_NOTIFY_RESUME);
tracehook_notify_resume(regs);
rseq_handle_notify_resume(regs);
}
user_enter();

24
tools/testing/selftests/rseq/param_test.c
View File

@ -137,6 +137,30 @@ unsigned int yield_mod_cnt, nr_abort;
"subic. %%" INJECT_ASM_REG ", %%" INJECT_ASM_REG ", 1\n\t" \
"bne 222b\n\t" \
"333:\n\t"
#elif defined(__mips__)
#define RSEQ_INJECT_INPUT \
, [loop_cnt_1]"m"(loop_cnt[1]) \
, [loop_cnt_2]"m"(loop_cnt[2]) \
, [loop_cnt_3]"m"(loop_cnt[3]) \
, [loop_cnt_4]"m"(loop_cnt[4]) \
, [loop_cnt_5]"m"(loop_cnt[5]) \
, [loop_cnt_6]"m"(loop_cnt[6])
#define INJECT_ASM_REG "$5"
#define RSEQ_INJECT_CLOBBER \
, INJECT_ASM_REG
#define RSEQ_INJECT_ASM(n) \
"lw " INJECT_ASM_REG ", %[loop_cnt_" #n "]\n\t" \
"beqz " INJECT_ASM_REG ", 333f\n\t" \
"222:\n\t" \
"addiu " INJECT_ASM_REG ", -1\n\t" \
"bnez " INJECT_ASM_REG ", 222b\n\t" \
"333:\n\t"
#else
#error unsupported target
#endif

725
tools/testing/selftests/rseq/rseq-mips.h Normal file
View File

@ -0,0 +1,725 @@
/* SPDX-License-Identifier: LGPL-2.1 OR MIT */
/*
* Author: Paul Burton <paul.burton@mips.com>
* (C) Copyright 2018 MIPS Tech LLC
*
* Based on rseq-arm.h:
* (C) Copyright 2016-2018 - Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
*/
#define RSEQ_SIG 0x53053053
#define rseq_smp_mb() __asm__ __volatile__ ("sync" ::: "memory")
#define rseq_smp_rmb() rseq_smp_mb()
#define rseq_smp_wmb() rseq_smp_mb()
#define rseq_smp_load_acquire(p) \
__extension__ ({ \
__typeof(*p) ____p1 = RSEQ_READ_ONCE(*p); \
rseq_smp_mb(); \
____p1; \
})
#define rseq_smp_acquire__after_ctrl_dep() rseq_smp_rmb()
#define rseq_smp_store_release(p, v) \
do { \
rseq_smp_mb(); \
RSEQ_WRITE_ONCE(*p, v); \
} while (0)
#ifdef RSEQ_SKIP_FASTPATH
#include "rseq-skip.h"
#else /* !RSEQ_SKIP_FASTPATH */
#if _MIPS_SZLONG == 64
# define LONG ".dword"
# define LONG_LA "dla"
# define LONG_L "ld"
# define LONG_S "sd"
# define LONG_ADDI "daddiu"
# define U32_U64_PAD(x) x
#elif _MIPS_SZLONG == 32
# define LONG ".word"
# define LONG_LA "la"
# define LONG_L "lw"
# define LONG_S "sw"
# define LONG_ADDI "addiu"
# ifdef __BIG_ENDIAN
# define U32_U64_PAD(x) "0x0, " x
# else
# define U32_U64_PAD(x) x ", 0x0"
# endif
#else
# error unsupported _MIPS_SZLONG
#endif
#define __RSEQ_ASM_DEFINE_TABLE(version, flags, start_ip, \
post_commit_offset, abort_ip) \
".pushsection __rseq_table, \"aw\"\n\t" \
".balign 32\n\t" \
".word " __rseq_str(version) ", " __rseq_str(flags) "\n\t" \
LONG " " U32_U64_PAD(__rseq_str(start_ip)) "\n\t" \
LONG " " U32_U64_PAD(__rseq_str(post_commit_offset)) "\n\t" \
LONG " " U32_U64_PAD(__rseq_str(abort_ip)) "\n\t" \
".popsection\n\t"
#define RSEQ_ASM_DEFINE_TABLE(start_ip, post_commit_ip, abort_ip) \
__RSEQ_ASM_DEFINE_TABLE(0x0, 0x0, start_ip, \
(post_commit_ip - start_ip), abort_ip)
#define RSEQ_ASM_STORE_RSEQ_CS(label, cs_label, rseq_cs) \
RSEQ_INJECT_ASM(1) \
LONG_LA " $4, " __rseq_str(cs_label) "\n\t" \
LONG_S " $4, %[" __rseq_str(rseq_cs) "]\n\t" \
__rseq_str(label) ":\n\t"
#define RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, label) \
RSEQ_INJECT_ASM(2) \
"lw $4, %[" __rseq_str(current_cpu_id) "]\n\t" \
"bne $4, %[" __rseq_str(cpu_id) "], " __rseq_str(label) "\n\t"
#define __RSEQ_ASM_DEFINE_ABORT(table_label, label, teardown, \
abort_label, version, flags, \
start_ip, post_commit_offset, abort_ip) \
".balign 32\n\t" \
__rseq_str(table_label) ":\n\t" \
".word " __rseq_str(version) ", " __rseq_str(flags) "\n\t" \
LONG " " U32_U64_PAD(__rseq_str(start_ip)) "\n\t" \
LONG " " U32_U64_PAD(__rseq_str(post_commit_offset)) "\n\t" \
LONG " " U32_U64_PAD(__rseq_str(abort_ip)) "\n\t" \
".word " __rseq_str(RSEQ_SIG) "\n\t" \
__rseq_str(label) ":\n\t" \
teardown \
"b %l[" __rseq_str(abort_label) "]\n\t"
#define RSEQ_ASM_DEFINE_ABORT(table_label, label, teardown, abort_label, \
start_ip, post_commit_ip, abort_ip) \
__RSEQ_ASM_DEFINE_ABORT(table_label, label, teardown, \
abort_label, 0x0, 0x0, start_ip, \
(post_commit_ip - start_ip), abort_ip)
#define RSEQ_ASM_DEFINE_CMPFAIL(label, teardown, cmpfail_label) \
__rseq_str(label) ":\n\t" \
teardown \
"b %l[" __rseq_str(cmpfail_label) "]\n\t"
#define rseq_workaround_gcc_asm_size_guess() __asm__ __volatile__("")
static inline __attribute__((always_inline))
int rseq_cmpeqv_storev(intptr_t *v, intptr_t expect, intptr_t newv, int cpu)
{
RSEQ_INJECT_C(9)
rseq_workaround_gcc_asm_size_guess();
__asm__ __volatile__ goto (
RSEQ_ASM_DEFINE_TABLE(1f, 2f, 4f) /* start, commit, abort */
/* Start rseq by storing table entry pointer into rseq_cs. */
RSEQ_ASM_STORE_RSEQ_CS(1, 3f, rseq_cs)
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f)
RSEQ_INJECT_ASM(3)
LONG_L " $4, %[v]\n\t"
"bne $4, %[expect], %l[cmpfail]\n\t"
RSEQ_INJECT_ASM(4)
#ifdef RSEQ_COMPARE_TWICE
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1])
LONG_L " $4, %[v]\n\t"
"bne $4, %[expect], %l[error2]\n\t"
#endif
/* final store */
LONG_S " %[newv], %[v]\n\t"
"2:\n\t"
RSEQ_INJECT_ASM(5)
"b 5f\n\t"
RSEQ_ASM_DEFINE_ABORT(3, 4, "", abort, 1b, 2b, 4f)
"5:\n\t"
: /* gcc asm goto does not allow outputs */
: [cpu_id] "r" (cpu),
[current_cpu_id] "m" (__rseq_abi.cpu_id),
[rseq_cs] "m" (__rseq_abi.rseq_cs),
[v] "m" (*v),
[expect] "r" (expect),
[newv] "r" (newv)
RSEQ_INJECT_INPUT
: "$4", "memory"
RSEQ_INJECT_CLOBBER
: abort, cmpfail
#ifdef RSEQ_COMPARE_TWICE
, error1, error2
#endif
);
rseq_workaround_gcc_asm_size_guess();
return 0;
abort:
rseq_workaround_gcc_asm_size_guess();
RSEQ_INJECT_FAILED
return -1;
cmpfail:
rseq_workaround_gcc_asm_size_guess();
return 1;
#ifdef RSEQ_COMPARE_TWICE
error1:
rseq_bug("cpu_id comparison failed");
error2:
rseq_bug("expected value comparison failed");
#endif
}
static inline __attribute__((always_inline))
int rseq_cmpnev_storeoffp_load(intptr_t *v, intptr_t expectnot,
off_t voffp, intptr_t *load, int cpu)
{
RSEQ_INJECT_C(9)
rseq_workaround_gcc_asm_size_guess();
__asm__ __volatile__ goto (
RSEQ_ASM_DEFINE_TABLE(1f, 2f, 4f) /* start, commit, abort */
/* Start rseq by storing table entry pointer into rseq_cs. */
RSEQ_ASM_STORE_RSEQ_CS(1, 3f, rseq_cs)
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f)
RSEQ_INJECT_ASM(3)
LONG_L " $4, %[v]\n\t"
"beq $4, %[expectnot], %l[cmpfail]\n\t"
RSEQ_INJECT_ASM(4)
#ifdef RSEQ_COMPARE_TWICE
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1])
LONG_L " $4, %[v]\n\t"
"beq $4, %[expectnot], %l[error2]\n\t"
#endif
LONG_S " $4, %[load]\n\t"
LONG_ADDI " $4, %[voffp]\n\t"
LONG_L " $4, 0($4)\n\t"
/* final store */
LONG_S " $4, %[v]\n\t"
"2:\n\t"
RSEQ_INJECT_ASM(5)
"b 5f\n\t"
RSEQ_ASM_DEFINE_ABORT(3, 4, "", abort, 1b, 2b, 4f)
"5:\n\t"
: /* gcc asm goto does not allow outputs */
: [cpu_id] "r" (cpu),
[current_cpu_id] "m" (__rseq_abi.cpu_id),
[rseq_cs] "m" (__rseq_abi.rseq_cs),
/* final store input */
[v] "m" (*v),
[expectnot] "r" (expectnot),
[voffp] "Ir" (voffp),
[load] "m" (*load)
RSEQ_INJECT_INPUT
: "$4", "memory"
RSEQ_INJECT_CLOBBER
: abort, cmpfail
#ifdef RSEQ_COMPARE_TWICE
, error1, error2
#endif
);
rseq_workaround_gcc_asm_size_guess();
return 0;
abort:
rseq_workaround_gcc_asm_size_guess();
RSEQ_INJECT_FAILED
return -1;
cmpfail:
rseq_workaround_gcc_asm_size_guess();
return 1;
#ifdef RSEQ_COMPARE_TWICE
error1:
rseq_bug("cpu_id comparison failed");
error2:
rseq_bug("expected value comparison failed");
#endif
}
static inline __attribute__((always_inline))
int rseq_addv(intptr_t *v, intptr_t count, int cpu)
{
RSEQ_INJECT_C(9)
rseq_workaround_gcc_asm_size_guess();
__asm__ __volatile__ goto (
RSEQ_ASM_DEFINE_TABLE(1f, 2f, 4f) /* start, commit, abort */
/* Start rseq by storing table entry pointer into rseq_cs. */
RSEQ_ASM_STORE_RSEQ_CS(1, 3f, rseq_cs)
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f)
RSEQ_INJECT_ASM(3)
#ifdef RSEQ_COMPARE_TWICE
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1])
#endif
LONG_L " $4, %[v]\n\t"
LONG_ADDI " $4, %[count]\n\t"
/* final store */
LONG_S " $4, %[v]\n\t"
"2:\n\t"
RSEQ_INJECT_ASM(4)
"b 5f\n\t"
RSEQ_ASM_DEFINE_ABORT(3, 4, "", abort, 1b, 2b, 4f)
"5:\n\t"
: /* gcc asm goto does not allow outputs */
: [cpu_id] "r" (cpu),
[current_cpu_id] "m" (__rseq_abi.cpu_id),
[rseq_cs] "m" (__rseq_abi.rseq_cs),
[v] "m" (*v),
[count] "Ir" (count)
RSEQ_INJECT_INPUT
: "$4", "memory"
RSEQ_INJECT_CLOBBER
: abort
#ifdef RSEQ_COMPARE_TWICE
, error1
#endif
);
rseq_workaround_gcc_asm_size_guess();
return 0;
abort:
rseq_workaround_gcc_asm_size_guess();
RSEQ_INJECT_FAILED
return -1;
#ifdef RSEQ_COMPARE_TWICE
error1:
rseq_bug("cpu_id comparison failed");
#endif
}
static inline __attribute__((always_inline))
int rseq_cmpeqv_trystorev_storev(intptr_t *v, intptr_t expect,
intptr_t *v2, intptr_t newv2,
intptr_t newv, int cpu)
{
RSEQ_INJECT_C(9)
rseq_workaround_gcc_asm_size_guess();
__asm__ __volatile__ goto (
RSEQ_ASM_DEFINE_TABLE(1f, 2f, 4f) /* start, commit, abort */
/* Start rseq by storing table entry pointer into rseq_cs. */
RSEQ_ASM_STORE_RSEQ_CS(1, 3f, rseq_cs)
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f)
RSEQ_INJECT_ASM(3)
LONG_L " $4, %[v]\n\t"
"bne $4, %[expect], %l[cmpfail]\n\t"
RSEQ_INJECT_ASM(4)
#ifdef RSEQ_COMPARE_TWICE
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1])
LONG_L " $4, %[v]\n\t"
"bne $4, %[expect], %l[error2]\n\t"
#endif
/* try store */
LONG_S " %[newv2], %[v2]\n\t"
RSEQ_INJECT_ASM(5)
/* final store */
LONG_S " %[newv], %[v]\n\t"
"2:\n\t"
RSEQ_INJECT_ASM(6)
"b 5f\n\t"
RSEQ_ASM_DEFINE_ABORT(3, 4, "", abort, 1b, 2b, 4f)
"5:\n\t"
: /* gcc asm goto does not allow outputs */
: [cpu_id] "r" (cpu),
[current_cpu_id] "m" (__rseq_abi.cpu_id),
[rseq_cs] "m" (__rseq_abi.rseq_cs),
/* try store input */
[v2] "m" (*v2),
[newv2] "r" (newv2),
/* final store input */
[v] "m" (*v),
[expect] "r" (expect),
[newv] "r" (newv)
RSEQ_INJECT_INPUT
: "$4", "memory"
RSEQ_INJECT_CLOBBER
: abort, cmpfail
#ifdef RSEQ_COMPARE_TWICE
, error1, error2
#endif
);
rseq_workaround_gcc_asm_size_guess();
return 0;
abort:
rseq_workaround_gcc_asm_size_guess();
RSEQ_INJECT_FAILED
return -1;
cmpfail:
rseq_workaround_gcc_asm_size_guess();
return 1;
#ifdef RSEQ_COMPARE_TWICE
error1:
rseq_bug("cpu_id comparison failed");
error2:
rseq_bug("expected value comparison failed");
#endif
}
static inline __attribute__((always_inline))
int rseq_cmpeqv_trystorev_storev_release(intptr_t *v, intptr_t expect,
intptr_t *v2, intptr_t newv2,
intptr_t newv, int cpu)
{
RSEQ_INJECT_C(9)
rseq_workaround_gcc_asm_size_guess();
__asm__ __volatile__ goto (
RSEQ_ASM_DEFINE_TABLE(1f, 2f, 4f) /* start, commit, abort */
/* Start rseq by storing table entry pointer into rseq_cs. */
RSEQ_ASM_STORE_RSEQ_CS(1, 3f, rseq_cs)
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f)
RSEQ_INJECT_ASM(3)
LONG_L " $4, %[v]\n\t"
"bne $4, %[expect], %l[cmpfail]\n\t"
RSEQ_INJECT_ASM(4)
#ifdef RSEQ_COMPARE_TWICE
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1])
LONG_L " $4, %[v]\n\t"
"bne $4, %[expect], %l[error2]\n\t"
#endif
/* try store */
LONG_S " %[newv2], %[v2]\n\t"
RSEQ_INJECT_ASM(5)
"sync\n\t" /* full sync provides store-release */
/* final store */
LONG_S " %[newv], %[v]\n\t"
"2:\n\t"
RSEQ_INJECT_ASM(6)
"b 5f\n\t"
RSEQ_ASM_DEFINE_ABORT(3, 4, "", abort, 1b, 2b, 4f)
"5:\n\t"
: /* gcc asm goto does not allow outputs */
: [cpu_id] "r" (cpu),
[current_cpu_id] "m" (__rseq_abi.cpu_id),
[rseq_cs] "m" (__rseq_abi.rseq_cs),
/* try store input */
[v2] "m" (*v2),
[newv2] "r" (newv2),
/* final store input */
[v] "m" (*v),
[expect] "r" (expect),
[newv] "r" (newv)
RSEQ_INJECT_INPUT
: "$4", "memory"
RSEQ_INJECT_CLOBBER
: abort, cmpfail
#ifdef RSEQ_COMPARE_TWICE
, error1, error2
#endif
);
rseq_workaround_gcc_asm_size_guess();
return 0;
abort:
rseq_workaround_gcc_asm_size_guess();
RSEQ_INJECT_FAILED
return -1;
cmpfail:
rseq_workaround_gcc_asm_size_guess();
return 1;
#ifdef RSEQ_COMPARE_TWICE
error1:
rseq_bug("cpu_id comparison failed");
error2:
rseq_bug("expected value comparison failed");
#endif
}
static inline __attribute__((always_inline))
int rseq_cmpeqv_cmpeqv_storev(intptr_t *v, intptr_t expect,
intptr_t *v2, intptr_t expect2,
intptr_t newv, int cpu)
{
RSEQ_INJECT_C(9)
rseq_workaround_gcc_asm_size_guess();
__asm__ __volatile__ goto (
RSEQ_ASM_DEFINE_TABLE(1f, 2f, 4f) /* start, commit, abort */
/* Start rseq by storing table entry pointer into rseq_cs. */
RSEQ_ASM_STORE_RSEQ_CS(1, 3f, rseq_cs)
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f)
RSEQ_INJECT_ASM(3)
LONG_L " $4, %[v]\n\t"
"bne $4, %[expect], %l[cmpfail]\n\t"
RSEQ_INJECT_ASM(4)
LONG_L " $4, %[v2]\n\t"
"bne $4, %[expect2], %l[cmpfail]\n\t"
RSEQ_INJECT_ASM(5)
#ifdef RSEQ_COMPARE_TWICE
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1])
LONG_L " $4, %[v]\n\t"
"bne $4, %[expect], %l[error2]\n\t"
LONG_L " $4, %[v2]\n\t"
"bne $4, %[expect2], %l[error3]\n\t"
#endif
/* final store */
LONG_S " %[newv], %[v]\n\t"
"2:\n\t"
RSEQ_INJECT_ASM(6)
"b 5f\n\t"
RSEQ_ASM_DEFINE_ABORT(3, 4, "", abort, 1b, 2b, 4f)
"5:\n\t"
: /* gcc asm goto does not allow outputs */
: [cpu_id] "r" (cpu),
[current_cpu_id] "m" (__rseq_abi.cpu_id),
[rseq_cs] "m" (__rseq_abi.rseq_cs),
/* cmp2 input */
[v2] "m" (*v2),
[expect2] "r" (expect2),
/* final store input */
[v] "m" (*v),
[expect] "r" (expect),
[newv] "r" (newv)
RSEQ_INJECT_INPUT
: "$4", "memory"
RSEQ_INJECT_CLOBBER
: abort, cmpfail
#ifdef RSEQ_COMPARE_TWICE
, error1, error2, error3
#endif
);
rseq_workaround_gcc_asm_size_guess();
return 0;
abort:
rseq_workaround_gcc_asm_size_guess();
RSEQ_INJECT_FAILED
return -1;
cmpfail:
rseq_workaround_gcc_asm_size_guess();
return 1;
#ifdef RSEQ_COMPARE_TWICE
error1:
rseq_bug("cpu_id comparison failed");
error2:
rseq_bug("1st expected value comparison failed");
error3:
rseq_bug("2nd expected value comparison failed");
#endif
}
static inline __attribute__((always_inline))
int rseq_cmpeqv_trymemcpy_storev(intptr_t *v, intptr_t expect,
void *dst, void *src, size_t len,
intptr_t newv, int cpu)
{
uintptr_t rseq_scratch[3];
RSEQ_INJECT_C(9)
rseq_workaround_gcc_asm_size_guess();
__asm__ __volatile__ goto (
RSEQ_ASM_DEFINE_TABLE(1f, 2f, 4f) /* start, commit, abort */
LONG_S " %[src], %[rseq_scratch0]\n\t"
LONG_S " %[dst], %[rseq_scratch1]\n\t"
LONG_S " %[len], %[rseq_scratch2]\n\t"
/* Start rseq by storing table entry pointer into rseq_cs. */
RSEQ_ASM_STORE_RSEQ_CS(1, 3f, rseq_cs)
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f)
RSEQ_INJECT_ASM(3)
LONG_L " $4, %[v]\n\t"
"bne $4, %[expect], 5f\n\t"
RSEQ_INJECT_ASM(4)
#ifdef RSEQ_COMPARE_TWICE
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 6f)
LONG_L " $4, %[v]\n\t"
"bne $4, %[expect], 7f\n\t"
#endif
/* try memcpy */
"beqz %[len], 333f\n\t" \
"222:\n\t" \
"lb $4, 0(%[src])\n\t" \
"sb $4, 0(%[dst])\n\t" \
LONG_ADDI " %[src], 1\n\t" \
LONG_ADDI " %[dst], 1\n\t" \
LONG_ADDI " %[len], -1\n\t" \
"bnez %[len], 222b\n\t" \
"333:\n\t" \
RSEQ_INJECT_ASM(5)
/* final store */
LONG_S " %[newv], %[v]\n\t"
"2:\n\t"
RSEQ_INJECT_ASM(6)
/* teardown */
LONG_L " %[len], %[rseq_scratch2]\n\t"
LONG_L " %[dst], %[rseq_scratch1]\n\t"
LONG_L " %[src], %[rseq_scratch0]\n\t"
"b 8f\n\t"
RSEQ_ASM_DEFINE_ABORT(3, 4,
/* teardown */
LONG_L " %[len], %[rseq_scratch2]\n\t"
LONG_L " %[dst], %[rseq_scratch1]\n\t"
LONG_L " %[src], %[rseq_scratch0]\n\t",
abort, 1b, 2b, 4f)
RSEQ_ASM_DEFINE_CMPFAIL(5,
/* teardown */
LONG_L " %[len], %[rseq_scratch2]\n\t"
LONG_L " %[dst], %[rseq_scratch1]\n\t"
LONG_L " %[src], %[rseq_scratch0]\n\t",
cmpfail)
#ifdef RSEQ_COMPARE_TWICE
RSEQ_ASM_DEFINE_CMPFAIL(6,
/* teardown */
LONG_L " %[len], %[rseq_scratch2]\n\t"
LONG_L " %[dst], %[rseq_scratch1]\n\t"
LONG_L " %[src], %[rseq_scratch0]\n\t",
error1)
RSEQ_ASM_DEFINE_CMPFAIL(7,
/* teardown */
LONG_L " %[len], %[rseq_scratch2]\n\t"
LONG_L " %[dst], %[rseq_scratch1]\n\t"
LONG_L " %[src], %[rseq_scratch0]\n\t",
error2)
#endif
"8:\n\t"
: /* gcc asm goto does not allow outputs */
: [cpu_id] "r" (cpu),
[current_cpu_id] "m" (__rseq_abi.cpu_id),
[rseq_cs] "m" (__rseq_abi.rseq_cs),
/* final store input */
[v] "m" (*v),
[expect] "r" (expect),
[newv] "r" (newv),
/* try memcpy input */
[dst] "r" (dst),
[src] "r" (src),
[len] "r" (len),
[rseq_scratch0] "m" (rseq_scratch[0]),
[rseq_scratch1] "m" (rseq_scratch[1]),
[rseq_scratch2] "m" (rseq_scratch[2])
RSEQ_INJECT_INPUT
: "$4", "memory"
RSEQ_INJECT_CLOBBER
: abort, cmpfail
#ifdef RSEQ_COMPARE_TWICE
, error1, error2
#endif
);
rseq_workaround_gcc_asm_size_guess();
return 0;
abort:
rseq_workaround_gcc_asm_size_guess();
RSEQ_INJECT_FAILED
return -1;
cmpfail:
rseq_workaround_gcc_asm_size_guess();
return 1;
#ifdef RSEQ_COMPARE_TWICE
error1:
rseq_workaround_gcc_asm_size_guess();
rseq_bug("cpu_id comparison failed");
error2:
rseq_workaround_gcc_asm_size_guess();
rseq_bug("expected value comparison failed");
#endif
}
static inline __attribute__((always_inline))
int rseq_cmpeqv_trymemcpy_storev_release(intptr_t *v, intptr_t expect,
void *dst, void *src, size_t len,
intptr_t newv, int cpu)
{
uintptr_t rseq_scratch[3];
RSEQ_INJECT_C(9)
rseq_workaround_gcc_asm_size_guess();
__asm__ __volatile__ goto (
RSEQ_ASM_DEFINE_TABLE(1f, 2f, 4f) /* start, commit, abort */
LONG_S " %[src], %[rseq_scratch0]\n\t"
LONG_S " %[dst], %[rseq_scratch1]\n\t"
LONG_S " %[len], %[rseq_scratch2]\n\t"
/* Start rseq by storing table entry pointer into rseq_cs. */
RSEQ_ASM_STORE_RSEQ_CS(1, 3f, rseq_cs)
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f)
RSEQ_INJECT_ASM(3)
LONG_L " $4, %[v]\n\t"
"bne $4, %[expect], 5f\n\t"
RSEQ_INJECT_ASM(4)
#ifdef RSEQ_COMPARE_TWICE
RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 6f)
LONG_L " $4, %[v]\n\t"
"bne $4, %[expect], 7f\n\t"
#endif
/* try memcpy */
"beqz %[len], 333f\n\t" \
"222:\n\t" \
"lb $4, 0(%[src])\n\t" \
"sb $4, 0(%[dst])\n\t" \
LONG_ADDI " %[src], 1\n\t" \
LONG_ADDI " %[dst], 1\n\t" \
LONG_ADDI " %[len], -1\n\t" \
"bnez %[len], 222b\n\t" \
"333:\n\t" \
RSEQ_INJECT_ASM(5)
"sync\n\t" /* full sync provides store-release */
/* final store */
LONG_S " %[newv], %[v]\n\t"
"2:\n\t"
RSEQ_INJECT_ASM(6)
/* teardown */
LONG_L " %[len], %[rseq_scratch2]\n\t"
LONG_L " %[dst], %[rseq_scratch1]\n\t"
LONG_L " %[src], %[rseq_scratch0]\n\t"
"b 8f\n\t"
RSEQ_ASM_DEFINE_ABORT(3, 4,
/* teardown */
LONG_L " %[len], %[rseq_scratch2]\n\t"
LONG_L " %[dst], %[rseq_scratch1]\n\t"
LONG_L " %[src], %[rseq_scratch0]\n\t",
abort, 1b, 2b, 4f)
RSEQ_ASM_DEFINE_CMPFAIL(5,
/* teardown */
LONG_L " %[len], %[rseq_scratch2]\n\t"
LONG_L " %[dst], %[rseq_scratch1]\n\t"
LONG_L " %[src], %[rseq_scratch0]\n\t",
cmpfail)
#ifdef RSEQ_COMPARE_TWICE
RSEQ_ASM_DEFINE_CMPFAIL(6,
/* teardown */
LONG_L " %[len], %[rseq_scratch2]\n\t"
LONG_L " %[dst], %[rseq_scratch1]\n\t"
LONG_L " %[src], %[rseq_scratch0]\n\t",
error1)
RSEQ_ASM_DEFINE_CMPFAIL(7,
/* teardown */
LONG_L " %[len], %[rseq_scratch2]\n\t"
LONG_L " %[dst], %[rseq_scratch1]\n\t"
LONG_L " %[src], %[rseq_scratch0]\n\t",
error2)
#endif
"8:\n\t"
: /* gcc asm goto does not allow outputs */
: [cpu_id] "r" (cpu),
[current_cpu_id] "m" (__rseq_abi.cpu_id),
[rseq_cs] "m" (__rseq_abi.rseq_cs),
/* final store input */
[v] "m" (*v),
[expect] "r" (expect),
[newv] "r" (newv),
/* try memcpy input */
[dst] "r" (dst),
[src] "r" (src),
[len] "r" (len),
[rseq_scratch0] "m" (rseq_scratch[0]),
[rseq_scratch1] "m" (rseq_scratch[1]),
[rseq_scratch2] "m" (rseq_scratch[2])
RSEQ_INJECT_INPUT
: "$4", "memory"
RSEQ_INJECT_CLOBBER
: abort, cmpfail
#ifdef RSEQ_COMPARE_TWICE
, error1, error2
#endif
);
rseq_workaround_gcc_asm_size_guess();
return 0;
abort:
rseq_workaround_gcc_asm_size_guess();
RSEQ_INJECT_FAILED
return -1;
cmpfail:
rseq_workaround_gcc_asm_size_guess();
return 1;
#ifdef RSEQ_COMPARE_TWICE
error1:
rseq_workaround_gcc_asm_size_guess();
rseq_bug("cpu_id comparison failed");
error2:
rseq_workaround_gcc_asm_size_guess();
rseq_bug("expected value comparison failed");
#endif
}
#endif /* !RSEQ_SKIP_FASTPATH */

2
tools/testing/selftests/rseq/rseq.h
View File

@ -73,6 +73,8 @@ extern __thread volatile struct rseq __rseq_abi;
#include <rseq-arm.h>
#elif defined(__PPC__)
#include <rseq-ppc.h>
#elif defined(__mips__)
#include <rseq-mips.h>
#else
#error unsupported target
#endif