iommu/arm-smmu: Convert ThunderX workaround to new method
With a framework for implementation-specific funtionality in place, the currently-FDT-dependent ThunderX workaround gets to be the first user. Acked-by: Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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@ -280,6 +280,7 @@ enum arm_smmu_arch_version {
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enum arm_smmu_implementation {
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GENERIC_SMMU,
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CAVIUM_SMMUV2,
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};
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struct arm_smmu_smr {
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@ -1686,6 +1687,17 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu)
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}
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dev_notice(smmu->dev, "\t%u context banks (%u stage-2 only)\n",
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smmu->num_context_banks, smmu->num_s2_context_banks);
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/*
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* Cavium CN88xx erratum #27704.
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* Ensure ASID and VMID allocation is unique across all SMMUs in
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* the system.
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*/
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if (smmu->model == CAVIUM_SMMUV2) {
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smmu->cavium_id_base =
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atomic_add_return(smmu->num_context_banks,
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&cavium_smmu_context_count);
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smmu->cavium_id_base -= smmu->num_context_banks;
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}
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/* ID2 */
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id = readl_relaxed(gr0_base + ARM_SMMU_GR0_ID2);
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@ -1750,6 +1762,7 @@ static struct arm_smmu_match_data name = { .version = ver, .model = imp }
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ARM_SMMU_MATCH_DATA(smmu_generic_v1, ARM_SMMU_V1, GENERIC_SMMU);
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ARM_SMMU_MATCH_DATA(smmu_generic_v2, ARM_SMMU_V2, GENERIC_SMMU);
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ARM_SMMU_MATCH_DATA(cavium_smmuv2, ARM_SMMU_V2, CAVIUM_SMMUV2);
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static const struct of_device_id arm_smmu_of_match[] = {
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{ .compatible = "arm,smmu-v1", .data = &smmu_generic_v1 },
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@ -1757,7 +1770,7 @@ static const struct of_device_id arm_smmu_of_match[] = {
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{ .compatible = "arm,mmu-400", .data = &smmu_generic_v1 },
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{ .compatible = "arm,mmu-401", .data = &smmu_generic_v1 },
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{ .compatible = "arm,mmu-500", .data = &smmu_generic_v2 },
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{ .compatible = "cavium,smmu-v2", .data = &smmu_generic_v2 },
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{ .compatible = "cavium,smmu-v2", .data = &cavium_smmuv2 },
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{ },
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};
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MODULE_DEVICE_TABLE(of, arm_smmu_of_match);
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@ -1871,18 +1884,6 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev)
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}
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}
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/*
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* Cavium CN88xx erratum #27704.
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* Ensure ASID and VMID allocation is unique across all SMMUs in
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* the system.
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*/
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if (of_device_is_compatible(dev->of_node, "cavium,smmu-v2")) {
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smmu->cavium_id_base =
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atomic_add_return(smmu->num_context_banks,
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&cavium_smmu_context_count);
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smmu->cavium_id_base -= smmu->num_context_banks;
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}
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INIT_LIST_HEAD(&smmu->list);
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spin_lock(&arm_smmu_devices_lock);
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list_add(&smmu->list, &arm_smmu_devices);
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