arm64: tegra: Enable AHCI on Jetson TX2

This patch enables AHCI on Jetson TX2.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Sowjanya Komatineni 2020-11-23 12:17:24 -08:00 committed by Thierry Reding
parent c84ebdfd26
commit e061fbdf7d
2 changed files with 32 additions and 0 deletions

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@ -285,6 +285,10 @@
};
};
sata@3507000 {
status = "okay";
};
gpio-keys {
compatible = "gpio-keys";

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@ -1504,6 +1504,34 @@
};
};
sata@3507000 {
compatible = "nvidia,tegra186-ahci";
reg = <0x0 0x03507000 0x0 0x00002000>, /* AHCI */
<0x0 0x03500000 0x0 0x00007000>, /* SATA */
<0x0 0x03A90000 0x0 0x00010000>; /* SATA AUX */
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_SAX>;
interconnects = <&mc TEGRA186_MEMORY_CLIENT_SATAR &emc>,
<&mc TEGRA186_MEMORY_CLIENT_SATAW &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_SATA>;
clocks = <&bpmp TEGRA186_CLK_SATA>,
<&bpmp TEGRA186_CLK_SATA_OOB>;
clock-names = "sata", "sata-oob";
assigned-clocks = <&bpmp TEGRA186_CLK_SATA>,
<&bpmp TEGRA186_CLK_SATA_OOB>;
assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLP_OUT0>,
<&bpmp TEGRA186_CLK_PLLP>;
assigned-clock-rates = <102000000>,
<204000000>;
resets = <&bpmp TEGRA186_RESET_SATA>,
<&bpmp TEGRA186_RESET_SATACOLD>;
reset-names = "sata", "sata-cold";
status = "disabled";
};
bpmp: bpmp {
compatible = "nvidia,tegra186-bpmp";
interconnects = <&mc TEGRA186_MEMORY_CLIENT_BPMPR &emc>,