net: dsa: mt7530: fix tagged frames pass-through in VLAN-unaware mode
In VLAN-unaware mode, the Egress Tag (EG_TAG) field in Port VLAN
Control register must be set to Consistent to let tagged frames pass
through as is, otherwise their tags will be stripped.
Fixes: 83163f7dca
("net: dsa: mediatek: add VLAN support for MT7530")
Signed-off-by: DENG Qingfang <dqfext@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Tested-by: René van Dorst <opensource@vdorst.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
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@ -773,8 +773,9 @@ mt7530_port_set_vlan_unaware(struct dsa_switch *ds, int port)
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*/
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mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK,
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MT7530_PORT_MATRIX_MODE);
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mt7530_rmw(priv, MT7530_PVC_P(port), VLAN_ATTR_MASK,
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VLAN_ATTR(MT7530_VLAN_TRANSPARENT));
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mt7530_rmw(priv, MT7530_PVC_P(port), VLAN_ATTR_MASK | PVC_EG_TAG_MASK,
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VLAN_ATTR(MT7530_VLAN_TRANSPARENT) |
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PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT));
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for (i = 0; i < MT7530_NUM_PORTS; i++) {
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if (dsa_is_user_port(ds, i) &&
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@ -790,8 +791,8 @@ mt7530_port_set_vlan_unaware(struct dsa_switch *ds, int port)
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if (all_user_ports_removed) {
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mt7530_write(priv, MT7530_PCR_P(MT7530_CPU_PORT),
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PCR_MATRIX(dsa_user_ports(priv->ds)));
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mt7530_write(priv, MT7530_PVC_P(MT7530_CPU_PORT),
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PORT_SPEC_TAG);
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mt7530_write(priv, MT7530_PVC_P(MT7530_CPU_PORT), PORT_SPEC_TAG
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| PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT));
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}
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}
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@ -817,8 +818,9 @@ mt7530_port_set_vlan_aware(struct dsa_switch *ds, int port)
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/* Set the port as a user port which is to be able to recognize VID
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* from incoming packets before fetching entry within the VLAN table.
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*/
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mt7530_rmw(priv, MT7530_PVC_P(port), VLAN_ATTR_MASK,
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VLAN_ATTR(MT7530_VLAN_USER));
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mt7530_rmw(priv, MT7530_PVC_P(port), VLAN_ATTR_MASK | PVC_EG_TAG_MASK,
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VLAN_ATTR(MT7530_VLAN_USER) |
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PVC_EG_TAG(MT7530_VLAN_EG_DISABLED));
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}
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static void
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@ -1303,6 +1305,10 @@ mt7530_setup(struct dsa_switch *ds)
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mt7530_cpu_port_enable(priv, i);
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else
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mt7530_port_disable(ds, i);
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/* Enable consistent egress tag */
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mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK,
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PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT));
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}
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/* Setup port 5 */
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@ -172,9 +172,16 @@ enum mt7530_port_mode {
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/* Register for port vlan control */
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#define MT7530_PVC_P(x) (0x2010 + ((x) * 0x100))
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#define PORT_SPEC_TAG BIT(5)
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#define PVC_EG_TAG(x) (((x) & 0x7) << 8)
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#define PVC_EG_TAG_MASK PVC_EG_TAG(7)
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#define VLAN_ATTR(x) (((x) & 0x3) << 6)
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#define VLAN_ATTR_MASK VLAN_ATTR(3)
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enum mt7530_vlan_port_eg_tag {
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MT7530_VLAN_EG_DISABLED = 0,
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MT7530_VLAN_EG_CONSISTENT = 1,
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};
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enum mt7530_vlan_port_attr {
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MT7530_VLAN_USER = 0,
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MT7530_VLAN_TRANSPARENT = 3,
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