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staging: fbtft: Fix block comments according to kernel coding style 

Add the required trailing * on subsequent lines as well as move the */
on a separate line. Checkpatch found this issue.

Signed-off-by: Eva Rachel Retuya <eraretuya@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Eva Rachel Retuya 2016-02-10 17:56:06 +08:00 committed by Greg Kroah-Hartman
parent 60112069a9
commit e0246ea374
4 changed files with 75 additions and 61 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

82
drivers/staging/fbtft/fb_hx8340bn.c
View File

@ -46,55 +46,69 @@ static int init_display(struct fbtft_par *par)
/* BTL221722-276L startup sequence, from datasheet */
/* SETEXTCOM: Set extended command set (C1h)
This command is used to set extended command set access enable.
Enable: After command (C1h), must write: ffh,83h,40h */
/*
* SETEXTCOM: Set extended command set (C1h)
* This command is used to set extended command set access enable.
* Enable: After command (C1h), must write: ffh,83h,40h
*/
write_reg(par, 0xC1, 0xFF, 0x83, 0x40);
/* Sleep out
This command turns off sleep mode.
In this mode the DC/DC converter is enabled, Internal oscillator
is started, and panel scanning is started. */
/*
* Sleep out
* This command turns off sleep mode.
* In this mode the DC/DC converter is enabled, Internal oscillator
* is started, and panel scanning is started.
*/
write_reg(par, 0x11);
mdelay(150);
/* Undoc'd register? */
write_reg(par, 0xCA, 0x70, 0x00, 0xD9);
/* SETOSC: Set Internal Oscillator (B0h)
This command is used to set internal oscillator related settings */
/* OSC_EN: Enable internal oscillator */
/* Internal oscillator frequency: 125% x 2.52MHz */
/*
* SETOSC: Set Internal Oscillator (B0h)
* This command is used to set internal oscillator related settings
* OSC_EN: Enable internal oscillator
* Internal oscillator frequency: 125% x 2.52MHz
*/
write_reg(par, 0xB0, 0x01, 0x11);
/* Drive ability setting */
write_reg(par, 0xC9, 0x90, 0x49, 0x10, 0x28, 0x28, 0x10, 0x00, 0x06);
mdelay(20);
/* SETPWCTR5: Set Power Control 5(B5h)
This command is used to set VCOM Low and VCOM High Voltage */
/* VCOMH 0110101 : 3.925 */
/* VCOML 0100000 : -1.700 */
/* 45h=69 VCOMH: "VMH" + 5d VCOML: "VMH" + 5d */
/*
* SETPWCTR5: Set Power Control 5(B5h)
* This command is used to set VCOM Low and VCOM High Voltage
* VCOMH 0110101 : 3.925
* VCOML 0100000 : -1.700
* 45h=69 VCOMH: "VMH" + 5d VCOML: "VMH" + 5d
*/
write_reg(par, 0xB5, 0x35, 0x20, 0x45);
/* SETPWCTR4: Set Power Control 4(B4h)
VRH[4:0]: Specify the VREG1 voltage adjusting.
VREG1 voltage is for gamma voltage setting.
BT[2:0]: Switch the output factor of step-up circuit 2
for VGH and VGL voltage generation. */
/*
* SETPWCTR4: Set Power Control 4(B4h)
* VRH[4:0]: Specify the VREG1 voltage adjusting.
* VREG1 voltage is for gamma voltage setting.
* BT[2:0]: Switch the output factor of step-up circuit 2
* for VGH and VGL voltage generation.
*/
write_reg(par, 0xB4, 0x33, 0x25, 0x4C);
mdelay(10);
/* Interface Pixel Format (3Ah)
This command is used to define the format of RGB picture data,
which is to be transfer via the system and RGB interface. */
/* RGB interface: 16 Bit/Pixel */
/*
* Interface Pixel Format (3Ah)
* This command is used to define the format of RGB picture data,
* which is to be transfer via the system and RGB interface.
* RGB interface: 16 Bit/Pixel
*/
write_reg(par, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT);
/* Display on (29h)
This command is used to recover from DISPLAY OFF mode.
Output from the Frame Memory is enabled. */
/*
* Display on (29h)
* This command is used to recover from DISPLAY OFF mode.
* Output from the Frame Memory is enabled.
*/
write_reg(par, MIPI_DCS_SET_DISPLAY_ON);
mdelay(10);
@ -137,12 +151,12 @@ static int set_var(struct fbtft_par *par)
}
/*
Gamma Curve selection, GC (only GC0 can be customized):
0 = 2.2, 1 = 1.8, 2 = 2.5, 3 = 1.0
Gamma string format:
OP0 OP1 CP0 CP1 CP2 CP3 CP4 MP0 MP1 MP2 MP3 MP4 MP5 CGM0 CGM1
ON0 ON1 CN0 CN1 CN2 CN3 CN4 MN0 MN1 MN2 MN3 MN4 MN5 XXXX GC
*/
* Gamma Curve selection, GC (only GC0 can be customized):
* 0 = 2.2, 1 = 1.8, 2 = 2.5, 3 = 1.0
* Gamma string format:
* OP0 OP1 CP0 CP1 CP2 CP3 CP4 MP0 MP1 MP2 MP3 MP4 MP5 CGM0 CGM1
* ON0 ON1 CN0 CN1 CN2 CN3 CN4 MN0 MN1 MN2 MN3 MN4 MN5 XXXX GC
*/
#define CURVE(num, idx) curves[num * par->gamma.num_values + idx]
static int set_gamma(struct fbtft_par *par, unsigned long *curves)
{

8
drivers/staging/fbtft/fb_hx8347d.c
View File

@ -97,10 +97,10 @@ static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
}
/*
Gamma string format:
VRP0 VRP1 VRP2 VRP3 VRP4 VRP5 PRP0 PRP1 PKP0 PKP1 PKP2 PKP3 PKP4 CGM
VRN0 VRN1 VRN2 VRN3 VRN4 VRN5 PRN0 PRN1 PKN0 PKN1 PKN2 PKN3 PKN4 CGM
*/
* Gamma string format:
* VRP0 VRP1 VRP2 VRP3 VRP4 VRP5 PRP0 PRP1 PKP0 PKP1 PKP2 PKP3 PKP4 CGM
* VRN0 VRN1 VRN2 VRN3 VRN4 VRN5 PRN0 PRN1 PKN0 PKN1 PKN2 PKN3 PKN4 CGM
*/
#define CURVE(num, idx) curves[num * par->gamma.num_values + idx]
static int set_gamma(struct fbtft_par *par, unsigned long *curves)
{

18
drivers/staging/fbtft/fb_hx8353d.c
View File

@ -88,12 +88,14 @@ static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
#define mv BIT(5)
static int set_var(struct fbtft_par *par)
{
/* madctl - memory data access control
rgb/bgr:
1. mode selection pin srgb
rgb h/w pin for color filter setting: 0=rgb, 1=bgr
2. madctl rgb bit
rgb-bgr order color filter panel: 0=rgb, 1=bgr */
/*
* madctl - memory data access control
* rgb/bgr:
* 1. mode selection pin srgb
* rgb h/w pin for color filter setting: 0=rgb, 1=bgr
* 2. madctl rgb bit
* rgb-bgr order color filter panel: 0=rgb, 1=bgr
*/
switch (par->info->var.rotate) {
case 0:
write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
@ -116,9 +118,7 @@ static int set_var(struct fbtft_par *par)
return 0;
}
/*
gamma string format:
*/
/* gamma string format: */
static int set_gamma(struct fbtft_par *par, unsigned long *curves)
{
write_reg(par, 0xE0,

28
drivers/staging/fbtft/fb_hx8357d.h
View File

@ -1,17 +1,17 @@
/***************************************************
This is our library for the Adafruit ILI9341 Breakout and Shield
----> http://www.adafruit.com/products/1651
Check out the links above for our tutorials and wiring diagrams
These displays use SPI to communicate, 4 or 5 pins are required to
interface (RST is optional)
Adafruit invests time and resources providing this open source code,
please support Adafruit and open-source hardware by purchasing
products from Adafruit!
Written by Limor Fried/Ladyada for Adafruit Industries.
MIT license, all text above must be included in any redistribution
****************************************************/
/*
* This is our library for the Adafruit ILI9341 Breakout and Shield
* ----> http://www.adafruit.com/products/1651
*
* Check out the links above for our tutorials and wiring diagrams
* These displays use SPI to communicate, 4 or 5 pins are required to
* interface (RST is optional)
* Adafruit invests time and resources providing this open source code,
* please support Adafruit and open-source hardware by purchasing
* products from Adafruit!
*
* Written by Limor Fried/Ladyada for Adafruit Industries.
* MIT license, all text above must be included in any redistribution
*/
#ifndef __HX8357_H__
#define __HX8357_H__