staging: et131x: Revert changes from previous commit
In commit 834d0ee317
(uintxy_t removal) not all changes were trival text replacements, some converted u64 -> dma_addr_t.
In some configurations dma_addr_t is a u32, meaning that some bit operations cause build warnings. From Randy Dunlap:
----------------
on i386 (X86_32) builds:
drivers/staging/et131x/et131x.c:2483:8: warning: right shift count >= width of type
drivers/staging/et131x/et131x.c:2531:8: warning: right shift count >= width of type
----------------
Removed these by reverting dma_addr_t back to u64 types, as well as
reverting some other non-trivial changes from the aforementioned commit.
Reported-by: Randy Dunlap <rdunlap@xenotime.net>
Signed-off-by: Mark Einon <mark.einon@gmail.com>
Acked-by: Randy Dunlap <rdunlap@xenotime.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
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@ -299,8 +299,8 @@ struct fbr_lookup {
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dma_addr_t ring_physaddr;
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void *mem_virtaddrs[MAX_DESC_PER_RING_RX / FBR_CHUNKS];
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dma_addr_t mem_physaddrs[MAX_DESC_PER_RING_RX / FBR_CHUNKS];
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dma_addr_t real_physaddr;
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u32 offset;
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u64 real_physaddr;
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u64 offset;
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u32 local_full;
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u32 num_entries;
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u32 buffsize;
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@ -1902,10 +1902,9 @@ static void et131x_config_rx_dma_regs(struct et131x_adapter *adapter)
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/* Set the address and parameters of Free buffer ring 1 (and 0 if
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* required) into the 1310's registers
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*/
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writel(((u64) rx_local->fbr[0]->real_physaddr) >> 32,
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writel((u32) (rx_local->fbr[0]->real_physaddr >> 32),
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&rx_dma->fbr1_base_hi);
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writel(((u64) rx_local->fbr[0]->real_physaddr) & DMA_BIT_MASK(32),
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&rx_dma->fbr1_base_lo);
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writel((u32) rx_local->fbr[0]->real_physaddr, &rx_dma->fbr1_base_lo);
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writel(rx_local->fbr[0]->num_entries - 1, &rx_dma->fbr1_num_des);
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writel(ET_DMA10_WRAP, &rx_dma->fbr1_full_offset);
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@ -1927,10 +1926,9 @@ static void et131x_config_rx_dma_regs(struct et131x_adapter *adapter)
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fbr_entry++;
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}
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writel(((u64) rx_local->fbr[1]->real_physaddr) >> 32,
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writel((u32) (rx_local->fbr[1]->real_physaddr >> 32),
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&rx_dma->fbr0_base_hi);
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writel(((u64) rx_local->fbr[1]->real_physaddr) & DMA_BIT_MASK(32),
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&rx_dma->fbr0_base_lo);
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writel((u32) rx_local->fbr[1]->real_physaddr, &rx_dma->fbr0_base_lo);
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writel(rx_local->fbr[1]->num_entries - 1, &rx_dma->fbr0_num_des);
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writel(ET_DMA10_WRAP, &rx_dma->fbr0_full_offset);
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@ -2275,10 +2273,10 @@ static inline u32 bump_free_buff_ring(u32 *free_buff_ring, u32 limit)
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* @mask: correct mask
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*/
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static void et131x_align_allocated_memory(struct et131x_adapter *adapter,
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dma_addr_t *phys_addr, u32 *offset,
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u32 mask)
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u64 *phys_addr, u64 *offset,
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u64 mask)
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{
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dma_addr_t new_addr = *phys_addr & ~mask;
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u64 new_addr = *phys_addr & ~mask;
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*offset = 0;
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@ -2430,8 +2428,8 @@ static int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
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rx_ring->fbr[1]->offset);
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#endif
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for (i = 0; i < (rx_ring->fbr[0]->num_entries / FBR_CHUNKS); i++) {
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dma_addr_t fbr1_tmp_physaddr;
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u32 fbr1_offset;
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u64 fbr1_tmp_physaddr;
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u64 fbr1_offset;
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u32 fbr1_align;
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/* This code allocates an area of memory big enough for N
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@ -2496,8 +2494,8 @@ static int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
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#ifdef USE_FBR0
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/* Same for FBR0 (if in use) */
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for (i = 0; i < (rx_ring->fbr[1]->num_entries / FBR_CHUNKS); i++) {
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dma_addr_t fbr0_tmp_physaddr;
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u32 fbr0_offset;
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u64 fbr0_tmp_physaddr;
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u64 fbr0_offset;
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fbr_chunksize =
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((FBR_CHUNKS + 1) * rx_ring->fbr[1]->buffsize) - 1;
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