watchdog: it87_wdt: Add support for watchdogs with 8b timers
This patch adds support for watchdogs with 8b timers, like ones in IT8702F and older revisions of IT8712F Super IO chip, to it87_wdt driver. This patch should be used after the patch 'it87_wdt: Add support for IT8720F watchdog'. Signed-off-by: Ondrej Zajicek <santiago@crfreenet.org> Signed-off-by: Wim Van Sebroeck <wim@iguana.be> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
This commit is contained in:
Ondrej Zajicek
Wim Van Sebroeck
parent
ee3e96583e
commit
dfb0b8eae1
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@ -565,11 +565,11 @@ config IT87_WDT
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tristate "IT87 Watchdog Timer"
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depends on X86 && EXPERIMENTAL
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---help---
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This is the driver for the hardware watchdog on the ITE
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IT8716, IT8718, IT8720, IT8726, IT8712(Version J,K) Super I/O
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chips. This watchdog simply watches your kernel to make sure
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it doesn't freeze, and if it does, it reboots your computer
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after a certain amount of time.
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This is the driver for the hardware watchdog on the ITE IT8702,
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IT8712, IT8716, IT8718, IT8720, IT8726, IT8712 Super I/O chips.
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This watchdog simply watches your kernel to make sure it doesn't
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freeze, and if it does, it reboots your computer after a certain
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amount of time.
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To compile this driver as a module, choose M here: the module will
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be called it87_wdt.
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@ -12,7 +12,7 @@
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* http://www.ite.com.tw/
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*
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* Support of the watchdog timers, which are available on
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* IT8716, IT8718, IT8720, IT8726 and IT8712 (J,K version).
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* IT8702, IT8712, IT8716, IT8718, IT8720 and IT8726.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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@ -76,6 +76,7 @@
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/* Chip Id numbers */
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#define NO_DEV_ID 0xffff
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#define IT8702_ID 0x8702
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#define IT8705_ID 0x8705
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#define IT8712_ID 0x8712
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#define IT8716_ID 0x8716
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@ -133,7 +134,7 @@
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#define WDTS_USE_GP 4
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#define WDTS_EXPECTED 5
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static unsigned int base, gpact, ciract;
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static unsigned int base, gpact, ciract, max_units;
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static unsigned long wdt_status;
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static DEFINE_SPINLOCK(spinlock);
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@ -211,6 +212,33 @@ static inline void superio_outw(int val, int reg)
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outb(val, VAL);
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}
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/* Internal function, should be called after superio_select(GPIO) */
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static void wdt_update_timeout(void)
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{
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unsigned char cfg = WDT_KRST | WDT_PWROK;
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int tm = timeout;
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if (testmode)
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cfg = 0;
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if (tm <= max_units)
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cfg |= WDT_TOV1;
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else
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tm /= 60;
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superio_outb(cfg, WDTCFG);
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superio_outb(tm, WDTVALLSB);
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if (max_units > 255)
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superio_outb(tm>>8, WDTVALMSB);
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}
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static int wdt_round_time(int t)
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{
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t += 59;
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t -= t % 60;
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return t;
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}
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/* watchdog timer handling */
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static void wdt_keepalive(void)
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@ -235,12 +263,7 @@ static void wdt_start(void)
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superio_outb(WDT_GAMEPORT, WDTCTRL);
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else
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superio_outb(WDT_CIRINT, WDTCTRL);
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if (!testmode)
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superio_outb(WDT_TOV1 | WDT_KRST | WDT_PWROK, WDTCFG);
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else
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superio_outb(WDT_TOV1, WDTCFG);
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superio_outb(timeout>>8, WDTVALMSB);
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superio_outb(timeout, WDTVALLSB);
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wdt_update_timeout();
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superio_exit();
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spin_unlock_irqrestore(&spinlock, flags);
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@ -256,8 +279,9 @@ static void wdt_stop(void)
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superio_select(GPIO);
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superio_outb(0x00, WDTCTRL);
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superio_outb(WDT_TOV1, WDTCFG);
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superio_outb(0x00, WDTVALMSB);
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superio_outb(0x00, WDTVALLSB);
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if (max_units > 255)
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superio_outb(0x00, WDTVALMSB);
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superio_exit();
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spin_unlock_irqrestore(&spinlock, flags);
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@ -267,8 +291,8 @@ static void wdt_stop(void)
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* wdt_set_timeout - set a new timeout value with watchdog ioctl
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* @t: timeout value in seconds
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*
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* The hardware device has a 16 bit watchdog timer, thus the
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* timeout time ranges between 1 and 65535 seconds.
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* The hardware device has a 8 or 16 bit watchdog timer (depends on
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* chip version) that can be configured to count seconds or minutes.
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*
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* Used within WDIOC_SETTIMEOUT watchdog device ioctl.
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*/
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@ -277,19 +301,19 @@ static int wdt_set_timeout(int t)
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{
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unsigned long flags;
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if (t < 1 || t > 65535)
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if (t < 1 || t > max_units * 60)
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return -EINVAL;
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timeout = t;
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if (t > max_units)
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timeout = wdt_round_time(t);
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else
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timeout = t;
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spin_lock_irqsave(&spinlock, flags);
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if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
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superio_enter();
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superio_select(GPIO);
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superio_outb(t>>8, WDTVALMSB);
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superio_outb(t, WDTVALLSB);
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wdt_update_timeout();
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superio_exit();
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}
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spin_unlock_irqrestore(&spinlock, flags);
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@ -535,6 +559,8 @@ static int __init it87_wdt_init(void)
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u8 chip_rev;
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unsigned long flags;
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wdt_status = 0;
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spin_lock_irqsave(&spinlock, flags);
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superio_enter();
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chip_type = superio_inw(CHIPID);
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@ -543,16 +569,21 @@ static int __init it87_wdt_init(void)
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spin_unlock_irqrestore(&spinlock, flags);
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switch (chip_type) {
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case IT8702_ID:
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max_units = 255;
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break;
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case IT8712_ID:
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max_units = (chip_rev < 8) ? 255 : 65535;
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break;
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case IT8716_ID:
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case IT8726_ID:
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max_units = 65535;
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break;
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case IT8718_ID:
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case IT8720_ID:
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max_units = 65535;
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try_gameport = 0;
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break;
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case IT8712_ID:
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if (chip_rev > 7)
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break;
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case IT8705_ID:
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printk(KERN_ERR PFX
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"Unsupported Chip found, Chip %04x Revision %02x\n",
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@ -628,13 +659,16 @@ static int __init it87_wdt_init(void)
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spin_unlock_irqrestore(&spinlock, flags);
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}
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if (timeout < 1 || timeout > 65535) {
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if (timeout < 1 || timeout > max_units * 60) {
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timeout = DEFAULT_TIMEOUT;
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printk(KERN_WARNING PFX
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"Timeout value out of range, use default %d sec\n",
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DEFAULT_TIMEOUT);
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}
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if (timeout > max_units)
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timeout = wdt_round_time(timeout);
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rc = register_reboot_notifier(&wdt_notifier);
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if (rc) {
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printk(KERN_ERR PFX
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@ -661,7 +695,7 @@ static int __init it87_wdt_init(void)
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outb(0x09, CIR_IER(base));
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}
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printk(KERN_INFO PFX "Chip it%04x revision %d initialized. "
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printk(KERN_INFO PFX "Chip IT%04x revision %d initialized. "
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"timeout=%d sec (nowayout=%d testmode=%d exclusive=%d "
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"nogameport=%d)\n", chip_type, chip_rev, timeout,
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nowayout, testmode, exclusive, nogameport);
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@ -703,8 +737,9 @@ static void __exit it87_wdt_exit(void)
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superio_select(GPIO);
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superio_outb(0x00, WDTCTRL);
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superio_outb(0x00, WDTCFG);
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superio_outb(0x00, WDTVALMSB);
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superio_outb(0x00, WDTVALLSB);
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if (max_units > 255)
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superio_outb(0x00, WDTVALMSB);
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if (test_bit(WDTS_USE_GP, &wdt_status)) {
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superio_select(GAMEPORT);
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superio_outb(gpact, ACTREG);
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