intelfb -- uses stride alignment of 64 on the 9xx chipsets.
Signed-off-by: Dennis Munsie <dmunsie@cecropia.com> Signed-off-by: Dave Airlie <airlied@linux.ie>
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@ -59,6 +59,7 @@
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#define INTEL_REG_SIZE 0x80000
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#define INTEL_REG_SIZE 0x80000
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#define STRIDE_ALIGNMENT 16
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#define STRIDE_ALIGNMENT 16
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#define STRIDE_ALIGNMENT_I9XX 64
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#define PALETTE_8_ENTRIES 256
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#define PALETTE_8_ENTRIES 256
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@ -1141,6 +1141,9 @@ update_dinfo(struct intelfb_info *dinfo, struct fb_var_screeninfo *var)
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}
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}
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/* Make sure the line length is a aligned correctly. */
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/* Make sure the line length is a aligned correctly. */
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if (IS_I9XX(dinfo))
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dinfo->pitch = ROUND_UP_TO(dinfo->pitch, STRIDE_ALIGNMENT_I9XX);
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else
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dinfo->pitch = ROUND_UP_TO(dinfo->pitch, STRIDE_ALIGNMENT);
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dinfo->pitch = ROUND_UP_TO(dinfo->pitch, STRIDE_ALIGNMENT);
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if (FIXED_MODE(dinfo))
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if (FIXED_MODE(dinfo))
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@ -1005,6 +1005,7 @@ intelfbhw_mode_to_hw(struct intelfb_info *dinfo, struct intelfb_hwstate *hw,
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u32 vsync_start, vsync_end, vblank_start, vblank_end, vtotal, vactive;
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u32 vsync_start, vsync_end, vblank_start, vblank_end, vtotal, vactive;
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u32 vsync_pol, hsync_pol;
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u32 vsync_pol, hsync_pol;
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u32 *vs, *vb, *vt, *hs, *hb, *ht, *ss, *pipe_conf;
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u32 *vs, *vb, *vt, *hs, *hb, *ht, *ss, *pipe_conf;
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u32 stride_alignment;
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DBG_MSG("intelfbhw_mode_to_hw\n");
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DBG_MSG("intelfbhw_mode_to_hw\n");
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@ -1216,9 +1217,11 @@ intelfbhw_mode_to_hw(struct intelfb_info *dinfo, struct intelfb_hwstate *hw,
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hw->disp_a_base += dinfo->fb.offset << 12;
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hw->disp_a_base += dinfo->fb.offset << 12;
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/* Check stride alignment. */
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/* Check stride alignment. */
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if (hw->disp_a_stride % STRIDE_ALIGNMENT != 0) {
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stride_alignment = IS_I9XX(dinfo) ? STRIDE_ALIGNMENT_I9XX :
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STRIDE_ALIGNMENT;
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if (hw->disp_a_stride % stride_alignment != 0) {
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WRN_MSG("display stride %d has bad alignment %d\n",
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WRN_MSG("display stride %d has bad alignment %d\n",
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hw->disp_a_stride, STRIDE_ALIGNMENT);
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hw->disp_a_stride, stride_alignment);
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return 1;
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return 1;
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}
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}
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