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perf: cs-etm: Fix ETMv4 CONFIGR entry in perf.data file 

The value passed into the perf.data file for the CONFIGR register in ETMv4
was incorrectly being set to the command line options/ETMv3 value.

Adds bit definitions and function to remap this value to the correct ETMv4
CONFIGR bit values for all selected options.

Signed-off-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Mike Leach 2017-08-02 10:22:19 -06:00 committed by Greg Kroah-Hartman
parent 4da69f49e7
commit df770ff058
3 changed files with 37 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
include/linux/coresight-pmu.h
View File

@ -26,6 +26,11 @@
#define ETM_OPT_TS 28 #define ETM_OPT_TS 28
#define ETM_OPT_RETSTK 29 #define ETM_OPT_RETSTK 29
/* ETMv4 CONFIGR programming bits for the ETM OPTs */
#define ETM4_CFG_BIT_CYCACC 4
#define ETM4_CFG_BIT_TS 11
#define ETM4_CFG_BIT_RETSTK 12
static inline int coresight_get_trace_id(int cpu) static inline int coresight_get_trace_id(int cpu)
{ {
/* /*

5
tools/include/linux/coresight-pmu.h
View File

@ -26,6 +26,11 @@
#define ETM_OPT_TS 28 #define ETM_OPT_TS 28
#define ETM_OPT_RETSTK 29 #define ETM_OPT_RETSTK 29
/* ETMv4 CONFIGR programming bits for the ETM OPTs */
#define ETM4_CFG_BIT_CYCACC 4
#define ETM4_CFG_BIT_TS 11
#define ETM4_CFG_BIT_RETSTK 12
static inline int coresight_get_trace_id(int cpu) static inline int coresight_get_trace_id(int cpu)
{ {
/* /*

28
tools/perf/arch/arm/util/cs-etm.c
View File

@ -266,6 +266,32 @@ static u64 cs_etm_get_config(struct auxtrace_record *itr)
return config; return config;
} }
#ifndef BIT
#define BIT(N) (1UL << (N))
#endif
static u64 cs_etmv4_get_config(struct auxtrace_record *itr)
{
u64 config = 0;
u64 config_opts = 0;
/*
* The perf event variable config bits represent both
* the command line options and register programming
* bits in ETMv3/PTM. For ETMv4 we must remap options
* to real bits
*/
config_opts = cs_etm_get_config(itr);
if (config_opts & BIT(ETM_OPT_CYCACC))
config |= BIT(ETM4_CFG_BIT_CYCACC);
if (config_opts & BIT(ETM_OPT_TS))
config |= BIT(ETM4_CFG_BIT_TS);
if (config_opts & BIT(ETM_OPT_RETSTK))
config |= BIT(ETM4_CFG_BIT_RETSTK);
return config;
}
static size_t static size_t
cs_etm_info_priv_size(struct auxtrace_record *itr __maybe_unused, cs_etm_info_priv_size(struct auxtrace_record *itr __maybe_unused,
struct perf_evlist *evlist __maybe_unused) struct perf_evlist *evlist __maybe_unused)
@ -363,7 +389,7 @@ static void cs_etm_get_metadata(int cpu, u32 *offset,
magic = __perf_cs_etmv4_magic; magic = __perf_cs_etmv4_magic;
/* Get trace configuration register */ /* Get trace configuration register */
info->priv[*offset + CS_ETMV4_TRCCONFIGR] = info->priv[*offset + CS_ETMV4_TRCCONFIGR] =
cs_etm_get_config(itr); cs_etmv4_get_config(itr);
/* Get traceID from the framework */ /* Get traceID from the framework */
info->priv[*offset + CS_ETMV4_TRCTRACEIDR] = info->priv[*offset + CS_ETMV4_TRCTRACEIDR] =
coresight_get_trace_id(cpu); coresight_get_trace_id(cpu);