ARM: pxa: use little endian read write in gpio driver
Remove __raw_readl()/__raw_writel(). Use readl_relaxed()/writel_relaxed() instead. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
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1a8d5fab16
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@ -143,12 +143,12 @@ static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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spin_lock_irqsave(&gpio_lock, flags);
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value = __raw_readl(base + GPDR_OFFSET);
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value = readl_relaxed(base + GPDR_OFFSET);
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if (__gpio_is_inverted(chip->base + offset))
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value |= mask;
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else
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value &= ~mask;
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__raw_writel(value, base + GPDR_OFFSET);
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writel_relaxed(value, base + GPDR_OFFSET);
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spin_unlock_irqrestore(&gpio_lock, flags);
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return 0;
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@ -161,16 +161,16 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip,
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uint32_t tmp, mask = 1 << offset;
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unsigned long flags;
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__raw_writel(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET));
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writel_relaxed(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET));
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spin_lock_irqsave(&gpio_lock, flags);
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tmp = __raw_readl(base + GPDR_OFFSET);
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tmp = readl_relaxed(base + GPDR_OFFSET);
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if (__gpio_is_inverted(chip->base + offset))
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tmp &= ~mask;
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else
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tmp |= mask;
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__raw_writel(tmp, base + GPDR_OFFSET);
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writel_relaxed(tmp, base + GPDR_OFFSET);
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spin_unlock_irqrestore(&gpio_lock, flags);
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return 0;
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@ -178,12 +178,12 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip,
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static int pxa_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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return __raw_readl(gpio_chip_base(chip) + GPLR_OFFSET) & (1 << offset);
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return readl_relaxed(gpio_chip_base(chip) + GPLR_OFFSET) & (1 << offset);
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}
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static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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{
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__raw_writel(1 << offset, gpio_chip_base(chip) +
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writel_relaxed(1 << offset, gpio_chip_base(chip) +
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(value ? GPSR_OFFSET : GPCR_OFFSET));
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}
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@ -228,12 +228,12 @@ static inline void update_edge_detect(struct pxa_gpio_chip *c)
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{
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uint32_t grer, gfer;
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grer = __raw_readl(c->regbase + GRER_OFFSET) & ~c->irq_mask;
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gfer = __raw_readl(c->regbase + GFER_OFFSET) & ~c->irq_mask;
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grer = readl_relaxed(c->regbase + GRER_OFFSET) & ~c->irq_mask;
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gfer = readl_relaxed(c->regbase + GFER_OFFSET) & ~c->irq_mask;
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grer |= c->irq_edge_rise & c->irq_mask;
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gfer |= c->irq_edge_fall & c->irq_mask;
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__raw_writel(grer, c->regbase + GRER_OFFSET);
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__raw_writel(gfer, c->regbase + GFER_OFFSET);
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writel_relaxed(grer, c->regbase + GRER_OFFSET);
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writel_relaxed(gfer, c->regbase + GFER_OFFSET);
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}
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static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type)
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@ -257,12 +257,12 @@ static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type)
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type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
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}
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gpdr = __raw_readl(c->regbase + GPDR_OFFSET);
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gpdr = readl_relaxed(c->regbase + GPDR_OFFSET);
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if (__gpio_is_inverted(gpio))
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__raw_writel(gpdr | mask, c->regbase + GPDR_OFFSET);
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writel_relaxed(gpdr | mask, c->regbase + GPDR_OFFSET);
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else
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__raw_writel(gpdr & ~mask, c->regbase + GPDR_OFFSET);
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writel_relaxed(gpdr & ~mask, c->regbase + GPDR_OFFSET);
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if (type & IRQ_TYPE_EDGE_RISING)
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c->irq_edge_rise |= mask;
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@ -293,9 +293,9 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc)
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for_each_gpio_chip(gpio, c) {
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gpio_base = c->chip.base;
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gedr = __raw_readl(c->regbase + GEDR_OFFSET);
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gedr = readl_relaxed(c->regbase + GEDR_OFFSET);
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gedr = gedr & c->irq_mask;
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__raw_writel(gedr, c->regbase + GEDR_OFFSET);
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writel_relaxed(gedr, c->regbase + GEDR_OFFSET);
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n = find_first_bit(&gedr, BITS_PER_LONG);
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while (n < BITS_PER_LONG) {
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@ -313,7 +313,7 @@ static void pxa_ack_muxed_gpio(struct irq_data *d)
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int gpio = pxa_irq_to_gpio(d->irq);
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struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
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__raw_writel(GPIO_bit(gpio), c->regbase + GEDR_OFFSET);
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writel_relaxed(GPIO_bit(gpio), c->regbase + GEDR_OFFSET);
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}
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static void pxa_mask_muxed_gpio(struct irq_data *d)
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@ -324,10 +324,10 @@ static void pxa_mask_muxed_gpio(struct irq_data *d)
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c->irq_mask &= ~GPIO_bit(gpio);
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grer = __raw_readl(c->regbase + GRER_OFFSET) & ~GPIO_bit(gpio);
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gfer = __raw_readl(c->regbase + GFER_OFFSET) & ~GPIO_bit(gpio);
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__raw_writel(grer, c->regbase + GRER_OFFSET);
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__raw_writel(gfer, c->regbase + GFER_OFFSET);
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grer = readl_relaxed(c->regbase + GRER_OFFSET) & ~GPIO_bit(gpio);
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gfer = readl_relaxed(c->regbase + GFER_OFFSET) & ~GPIO_bit(gpio);
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writel_relaxed(grer, c->regbase + GRER_OFFSET);
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writel_relaxed(gfer, c->regbase + GFER_OFFSET);
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}
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static void pxa_unmask_muxed_gpio(struct irq_data *d)
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@ -398,9 +398,9 @@ void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
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/* clear all GPIO edge detects */
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for_each_gpio_chip(gpio, c) {
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__raw_writel(0, c->regbase + GFER_OFFSET);
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__raw_writel(0, c->regbase + GRER_OFFSET);
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__raw_writel(~0,c->regbase + GEDR_OFFSET);
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writel_relaxed(0, c->regbase + GFER_OFFSET);
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writel_relaxed(0, c->regbase + GRER_OFFSET);
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writel_relaxed(~0,c->regbase + GEDR_OFFSET);
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}
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#ifdef CONFIG_ARCH_PXA
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@ -435,13 +435,13 @@ static int pxa_gpio_suspend(void)
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int gpio;
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for_each_gpio_chip(gpio, c) {
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c->saved_gplr = __raw_readl(c->regbase + GPLR_OFFSET);
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c->saved_gpdr = __raw_readl(c->regbase + GPDR_OFFSET);
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c->saved_grer = __raw_readl(c->regbase + GRER_OFFSET);
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c->saved_gfer = __raw_readl(c->regbase + GFER_OFFSET);
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c->saved_gplr = readl_relaxed(c->regbase + GPLR_OFFSET);
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c->saved_gpdr = readl_relaxed(c->regbase + GPDR_OFFSET);
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c->saved_grer = readl_relaxed(c->regbase + GRER_OFFSET);
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c->saved_gfer = readl_relaxed(c->regbase + GFER_OFFSET);
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/* Clear GPIO transition detect bits */
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__raw_writel(0xffffffff, c->regbase + GEDR_OFFSET);
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writel_relaxed(0xffffffff, c->regbase + GEDR_OFFSET);
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}
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return 0;
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}
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@ -453,12 +453,12 @@ static void pxa_gpio_resume(void)
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for_each_gpio_chip(gpio, c) {
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/* restore level with set/clear */
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__raw_writel( c->saved_gplr, c->regbase + GPSR_OFFSET);
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__raw_writel(~c->saved_gplr, c->regbase + GPCR_OFFSET);
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writel_relaxed( c->saved_gplr, c->regbase + GPSR_OFFSET);
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writel_relaxed(~c->saved_gplr, c->regbase + GPCR_OFFSET);
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__raw_writel(c->saved_grer, c->regbase + GRER_OFFSET);
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__raw_writel(c->saved_gfer, c->regbase + GFER_OFFSET);
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__raw_writel(c->saved_gpdr, c->regbase + GPDR_OFFSET);
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writel_relaxed(c->saved_grer, c->regbase + GRER_OFFSET);
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writel_relaxed(c->saved_gfer, c->regbase + GFER_OFFSET);
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writel_relaxed(c->saved_gpdr, c->regbase + GPDR_OFFSET);
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}
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}
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#else
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