x86, irq: Introduce helper functions to release IOAPIC pin
Introduce function mp_unmap_irq() to release IOAPIC IRQ when IRQ is not used any more, which will typically called by pcibios_disabled_irq. And function mp_irqdomain_unmap() is a common implementation of irq_domain_ops.unmap for IOAPIC. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Link: http://lkml.kernel.org/r/1402302011-23642-38-git-send-email-jiang.liu@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -187,10 +187,12 @@ extern int mp_find_ioapic(u32 gsi);
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extern int mp_find_ioapic_pin(int ioapic, u32 gsi);
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extern u32 mp_pin_to_gsi(int ioapic, int pin);
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extern int mp_map_gsi_to_irq(u32 gsi, unsigned int flags);
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extern void mp_unmap_irq(int irq);
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extern void __init mp_register_ioapic(int id, u32 address, u32 gsi_base,
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struct ioapic_domain_cfg *cfg);
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extern int mp_irqdomain_map(struct irq_domain *domain, unsigned int virq,
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irq_hw_number_t hwirq);
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extern void mp_irqdomain_unmap(struct irq_domain *domain, unsigned int virq);
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extern int mp_set_gsi_attr(u32 gsi, int trigger, int polarity, int node);
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extern void __init pre_init_apic_IRQ0(void);
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@ -234,6 +236,7 @@ static inline void ioapic_insert_resources(void) { }
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static inline int mp_find_ioapic(u32 gsi) { return 0; }
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static inline u32 mp_pin_to_gsi(int ioapic, int pin) { return UINT_MAX; }
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static inline int mp_map_gsi_to_irq(u32 gsi, unsigned int flags) { return gsi; }
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static inline void mp_unmap_irq(int irq) { }
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static inline int save_ioapic_entries(void)
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{
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@ -467,6 +467,21 @@ static int __add_pin_to_irq_node(struct irq_cfg *cfg, int node, int apic, int pi
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return 0;
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}
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static void __remove_pin_from_irq(struct irq_cfg *cfg, int apic, int pin)
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{
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struct irq_pin_list **last, *entry;
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last = &cfg->irq_2_pin;
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for_each_irq_pin(entry, cfg->irq_2_pin)
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if (entry->apic == apic && entry->pin == pin) {
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*last = entry->next;
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kfree(entry);
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return;
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} else {
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last = &entry->next;
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}
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}
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static void add_pin_to_irq_node(struct irq_cfg *cfg, int node, int apic, int pin)
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{
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if (__add_pin_to_irq_node(cfg, node, apic, pin))
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@ -1119,6 +1134,31 @@ int mp_map_gsi_to_irq(u32 gsi, unsigned int flags)
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return mp_map_pin_to_irq(gsi, idx, ioapic, pin, flags);
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}
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void mp_unmap_irq(int irq)
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{
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struct irq_data *data = irq_get_irq_data(irq);
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struct mp_pin_info *info;
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int ioapic, pin;
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if (!data || !data->domain)
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return;
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ioapic = (int)(long)data->domain->host_data;
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pin = (int)data->hwirq;
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info = mp_pin_info(ioapic, pin);
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mutex_lock(&ioapic_mutex);
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if (--info->count == 0) {
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info->set = 0;
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if (irq < nr_legacy_irqs() &&
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ioapics[ioapic].irqdomain_cfg.type == IOAPIC_DOMAIN_LEGACY)
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mp_irqdomain_unmap(data->domain, irq);
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else
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irq_dispose_mapping(irq);
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}
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mutex_unlock(&ioapic_mutex);
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}
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/*
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* Find a specific PCI IRQ entry.
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* Not an __init, possibly needed by modules
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@ -3878,6 +3918,27 @@ int mp_irqdomain_map(struct irq_domain *domain, unsigned int virq,
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return io_apic_setup_irq_pin(virq, info->node, &attr);
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}
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void mp_irqdomain_unmap(struct irq_domain *domain, unsigned int virq)
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{
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struct irq_data *data = irq_get_irq_data(virq);
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struct irq_cfg *cfg = irq_cfg(virq);
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int ioapic = (int)(long)domain->host_data;
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int pin = (int)data->hwirq;
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/*
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* Skip the timer IRQ if there's a quirk handler installed and if it
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* returns 1:
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*/
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if (apic->multi_timer_check &&
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apic->multi_timer_check(ioapic, virq))
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return;
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ioapic_mask_entry(ioapic, pin);
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__remove_pin_from_irq(cfg, ioapic, pin);
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WARN_ON(cfg->irq_2_pin != NULL);
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arch_teardown_hwirq(virq);
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}
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int mp_set_gsi_attr(u32 gsi, int trigger, int polarity, int node)
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{
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int ret = 0;
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