perf, x86: Fix handle_irq return values
Now that we rely on the number of handled overflows, ensure all handle_irq implementations actually return the right number. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Signed-off-by: Don Zickus <dzickus@redhat.com> Cc: peterz@infradead.org Cc: robert.richter@amd.com Cc: gorcunov@gmail.com Cc: fweisbec@gmail.com Cc: ying.huang@intel.com Cc: ming.m.lin@intel.com Cc: eranian@google.com LKML-Reference: <1283454469-1909-4-git-send-email-dzickus@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -713,6 +713,7 @@ static int intel_pmu_handle_irq(struct pt_regs *regs)
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struct cpu_hw_events *cpuc;
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struct cpu_hw_events *cpuc;
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int bit, loops;
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int bit, loops;
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u64 status;
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u64 status;
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int handled = 0;
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perf_sample_data_init(&data, 0);
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perf_sample_data_init(&data, 0);
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@ -743,12 +744,16 @@ again:
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/*
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/*
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* PEBS overflow sets bit 62 in the global status register
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* PEBS overflow sets bit 62 in the global status register
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*/
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*/
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if (__test_and_clear_bit(62, (unsigned long *)&status))
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if (__test_and_clear_bit(62, (unsigned long *)&status)) {
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handled++;
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x86_pmu.drain_pebs(regs);
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x86_pmu.drain_pebs(regs);
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}
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for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {
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for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {
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struct perf_event *event = cpuc->events[bit];
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struct perf_event *event = cpuc->events[bit];
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handled++;
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if (!test_bit(bit, cpuc->active_mask))
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if (!test_bit(bit, cpuc->active_mask))
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continue;
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continue;
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@ -770,7 +775,7 @@ again:
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done:
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done:
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intel_pmu_enable_all(0);
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intel_pmu_enable_all(0);
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return 1;
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return handled;
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}
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}
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static struct event_constraint *
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static struct event_constraint *
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@ -692,7 +692,7 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)
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inc_irq_stat(apic_perf_irqs);
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inc_irq_stat(apic_perf_irqs);
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}
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}
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return handled > 0;
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return handled;
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}
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}
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/*
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/*
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