ARM: tegra: paz00: add support serial port on JP1
UART-A is connected to JP1 and used by the bootloader for debugging output while UART-D is connected to the mini-pcie expansion slot. Signed-off-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
parent
bc24ed4f21
commit
de7164db70
|
@ -45,6 +45,16 @@
|
|||
|
||||
static struct plat_serial8250_port debug_uart_platform_data[] = {
|
||||
{
|
||||
/* serial port on JP1 */
|
||||
.membase = IO_ADDRESS(TEGRA_UARTA_BASE),
|
||||
.mapbase = TEGRA_UARTA_BASE,
|
||||
.irq = INT_UARTA,
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.iotype = UPIO_MEM,
|
||||
.regshift = 2,
|
||||
.uartclk = 216000000,
|
||||
}, {
|
||||
/* serial port on mini-pcie */
|
||||
.membase = IO_ADDRESS(TEGRA_UARTD_BASE),
|
||||
.mapbase = TEGRA_UARTD_BASE,
|
||||
.irq = INT_UARTD,
|
||||
|
@ -94,6 +104,7 @@ static void __init tegra_paz00_fixup(struct machine_desc *desc,
|
|||
|
||||
static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = {
|
||||
/* name parent rate enabled */
|
||||
{ "uarta", "pll_p", 216000000, true },
|
||||
{ "uartd", "pll_p", 216000000, true },
|
||||
{ NULL, NULL, 0, 0},
|
||||
};
|
||||
|
|
Loading…
Reference in New Issue