Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq update from Thomas Gleixner: "A small set of updats/fixes for the irq subsystem: - Allow GICv3 interrupts to be configured as wake-up sources to enable wakeup from suspend - Make the error handling of the STM32 irqchip init function work - A set of small cleanups and improvements" * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip/gic-v3: Allow interrupt to be configured as wake-up sources irqchip/tango: Set irq handler and data in one go dt-bindings: irqchip: renesas-irqc: Document r8a774a1 support irqchip/s3c24xx: Remove unneeded comparison of unsigned long to 0 irqchip/stm32: Fix init error handling irqchip/bcm7038-l1: Hide cpu offline callback when building for !SMP
This commit is contained in:
commit
de3750351c
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@ -13,6 +13,7 @@ Required properties:
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- "renesas,irqc-r8a7792" (R-Car V2H)
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- "renesas,irqc-r8a7792" (R-Car V2H)
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- "renesas,irqc-r8a7793" (R-Car M2-N)
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- "renesas,irqc-r8a7793" (R-Car M2-N)
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- "renesas,irqc-r8a7794" (R-Car E2)
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- "renesas,irqc-r8a7794" (R-Car E2)
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- "renesas,intc-ex-r8a774a1" (RZ/G2M)
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- "renesas,intc-ex-r8a7795" (R-Car H3)
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- "renesas,intc-ex-r8a7795" (R-Car H3)
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- "renesas,intc-ex-r8a7796" (R-Car M3-W)
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- "renesas,intc-ex-r8a7796" (R-Car M3-W)
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- "renesas,intc-ex-r8a77965" (R-Car M3-N)
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- "renesas,intc-ex-r8a77965" (R-Car M3-N)
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@ -217,6 +217,7 @@ static int bcm7038_l1_set_affinity(struct irq_data *d,
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return 0;
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return 0;
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}
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}
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#ifdef CONFIG_SMP
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static void bcm7038_l1_cpu_offline(struct irq_data *d)
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static void bcm7038_l1_cpu_offline(struct irq_data *d)
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{
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{
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struct cpumask *mask = irq_data_get_affinity_mask(d);
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struct cpumask *mask = irq_data_get_affinity_mask(d);
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@ -241,6 +242,7 @@ static void bcm7038_l1_cpu_offline(struct irq_data *d)
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}
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}
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irq_set_affinity_locked(d, &new_affinity, false);
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irq_set_affinity_locked(d, &new_affinity, false);
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}
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}
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#endif
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static int __init bcm7038_l1_init_one(struct device_node *dn,
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static int __init bcm7038_l1_init_one(struct device_node *dn,
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unsigned int idx,
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unsigned int idx,
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@ -293,7 +295,9 @@ static struct irq_chip bcm7038_l1_irq_chip = {
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.irq_mask = bcm7038_l1_mask,
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.irq_mask = bcm7038_l1_mask,
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.irq_unmask = bcm7038_l1_unmask,
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.irq_unmask = bcm7038_l1_unmask,
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.irq_set_affinity = bcm7038_l1_set_affinity,
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.irq_set_affinity = bcm7038_l1_set_affinity,
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#ifdef CONFIG_SMP
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.irq_cpu_offline = bcm7038_l1_cpu_offline,
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.irq_cpu_offline = bcm7038_l1_cpu_offline,
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#endif
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};
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};
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static int bcm7038_l1_map(struct irq_domain *d, unsigned int virq,
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static int bcm7038_l1_map(struct irq_domain *d, unsigned int virq,
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@ -861,7 +861,9 @@ static struct irq_chip gic_chip = {
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.irq_set_affinity = gic_set_affinity,
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.irq_set_affinity = gic_set_affinity,
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.irq_get_irqchip_state = gic_irq_get_irqchip_state,
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.irq_get_irqchip_state = gic_irq_get_irqchip_state,
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.irq_set_irqchip_state = gic_irq_set_irqchip_state,
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.irq_set_irqchip_state = gic_irq_set_irqchip_state,
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.flags = IRQCHIP_SET_TYPE_MASKED,
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.flags = IRQCHIP_SET_TYPE_MASKED |
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IRQCHIP_SKIP_SET_WAKE |
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IRQCHIP_MASK_ON_SUSPEND,
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};
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};
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static struct irq_chip gic_eoimode1_chip = {
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static struct irq_chip gic_eoimode1_chip = {
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@ -874,7 +876,9 @@ static struct irq_chip gic_eoimode1_chip = {
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.irq_get_irqchip_state = gic_irq_get_irqchip_state,
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.irq_get_irqchip_state = gic_irq_get_irqchip_state,
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.irq_set_irqchip_state = gic_irq_set_irqchip_state,
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.irq_set_irqchip_state = gic_irq_set_irqchip_state,
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.irq_set_vcpu_affinity = gic_irq_set_vcpu_affinity,
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.irq_set_vcpu_affinity = gic_irq_set_vcpu_affinity,
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.flags = IRQCHIP_SET_TYPE_MASKED,
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.flags = IRQCHIP_SET_TYPE_MASKED |
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IRQCHIP_SKIP_SET_WAKE |
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IRQCHIP_MASK_ON_SUSPEND,
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};
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};
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#define GIC_ID_NR (1U << GICD_TYPER_ID_BITS(gic_data.rdists.gicd_typer))
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#define GIC_ID_NR (1U << GICD_TYPER_ID_BITS(gic_data.rdists.gicd_typer))
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@ -250,7 +250,7 @@ static int s3c_irqext0_type(struct irq_data *data, unsigned int type)
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void __iomem *gpcon_reg;
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void __iomem *gpcon_reg;
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unsigned long gpcon_offset, extint_offset;
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unsigned long gpcon_offset, extint_offset;
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if ((data->hwirq >= 0) && (data->hwirq <= 3)) {
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if (data->hwirq <= 3) {
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gpcon_reg = S3C2410_GPFCON;
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gpcon_reg = S3C2410_GPFCON;
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extint_reg = S3C24XX_EXTINT0;
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extint_reg = S3C24XX_EXTINT0;
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gpcon_offset = (data->hwirq) * 2;
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gpcon_offset = (data->hwirq) * 2;
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@ -603,17 +603,24 @@ stm32_exti_host_data *stm32_exti_host_init(const struct stm32_exti_drv_data *dd,
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sizeof(struct stm32_exti_chip_data),
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sizeof(struct stm32_exti_chip_data),
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GFP_KERNEL);
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GFP_KERNEL);
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if (!host_data->chips_data)
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if (!host_data->chips_data)
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return NULL;
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goto free_host_data;
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host_data->base = of_iomap(node, 0);
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host_data->base = of_iomap(node, 0);
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if (!host_data->base) {
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if (!host_data->base) {
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pr_err("%pOF: Unable to map registers\n", node);
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pr_err("%pOF: Unable to map registers\n", node);
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return NULL;
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goto free_chips_data;
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}
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}
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stm32_host_data = host_data;
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stm32_host_data = host_data;
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return host_data;
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return host_data;
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free_chips_data:
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kfree(host_data->chips_data);
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free_host_data:
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kfree(host_data);
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return NULL;
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}
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}
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static struct
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static struct
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struct irq_domain *domain;
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struct irq_domain *domain;
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host_data = stm32_exti_host_init(drv_data, node);
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host_data = stm32_exti_host_init(drv_data, node);
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if (!host_data) {
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if (!host_data)
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ret = -ENOMEM;
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return -ENOMEM;
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goto out_free_mem;
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}
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domain = irq_domain_add_linear(node, drv_data->bank_nr * IRQS_PER_BANK,
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domain = irq_domain_add_linear(node, drv_data->bank_nr * IRQS_PER_BANK,
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&irq_exti_domain_ops, NULL);
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&irq_exti_domain_ops, NULL);
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@ -725,7 +730,6 @@ out_free_domain:
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irq_domain_remove(domain);
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irq_domain_remove(domain);
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out_unmap:
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out_unmap:
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iounmap(host_data->base);
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iounmap(host_data->base);
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out_free_mem:
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kfree(host_data->chips_data);
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kfree(host_data->chips_data);
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kfree(host_data);
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kfree(host_data);
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return ret;
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return ret;
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@ -752,10 +756,8 @@ __init stm32_exti_hierarchy_init(const struct stm32_exti_drv_data *drv_data,
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}
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}
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host_data = stm32_exti_host_init(drv_data, node);
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host_data = stm32_exti_host_init(drv_data, node);
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if (!host_data) {
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if (!host_data)
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ret = -ENOMEM;
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return -ENOMEM;
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goto out_free_mem;
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}
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for (i = 0; i < drv_data->bank_nr; i++)
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for (i = 0; i < drv_data->bank_nr; i++)
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stm32_exti_chip_init(host_data, i, node);
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stm32_exti_chip_init(host_data, i, node);
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out_unmap:
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out_unmap:
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iounmap(host_data->base);
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iounmap(host_data->base);
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out_free_mem:
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kfree(host_data->chips_data);
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kfree(host_data->chips_data);
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kfree(host_data);
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kfree(host_data);
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return ret;
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return ret;
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@ -205,8 +205,7 @@ static int __init tangox_irq_init(void __iomem *base, struct resource *baseres,
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tangox_irq_domain_init(dom);
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tangox_irq_domain_init(dom);
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irq_set_chained_handler(irq, tangox_irq_handler);
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irq_set_chained_handler_and_data(irq, tangox_irq_handler, dom);
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irq_set_handler_data(irq, dom);
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return 0;
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return 0;
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}
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}
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