drm/panel: p079zca: Support Innolux P097PFG panel
Support Innolux P097PFG 9.7" 1536x2048 TFT LCD panel, it reuse the Innolux P079ZCA panel driver. Changes in v2: - None Changes in v3: - None Changes in v4: - None Changes in v5: - Document source of init-commands - 4 lanes per DSI interface Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180702102721.3546-5-heiko@sntech.de
This commit is contained in:
Lin Huang
Thierry Reding
parent
731edd4ce5
commit
de04a462fd
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@ -20,6 +20,15 @@
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#include <video/mipi_display.h>
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struct panel_init_cmd {
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size_t len;
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const char *data;
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};
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#define _INIT_CMD(...) { \
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.len = sizeof((char[]){__VA_ARGS__}), \
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.data = (char[]){__VA_ARGS__} }
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struct panel_desc {
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const struct drm_display_mode *mode;
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unsigned int bpc;
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@ -30,6 +39,7 @@ struct panel_desc {
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unsigned long flags;
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enum mipi_dsi_pixel_format format;
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const struct panel_init_cmd *init_cmds;
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unsigned int lanes;
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const char * const *supply_names;
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unsigned int num_supplies;
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@ -124,13 +134,43 @@ static int innolux_panel_prepare(struct drm_panel *panel)
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if (err < 0)
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return err;
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/* T2: 15ms - 1000ms */
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usleep_range(15000, 16000);
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/* p079zca: t2 (20ms), p097pfg: t4 (15ms) */
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usleep_range(20000, 21000);
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gpiod_set_value_cansleep(innolux->enable_gpio, 1);
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/* T4: 15ms - 1000ms */
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usleep_range(15000, 16000);
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/* p079zca: t4, p097pfg: t5 */
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usleep_range(20000, 21000);
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if (innolux->desc->init_cmds) {
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const struct panel_init_cmd *cmds =
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innolux->desc->init_cmds;
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unsigned int i;
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for (i = 0; cmds[i].len != 0; i++) {
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const struct panel_init_cmd *cmd = &cmds[i];
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err = mipi_dsi_generic_write(innolux->link, cmd->data,
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cmd->len);
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if (err < 0) {
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dev_err(panel->dev,
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"failed to write command %u\n", i);
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goto poweroff;
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}
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/*
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* Included by random guessing, because without this
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* (or at least, some delay), the panel sometimes
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* didn't appear to pick up the command sequence.
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*/
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err = mipi_dsi_dcs_nop(innolux->link);
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if (err < 0) {
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dev_err(panel->dev,
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"failed to send DCS nop: %d\n", err);
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goto poweroff;
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}
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}
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}
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err = mipi_dsi_dcs_exit_sleep_mode(innolux->link);
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if (err < 0) {
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@ -216,6 +256,155 @@ static const struct panel_desc innolux_p079zca_panel_desc = {
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.power_down_delay = 80, /* T8: 80ms - 1000ms */
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};
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static const char * const innolux_p097pfg_supply_names[] = {
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"avdd",
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"avee",
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};
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static const struct drm_display_mode innolux_p097pfg_mode = {
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.clock = 229000,
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.hdisplay = 1536,
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.hsync_start = 1536 + 100,
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.hsync_end = 1536 + 100 + 24,
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.htotal = 1536 + 100 + 24 + 100,
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.vdisplay = 2048,
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.vsync_start = 2048 + 100,
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.vsync_end = 2048 + 100 + 2,
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.vtotal = 2048 + 100 + 2 + 18,
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.vrefresh = 60,
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};
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/*
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* Display manufacturer failed to provide init sequencing according to
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* https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/892065/
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* so the init sequence stems from a register dump of a working panel.
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*/
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static const struct panel_init_cmd innolux_p097pfg_init_cmds[] = {
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/* page 0 */
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_INIT_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00),
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_INIT_CMD(0xB1, 0xE8, 0x11),
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_INIT_CMD(0xB2, 0x25, 0x02),
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_INIT_CMD(0xB5, 0x08, 0x00),
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_INIT_CMD(0xBC, 0x0F, 0x00),
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_INIT_CMD(0xB8, 0x03, 0x06, 0x00, 0x00),
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_INIT_CMD(0xBD, 0x01, 0x90, 0x14, 0x14),
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_INIT_CMD(0x6F, 0x01),
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_INIT_CMD(0xC0, 0x03),
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_INIT_CMD(0x6F, 0x02),
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_INIT_CMD(0xC1, 0x0D),
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_INIT_CMD(0xD9, 0x01, 0x09, 0x70),
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_INIT_CMD(0xC5, 0x12, 0x21, 0x00),
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_INIT_CMD(0xBB, 0x93, 0x93),
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/* page 1 */
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_INIT_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x01),
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_INIT_CMD(0xB3, 0x3C, 0x3C),
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_INIT_CMD(0xB4, 0x0F, 0x0F),
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_INIT_CMD(0xB9, 0x45, 0x45),
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_INIT_CMD(0xBA, 0x14, 0x14),
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_INIT_CMD(0xCA, 0x02),
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_INIT_CMD(0xCE, 0x04),
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_INIT_CMD(0xC3, 0x9B, 0x9B),
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_INIT_CMD(0xD8, 0xC0, 0x03),
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_INIT_CMD(0xBC, 0x82, 0x01),
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_INIT_CMD(0xBD, 0x9E, 0x01),
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/* page 2 */
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_INIT_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x02),
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_INIT_CMD(0xB0, 0x82),
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_INIT_CMD(0xD1, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x82, 0x00, 0xA5,
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0x00, 0xC1, 0x00, 0xEA, 0x01, 0x0D, 0x01, 0x40),
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_INIT_CMD(0xD2, 0x01, 0x6A, 0x01, 0xA8, 0x01, 0xDC, 0x02, 0x29,
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0x02, 0x67, 0x02, 0x68, 0x02, 0xA8, 0x02, 0xF0),
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_INIT_CMD(0xD3, 0x03, 0x19, 0x03, 0x49, 0x03, 0x67, 0x03, 0x8C,
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0x03, 0xA6, 0x03, 0xC7, 0x03, 0xDE, 0x03, 0xEC),
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_INIT_CMD(0xD4, 0x03, 0xFF, 0x03, 0xFF),
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_INIT_CMD(0xE0, 0x00, 0x00, 0x00, 0x86, 0x00, 0xC5, 0x00, 0xE5,
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0x00, 0xFF, 0x01, 0x26, 0x01, 0x45, 0x01, 0x75),
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_INIT_CMD(0xE1, 0x01, 0x9C, 0x01, 0xD5, 0x02, 0x05, 0x02, 0x4D,
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0x02, 0x86, 0x02, 0x87, 0x02, 0xC3, 0x03, 0x03),
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_INIT_CMD(0xE2, 0x03, 0x2A, 0x03, 0x56, 0x03, 0x72, 0x03, 0x94,
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0x03, 0xAC, 0x03, 0xCB, 0x03, 0xE0, 0x03, 0xED),
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_INIT_CMD(0xE3, 0x03, 0xFF, 0x03, 0xFF),
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/* page 3 */
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_INIT_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x03),
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_INIT_CMD(0xB0, 0x00, 0x00, 0x00, 0x00),
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_INIT_CMD(0xB1, 0x00, 0x00, 0x00, 0x00),
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_INIT_CMD(0xB2, 0x00, 0x00, 0x06, 0x04, 0x01, 0x40, 0x85),
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_INIT_CMD(0xB3, 0x10, 0x07, 0xFC, 0x04, 0x01, 0x40, 0x80),
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_INIT_CMD(0xB6, 0xF0, 0x08, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01,
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0x40, 0x80),
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_INIT_CMD(0xBA, 0xC5, 0x07, 0x00, 0x04, 0x11, 0x25, 0x8C),
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_INIT_CMD(0xBB, 0xC5, 0x07, 0x00, 0x03, 0x11, 0x25, 0x8C),
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_INIT_CMD(0xC0, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x80, 0x80),
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_INIT_CMD(0xC1, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x80, 0x80),
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_INIT_CMD(0xC4, 0x00, 0x00),
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_INIT_CMD(0xEF, 0x41),
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/* page 4 */
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_INIT_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x04),
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_INIT_CMD(0xEC, 0x4C),
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/* page 5 */
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_INIT_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x05),
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_INIT_CMD(0xB0, 0x13, 0x03, 0x03, 0x01),
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_INIT_CMD(0xB1, 0x30, 0x00),
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_INIT_CMD(0xB2, 0x02, 0x02, 0x00),
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_INIT_CMD(0xB3, 0x82, 0x23, 0x82, 0x9D),
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_INIT_CMD(0xB4, 0xC5, 0x75, 0x24, 0x57),
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_INIT_CMD(0xB5, 0x00, 0xD4, 0x72, 0x11, 0x11, 0xAB, 0x0A),
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_INIT_CMD(0xB6, 0x00, 0x00, 0xD5, 0x72, 0x24, 0x56),
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_INIT_CMD(0xB7, 0x5C, 0xDC, 0x5C, 0x5C),
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_INIT_CMD(0xB9, 0x0C, 0x00, 0x00, 0x01, 0x00),
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_INIT_CMD(0xC0, 0x75, 0x11, 0x11, 0x54, 0x05),
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_INIT_CMD(0xC6, 0x00, 0x00, 0x00, 0x00),
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_INIT_CMD(0xD0, 0x00, 0x48, 0x08, 0x00, 0x00),
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_INIT_CMD(0xD1, 0x00, 0x48, 0x09, 0x00, 0x00),
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/* page 6 */
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_INIT_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x06),
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_INIT_CMD(0xB0, 0x02, 0x32, 0x32, 0x08, 0x2F),
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_INIT_CMD(0xB1, 0x2E, 0x15, 0x14, 0x13, 0x12),
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_INIT_CMD(0xB2, 0x11, 0x10, 0x00, 0x3D, 0x3D),
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_INIT_CMD(0xB3, 0x3D, 0x3D, 0x3D, 0x3D, 0x3D),
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_INIT_CMD(0xB4, 0x3D, 0x32),
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_INIT_CMD(0xB5, 0x03, 0x32, 0x32, 0x09, 0x2F),
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_INIT_CMD(0xB6, 0x2E, 0x1B, 0x1A, 0x19, 0x18),
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_INIT_CMD(0xB7, 0x17, 0x16, 0x01, 0x3D, 0x3D),
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_INIT_CMD(0xB8, 0x3D, 0x3D, 0x3D, 0x3D, 0x3D),
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_INIT_CMD(0xB9, 0x3D, 0x32),
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_INIT_CMD(0xC0, 0x01, 0x32, 0x32, 0x09, 0x2F),
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_INIT_CMD(0xC1, 0x2E, 0x1A, 0x1B, 0x16, 0x17),
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_INIT_CMD(0xC2, 0x18, 0x19, 0x03, 0x3D, 0x3D),
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_INIT_CMD(0xC3, 0x3D, 0x3D, 0x3D, 0x3D, 0x3D),
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_INIT_CMD(0xC4, 0x3D, 0x32),
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_INIT_CMD(0xC5, 0x00, 0x32, 0x32, 0x08, 0x2F),
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_INIT_CMD(0xC6, 0x2E, 0x14, 0x15, 0x10, 0x11),
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_INIT_CMD(0xC7, 0x12, 0x13, 0x02, 0x3D, 0x3D),
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_INIT_CMD(0xC8, 0x3D, 0x3D, 0x3D, 0x3D, 0x3D),
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_INIT_CMD(0xC9, 0x3D, 0x32),
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{},
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};
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static const struct panel_desc innolux_p097pfg_panel_desc = {
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.mode = &innolux_p097pfg_mode,
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.bpc = 8,
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.size = {
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.width = 147,
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.height = 196,
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},
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.flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
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MIPI_DSI_MODE_LPM,
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.format = MIPI_DSI_FMT_RGB888,
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.init_cmds = innolux_p097pfg_init_cmds,
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.lanes = 4,
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.supply_names = innolux_p097pfg_supply_names,
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.num_supplies = ARRAY_SIZE(innolux_p097pfg_supply_names),
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.sleep_mode_delay = 100, /* T15 */
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};
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static int innolux_panel_get_modes(struct drm_panel *panel)
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{
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struct innolux_panel *innolux = to_innolux_panel(panel);
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@ -254,6 +443,9 @@ static const struct of_device_id innolux_of_match[] = {
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{ .compatible = "innolux,p079zca",
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.data = &innolux_p079zca_panel_desc
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},
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{ .compatible = "innolux,p097pfg",
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.data = &innolux_p097pfg_panel_desc
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},
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{ }
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};
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MODULE_DEVICE_TABLE(of, innolux_of_match);
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