mtd: rawnand: sunxi: Remove support for GPIO-based Ready/Busy polling
None of the existing platforms connect the R/B pin to a GPIO (they all use one of the dedicated R/B pin). Anyway, if we ever get short of native R/B pins, it's probably better to fallback to STATUS reg polling than trying to poll a GPIO. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org>
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@ -22,8 +22,6 @@ Optional properties:
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- reset : phandle + reset specifier pair
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- reset : phandle + reset specifier pair
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- reset-names : must contain "ahb"
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- reset-names : must contain "ahb"
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- allwinner,rb : shall contain the native Ready/Busy ids.
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- allwinner,rb : shall contain the native Ready/Busy ids.
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or
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- rb-gpios : shall contain the gpios used as R/B pins.
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- nand-ecc-mode : one of the supported ECC modes ("hw", "soft", "soft_bch" or
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- nand-ecc-mode : one of the supported ECC modes ("hw", "soft", "soft_bch" or
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"none")
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"none")
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@ -165,49 +165,16 @@
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#define NFC_MAX_CS 7
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#define NFC_MAX_CS 7
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/*
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* Ready/Busy detection type: describes the Ready/Busy detection modes
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*
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* @RB_NONE: no external detection available, rely on STATUS command
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* and software timeouts
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* @RB_NATIVE: use sunxi NAND controller Ready/Busy support. The Ready/Busy
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* pin of the NAND flash chip must be connected to one of the
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* native NAND R/B pins (those which can be muxed to the NAND
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* Controller)
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* @RB_GPIO: use a simple GPIO to handle Ready/Busy status. The Ready/Busy
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* pin of the NAND flash chip must be connected to a GPIO capable
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* pin.
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*/
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enum sunxi_nand_rb_type {
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RB_NONE,
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RB_NATIVE,
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RB_GPIO,
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};
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/*
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* Ready/Busy structure: stores information related to Ready/Busy detection
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*
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* @type: the Ready/Busy detection mode
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* @info: information related to the R/B detection mode. Either a gpio
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* id or a native R/B id (those supported by the NAND controller).
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*/
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struct sunxi_nand_rb {
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enum sunxi_nand_rb_type type;
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union {
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int gpio;
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int nativeid;
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} info;
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};
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/*
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/*
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* Chip Select structure: stores information related to NAND Chip Select
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* Chip Select structure: stores information related to NAND Chip Select
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*
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*
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* @cs: the NAND CS id used to communicate with a NAND Chip
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* @cs: the NAND CS id used to communicate with a NAND Chip
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* @rb: the Ready/Busy description
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* @rb: the Ready/Busy pin ID. -1 means no R/B pin connected to the
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* NFC
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*/
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*/
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struct sunxi_nand_chip_sel {
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struct sunxi_nand_chip_sel {
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u8 cs;
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u8 cs;
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struct sunxi_nand_rb rb;
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s8 rb;
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};
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};
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/*
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/*
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@ -440,30 +407,19 @@ static int sunxi_nfc_dev_ready(struct mtd_info *mtd)
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struct nand_chip *nand = mtd_to_nand(mtd);
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struct nand_chip *nand = mtd_to_nand(mtd);
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struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(nand);
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struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(nand);
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struct sunxi_nfc *nfc = to_sunxi_nfc(sunxi_nand->nand.controller);
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struct sunxi_nfc *nfc = to_sunxi_nfc(sunxi_nand->nand.controller);
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struct sunxi_nand_rb *rb;
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u32 mask;
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int ret;
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if (sunxi_nand->selected < 0)
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if (sunxi_nand->selected < 0)
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return 0;
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return 0;
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rb = &sunxi_nand->sels[sunxi_nand->selected].rb;
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if (sunxi_nand->sels[sunxi_nand->selected].rb < 0) {
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switch (rb->type) {
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case RB_NATIVE:
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ret = !!(readl(nfc->regs + NFC_REG_ST) &
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NFC_RB_STATE(rb->info.nativeid));
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break;
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case RB_GPIO:
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ret = gpio_get_value(rb->info.gpio);
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break;
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case RB_NONE:
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default:
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ret = 0;
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dev_err(nfc->dev, "cannot check R/B NAND status!\n");
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dev_err(nfc->dev, "cannot check R/B NAND status!\n");
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break;
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return 0;
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}
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}
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return ret;
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mask = NFC_RB_STATE(sunxi_nand->sels[sunxi_nand->selected].rb);
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return !!(readl(nfc->regs + NFC_REG_ST) & mask);
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}
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}
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static void sunxi_nfc_select_chip(struct mtd_info *mtd, int chip)
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static void sunxi_nfc_select_chip(struct mtd_info *mtd, int chip)
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@ -488,12 +444,11 @@ static void sunxi_nfc_select_chip(struct mtd_info *mtd, int chip)
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ctl |= NFC_CE_SEL(sel->cs) | NFC_EN |
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ctl |= NFC_CE_SEL(sel->cs) | NFC_EN |
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NFC_PAGE_SHIFT(nand->page_shift);
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NFC_PAGE_SHIFT(nand->page_shift);
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if (sel->rb.type == RB_NONE) {
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if (sel->rb < 0) {
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nand->dev_ready = NULL;
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nand->dev_ready = NULL;
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} else {
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} else {
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nand->dev_ready = sunxi_nfc_dev_ready;
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nand->dev_ready = sunxi_nfc_dev_ready;
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if (sel->rb.type == RB_NATIVE)
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ctl |= NFC_RB_SEL(sel->rb);
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ctl |= NFC_RB_SEL(sel->rb.info.nativeid);
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}
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}
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writel(mtd->writesize, nfc->regs + NFC_REG_SPARE_AREA);
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writel(mtd->writesize, nfc->regs + NFC_REG_SPARE_AREA);
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@ -1946,26 +1901,10 @@ static int sunxi_nand_chip_init(struct device *dev, struct sunxi_nfc *nfc,
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chip->sels[i].cs = tmp;
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chip->sels[i].cs = tmp;
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if (!of_property_read_u32_index(np, "allwinner,rb", i, &tmp) &&
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if (!of_property_read_u32_index(np, "allwinner,rb", i, &tmp) &&
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tmp < 2) {
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tmp < 2)
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chip->sels[i].rb.type = RB_NATIVE;
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chip->sels[i].rb = tmp;
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chip->sels[i].rb.info.nativeid = tmp;
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else
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} else {
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chip->sels[i].rb = -1;
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ret = of_get_named_gpio(np, "rb-gpios", i);
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if (ret >= 0) {
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tmp = ret;
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chip->sels[i].rb.type = RB_GPIO;
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chip->sels[i].rb.info.gpio = tmp;
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ret = devm_gpio_request(dev, tmp, "nand-rb");
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if (ret)
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return ret;
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ret = gpio_direction_input(tmp);
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if (ret)
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return ret;
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} else {
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chip->sels[i].rb.type = RB_NONE;
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}
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}
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}
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}
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nand = &chip->nand;
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nand = &chip->nand;
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