[ARM] 4830/1: Add support for the CLK_POUT pin on PXA3xx CPUs
Expose control of the PXA3xx 13MHz CLK_POUT pin via the clock API Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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184dd48102
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dcc88a170c
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@ -156,6 +156,21 @@ static const struct clkops clk_pxa3xx_hsio_ops = {
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.getrate = clk_pxa3xx_hsio_getrate,
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};
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static void clk_pout_enable(struct clk *clk)
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{
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OSCC |= OSCC_PEN;
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}
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static void clk_pout_disable(struct clk *clk)
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{
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OSCC &= ~OSCC_PEN;
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}
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static const struct clkops clk_pout_ops = {
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.enable = clk_pout_enable,
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.disable = clk_pout_disable,
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};
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#define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev) \
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{ \
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.name = _name, \
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@ -175,6 +190,13 @@ static const struct clkops clk_pxa3xx_hsio_ops = {
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}
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static struct clk pxa3xx_clks[] = {
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{
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.name = "CLK_POUT",
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.ops = &clk_pout_ops,
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.rate = 13000000,
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.delay = 70,
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},
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PXA3xx_CK("LCDCLK", LCD, &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev),
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PXA3xx_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_ops, NULL),
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@ -12,6 +12,15 @@
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#ifndef __ASM_ARCH_PXA3XX_REGS_H
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#define __ASM_ARCH_PXA3XX_REGS_H
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/*
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* Oscillator Configuration Register (OSCC)
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*/
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#define OSCC __REG(0x41350000) /* Oscillator Configuration Register */
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#define OSCC_PEN (1 << 11) /* 13MHz POUT */
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/*
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* Service Power Management Unit (MPMU)
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*/
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