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genirq: Allow irq chips to mark themself oneshot safe 

Some interrupt chips like MSI are oneshot safe by implementation. For
those interrupts we can avoid the mask/unmask sequence for threaded
interrupt handlers.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/alpine.LFD.2.02.1207132056540.32033@ionos
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Avi Kivity <avi@redhat.com>
Cc: Marcelo Tosatti <mtosatti@redhat.com>
Cc: Jan Kiszka <jan.kiszka@web.de>
This commit is contained in:
Thomas Gleixner 2012-07-13 19:29:45 +02:00
parent e2b34e311b
commit dc9b229a58
2 changed files with 15 additions and 1 deletions
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1
include/linux/irq.h
View File

@ -349,6 +349,7 @@ enum {
IRQCHIP_MASK_ON_SUSPEND = (1 << 2), IRQCHIP_MASK_ON_SUSPEND = (1 << 2),
IRQCHIP_ONOFFLINE_ENABLED = (1 << 3), IRQCHIP_ONOFFLINE_ENABLED = (1 << 3),
IRQCHIP_SKIP_SET_WAKE = (1 << 4), IRQCHIP_SKIP_SET_WAKE = (1 << 4),
IRQCHIP_ONESHOT_SAFE = (1 << 5),
}; };
/* This include will go away once we isolated irq_desc usage to core code */ /* This include will go away once we isolated irq_desc usage to core code */

15
kernel/irq/manage.c
View File

@ -959,6 +959,18 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
goto out_thread; goto out_thread;
} }
/*
* Drivers are often written to work w/o knowledge about the
* underlying irq chip implementation, so a request for a
* threaded irq without a primary hard irq context handler
* requires the ONESHOT flag to be set. Some irq chips like
* MSI based interrupts are per se one shot safe. Check the
* chip flags, so we can avoid the unmask dance at the end of
* the threaded handler for those.
*/
if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
new->flags &= ~IRQF_ONESHOT;
/* /*
* The following block of code has to be executed atomically * The following block of code has to be executed atomically
*/ */
@ -1033,7 +1045,8 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
*/ */
new->thread_mask = 1 << ffz(thread_mask); new->thread_mask = 1 << ffz(thread_mask);
} else if (new->handler == irq_default_primary_handler) { } else if (new->handler == irq_default_primary_handler &&
!(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) {
/* /*
* The interrupt was requested with handler = NULL, so * The interrupt was requested with handler = NULL, so
* we use the default primary handler for it. But it * we use the default primary handler for it. But it