genirq: Allow irq chips to mark themself oneshot safe
Some interrupt chips like MSI are oneshot safe by implementation. For those interrupts we can avoid the mask/unmask sequence for threaded interrupt handlers. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/alpine.LFD.2.02.1207132056540.32033@ionos Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Avi Kivity <avi@redhat.com> Cc: Marcelo Tosatti <mtosatti@redhat.com> Cc: Jan Kiszka <jan.kiszka@web.de>
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@ -349,6 +349,7 @@ enum {
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IRQCHIP_MASK_ON_SUSPEND = (1 << 2),
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IRQCHIP_ONOFFLINE_ENABLED = (1 << 3),
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IRQCHIP_SKIP_SET_WAKE = (1 << 4),
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IRQCHIP_ONESHOT_SAFE = (1 << 5),
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};
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/* This include will go away once we isolated irq_desc usage to core code */
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@ -959,6 +959,18 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
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goto out_thread;
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}
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/*
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* Drivers are often written to work w/o knowledge about the
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* underlying irq chip implementation, so a request for a
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* threaded irq without a primary hard irq context handler
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* requires the ONESHOT flag to be set. Some irq chips like
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* MSI based interrupts are per se one shot safe. Check the
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* chip flags, so we can avoid the unmask dance at the end of
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* the threaded handler for those.
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*/
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if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
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new->flags &= ~IRQF_ONESHOT;
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/*
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* The following block of code has to be executed atomically
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*/
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@ -1033,7 +1045,8 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
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*/
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new->thread_mask = 1 << ffz(thread_mask);
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} else if (new->handler == irq_default_primary_handler) {
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} else if (new->handler == irq_default_primary_handler &&
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!(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) {
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/*
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* The interrupt was requested with handler = NULL, so
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* we use the default primary handler for it. But it
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