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phy: micrel: Add definitions for common Micrel PHY registers 

Add defines for common Micrel PHY setups so that other platforms
can use them. Update imx61 and sama5 hardware to use the micrel_phy.h
PHY defines.

Also add support for the KSZ9021RLRN PHY.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: David S. Miller <davem@davemloft.net>
CC: Andrew Victor <linux@maxim.org.za>
CC: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Cc: netdev@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Dinh Nguyen 2013-08-13 09:59:00 -05:00 committed by Shawn Guo
parent 7e463b7c1b
commit dc76a1adfa
3 changed files with 20 additions and 16 deletions
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17
arch/arm/mach-at91/board-dt-sama5.c
View File

@ -42,20 +42,15 @@ static int ksz9021rn_phy_fixup(struct phy_device *phy)
{ {
int value; int value;
#define GMII_RCCPSR 260
#define GMII_RRDPSR 261
#define GMII_ERCR 11
#define GMII_ERDWR 12
/* Set delay values */ /* Set delay values */
value = GMII_RCCPSR | 0x8000; value = MICREL_KSZ9021_RGMII_CLK_CTRL_PAD_SCEW | 0x8000;
phy_write(phy, GMII_ERCR, value); phy_write(phy, MICREL_KSZ9021_EXTREG_CTRL, value);
value = 0xF2F4; value = 0xF2F4;
phy_write(phy, GMII_ERDWR, value); phy_write(phy, MICREL_KSZ9021_EXTREG_DATA_WRITE, value);
value = GMII_RRDPSR | 0x8000; value = MICREL_KSZ9021_RGMII_RX_DATA_PAD_SCEW | 0x8000;
phy_write(phy, GMII_ERCR, value); phy_write(phy, MICREL_KSZ9021_EXTREG_CTRL, value);
value = 0x2222; value = 0x2222;
phy_write(phy, GMII_ERDWR, value); phy_write(phy, MICREL_KSZ9021_EXTREG_DATA_WRITE, value);
return 0; return 0;
} }

13
arch/arm/mach-imx/mach-imx6q.c
View File

@ -103,13 +103,16 @@ static int ksz9021rn_phy_fixup(struct phy_device *phydev)
{ {
if (IS_BUILTIN(CONFIG_PHYLIB)) { if (IS_BUILTIN(CONFIG_PHYLIB)) {
/* min rx data delay */ /* min rx data delay */
phy_write(phydev, 0x0b, 0x8105); phy_write(phydev, MICREL_KSZ9021_EXTREG_CTRL,
phy_write(phydev, 0x0c, 0x0000); 0x8000 | MICREL_KSZ9021_RGMII_RX_DATA_PAD_SCEW);
phy_write(phydev, MICREL_KSZ9021_EXTREG_DATA_WRITE, 0x0000);
/* max rx/tx clock delay, min rx/tx control delay */ /* max rx/tx clock delay, min rx/tx control delay */
phy_write(phydev, 0x0b, 0x8104); phy_write(phydev, MICREL_KSZ9021_EXTREG_CTRL,
phy_write(phydev, 0x0c, 0xf0f0); 0x8000 | MICREL_KSZ9021_RGMII_CLK_CTRL_PAD_SCEW);
phy_write(phydev, 0x0b, 0x104); phy_write(phydev, MICREL_KSZ9021_EXTREG_DATA_WRITE, 0xf0f0);
phy_write(phydev, MICREL_KSZ9021_EXTREG_CTRL,
MICREL_KSZ9021_RGMII_CLK_CTRL_PAD_SCEW);
} }
return 0; return 0;

6
include/linux/micrel_phy.h
View File

@ -17,6 +17,7 @@
#define PHY_ID_KSZ8873MLL 0x000e7237 #define PHY_ID_KSZ8873MLL 0x000e7237
#define PHY_ID_KSZ9021 0x00221610 #define PHY_ID_KSZ9021 0x00221610
#define PHY_ID_KSZ9021RLRN 0x00221611
#define PHY_ID_KS8737 0x00221720 #define PHY_ID_KS8737 0x00221720
#define PHY_ID_KSZ8021 0x00221555 #define PHY_ID_KSZ8021 0x00221555
#define PHY_ID_KSZ8031 0x00221556 #define PHY_ID_KSZ8031 0x00221556
@ -35,4 +36,9 @@
/* struct phy_device dev_flags definitions */ /* struct phy_device dev_flags definitions */
#define MICREL_PHY_50MHZ_CLK 0x00000001 #define MICREL_PHY_50MHZ_CLK 0x00000001
#define MICREL_KSZ9021_EXTREG_CTRL 0xB
#define MICREL_KSZ9021_EXTREG_DATA_WRITE 0xC
#define MICREL_KSZ9021_RGMII_CLK_CTRL_PAD_SCEW 0x104
#define MICREL_KSZ9021_RGMII_RX_DATA_PAD_SCEW 0x105
#endif /* _MICREL_PHY_H */ #endif /* _MICREL_PHY_H */