ixgbe: Clear head write-back registers on VF reset
The Tx head write-back registers are not cleared during an FLR or VF reset. As a result a configuration that had head write-back enabled can leave the registers set after the driver is unloaded. If the next driver loaded doesn't use the write-back registers this can lead to a bad configuration where head write-back is enabled, but the driver didn't request it. To avoid this situation the PF should be resetting the Tx head write-back registers when the VF requests a reset. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -698,6 +698,15 @@ static int ixgbe_vf_reset_msg(struct ixgbe_adapter *adapter, u32 vf)
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reg |= (1 << vf_shift);
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reg |= (1 << vf_shift);
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IXGBE_WRITE_REG(hw, IXGBE_VMECM(reg_offset), reg);
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IXGBE_WRITE_REG(hw, IXGBE_VMECM(reg_offset), reg);
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/*
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* Reset the VFs TDWBAL and TDWBAH registers
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* which are not cleared by an FLR
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*/
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for (i = 0; i < q_per_pool; i++) {
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IXGBE_WRITE_REG(hw, IXGBE_PVFTDWBAHn(q_per_pool, vf, i), 0);
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IXGBE_WRITE_REG(hw, IXGBE_PVFTDWBALn(q_per_pool, vf, i), 0);
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}
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/* reply to reset with ack and vf mac address */
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/* reply to reset with ack and vf mac address */
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msgbuf[0] = IXGBE_VF_RESET;
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msgbuf[0] = IXGBE_VF_RESET;
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if (!is_zero_ether_addr(vf_mac)) {
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if (!is_zero_ether_addr(vf_mac)) {
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@ -2174,6 +2174,14 @@ enum {
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#define IXGBE_MBVFICR(_i) (0x00710 + ((_i) * 4))
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#define IXGBE_MBVFICR(_i) (0x00710 + ((_i) * 4))
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#define IXGBE_VFLRE(_i) ((((_i) & 1) ? 0x001C0 : 0x00600))
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#define IXGBE_VFLRE(_i) ((((_i) & 1) ? 0x001C0 : 0x00600))
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#define IXGBE_VFLREC(_i) (0x00700 + ((_i) * 4))
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#define IXGBE_VFLREC(_i) (0x00700 + ((_i) * 4))
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/* Translated register #defines */
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#define IXGBE_PVFTDWBAL(P) (0x06038 + (0x40 * (P)))
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#define IXGBE_PVFTDWBAH(P) (0x0603C + (0x40 * (P)))
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#define IXGBE_PVFTDWBALn(q_per_pool, vf_number, vf_q_index) \
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(IXGBE_PVFTDWBAL((q_per_pool)*(vf_number) + (vf_q_index)))
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#define IXGBE_PVFTDWBAHn(q_per_pool, vf_number, vf_q_index) \
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(IXGBE_PVFTDWBAH((q_per_pool)*(vf_number) + (vf_q_index)))
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enum ixgbe_fdir_pballoc_type {
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enum ixgbe_fdir_pballoc_type {
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IXGBE_FDIR_PBALLOC_NONE = 0,
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IXGBE_FDIR_PBALLOC_NONE = 0,
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