arm/arm64: KVM: Rename irq_active to irq_queued
We have a special bitmap on the distributor struct to keep track of when level-triggered interrupts are queued on the list registers. This was named irq_active, which is confusing, because the active state of an interrupt as per the GIC spec is a different thing, not specifically related to edge-triggered/level-triggered configurations but rather indicates an interrupt which has been ack'ed but not yet eoi'ed. Rename the bitmap and the corresponding accessor functions to irq_queued to clarify what this is actually used for. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
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@ -143,8 +143,8 @@ struct vgic_dist {
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/* Interrupt state is pending on the distributor */
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/* Interrupt state is pending on the distributor */
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struct vgic_bitmap irq_pending;
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struct vgic_bitmap irq_pending;
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/* Level-triggered interrupt in progress */
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/* Level-triggered interrupt queued on VCPU interface */
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struct vgic_bitmap irq_active;
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struct vgic_bitmap irq_queued;
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/* Interrupt priority. Not used yet. */
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/* Interrupt priority. Not used yet. */
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struct vgic_bytemap irq_priority;
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struct vgic_bytemap irq_priority;
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@ -60,12 +60,12 @@
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* the 'line' again. This is achieved as such:
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* the 'line' again. This is achieved as such:
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*
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*
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* - When a level interrupt is moved onto a vcpu, the corresponding
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* - When a level interrupt is moved onto a vcpu, the corresponding
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* bit in irq_active is set. As long as this bit is set, the line
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* bit in irq_queued is set. As long as this bit is set, the line
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* will be ignored for further interrupts. The interrupt is injected
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* will be ignored for further interrupts. The interrupt is injected
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* into the vcpu with the GICH_LR_EOI bit set (generate a
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* into the vcpu with the GICH_LR_EOI bit set (generate a
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* maintenance interrupt on EOI).
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* maintenance interrupt on EOI).
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* - When the interrupt is EOIed, the maintenance interrupt fires,
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* - When the interrupt is EOIed, the maintenance interrupt fires,
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* and clears the corresponding bit in irq_active. This allow the
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* and clears the corresponding bit in irq_queued. This allows the
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* interrupt line to be sampled again.
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* interrupt line to be sampled again.
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*/
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*/
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@ -196,25 +196,25 @@ static int vgic_irq_is_enabled(struct kvm_vcpu *vcpu, int irq)
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return vgic_bitmap_get_irq_val(&dist->irq_enabled, vcpu->vcpu_id, irq);
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return vgic_bitmap_get_irq_val(&dist->irq_enabled, vcpu->vcpu_id, irq);
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}
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}
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static int vgic_irq_is_active(struct kvm_vcpu *vcpu, int irq)
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static int vgic_irq_is_queued(struct kvm_vcpu *vcpu, int irq)
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{
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{
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struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
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struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
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return vgic_bitmap_get_irq_val(&dist->irq_active, vcpu->vcpu_id, irq);
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return vgic_bitmap_get_irq_val(&dist->irq_queued, vcpu->vcpu_id, irq);
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}
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}
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static void vgic_irq_set_active(struct kvm_vcpu *vcpu, int irq)
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static void vgic_irq_set_queued(struct kvm_vcpu *vcpu, int irq)
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{
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{
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struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
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struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
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vgic_bitmap_set_irq_val(&dist->irq_active, vcpu->vcpu_id, irq, 1);
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vgic_bitmap_set_irq_val(&dist->irq_queued, vcpu->vcpu_id, irq, 1);
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}
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}
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static void vgic_irq_clear_active(struct kvm_vcpu *vcpu, int irq)
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static void vgic_irq_clear_queued(struct kvm_vcpu *vcpu, int irq)
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{
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{
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struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
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struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
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vgic_bitmap_set_irq_val(&dist->irq_active, vcpu->vcpu_id, irq, 0);
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vgic_bitmap_set_irq_val(&dist->irq_queued, vcpu->vcpu_id, irq, 0);
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}
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}
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static int vgic_dist_irq_is_pending(struct kvm_vcpu *vcpu, int irq)
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static int vgic_dist_irq_is_pending(struct kvm_vcpu *vcpu, int irq)
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@ -256,6 +256,11 @@ static void vgic_cpu_irq_clear(struct kvm_vcpu *vcpu, int irq)
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vcpu->arch.vgic_cpu.pending_shared);
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vcpu->arch.vgic_cpu.pending_shared);
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}
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}
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static bool vgic_can_sample_irq(struct kvm_vcpu *vcpu, int irq)
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{
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return vgic_irq_is_edge(vcpu, irq) || !vgic_irq_is_queued(vcpu, irq);
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}
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static u32 mmio_data_read(struct kvm_exit_mmio *mmio, u32 mask)
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static u32 mmio_data_read(struct kvm_exit_mmio *mmio, u32 mask)
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{
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{
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return le32_to_cpu(*((u32 *)mmio->data)) & mask;
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return le32_to_cpu(*((u32 *)mmio->data)) & mask;
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@ -1079,8 +1084,8 @@ static void vgic_retire_disabled_irqs(struct kvm_vcpu *vcpu)
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if (!vgic_irq_is_enabled(vcpu, vlr.irq)) {
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if (!vgic_irq_is_enabled(vcpu, vlr.irq)) {
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vgic_retire_lr(lr, vlr.irq, vcpu);
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vgic_retire_lr(lr, vlr.irq, vcpu);
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if (vgic_irq_is_active(vcpu, vlr.irq))
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if (vgic_irq_is_queued(vcpu, vlr.irq))
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vgic_irq_clear_active(vcpu, vlr.irq);
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vgic_irq_clear_queued(vcpu, vlr.irq);
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}
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}
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}
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}
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}
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}
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@ -1170,7 +1175,7 @@ static bool vgic_queue_sgi(struct kvm_vcpu *vcpu, int irq)
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static bool vgic_queue_hwirq(struct kvm_vcpu *vcpu, int irq)
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static bool vgic_queue_hwirq(struct kvm_vcpu *vcpu, int irq)
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{
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{
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if (vgic_irq_is_active(vcpu, irq))
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if (!vgic_can_sample_irq(vcpu, irq))
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return true; /* level interrupt, already queued */
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return true; /* level interrupt, already queued */
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if (vgic_queue_irq(vcpu, 0, irq)) {
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if (vgic_queue_irq(vcpu, 0, irq)) {
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@ -1178,7 +1183,7 @@ static bool vgic_queue_hwirq(struct kvm_vcpu *vcpu, int irq)
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vgic_dist_irq_clear_pending(vcpu, irq);
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vgic_dist_irq_clear_pending(vcpu, irq);
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vgic_cpu_irq_clear(vcpu, irq);
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vgic_cpu_irq_clear(vcpu, irq);
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} else {
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} else {
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vgic_irq_set_active(vcpu, irq);
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vgic_irq_set_queued(vcpu, irq);
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}
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}
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return true;
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return true;
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@ -1262,7 +1267,7 @@ static bool vgic_process_maintenance(struct kvm_vcpu *vcpu)
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for_each_set_bit(lr, eisr_ptr, vgic->nr_lr) {
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for_each_set_bit(lr, eisr_ptr, vgic->nr_lr) {
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struct vgic_lr vlr = vgic_get_lr(vcpu, lr);
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struct vgic_lr vlr = vgic_get_lr(vcpu, lr);
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vgic_irq_clear_active(vcpu, vlr.irq);
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vgic_irq_clear_queued(vcpu, vlr.irq);
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WARN_ON(vlr.state & LR_STATE_MASK);
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WARN_ON(vlr.state & LR_STATE_MASK);
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vlr.state = 0;
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vlr.state = 0;
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vgic_set_lr(vcpu, lr, vlr);
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vgic_set_lr(vcpu, lr, vlr);
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@ -1429,7 +1434,7 @@ static bool vgic_update_irq_pending(struct kvm *kvm, int cpuid,
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goto out;
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goto out;
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}
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}
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if (level_triggered && vgic_irq_is_active(vcpu, irq_num)) {
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if (!vgic_can_sample_irq(vcpu, irq_num)) {
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/*
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/*
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* Level interrupt in progress, will be picked up
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* Level interrupt in progress, will be picked up
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* when EOId.
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* when EOId.
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