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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6 

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: (1232 commits)
  iucv: Fix bad merging.
  net_sched: Add size table for qdiscs
  net_sched: Add accessor function for packet length for qdiscs
  net_sched: Add qdisc_enqueue wrapper
  highmem: Export totalhigh_pages.
  ipv6 mcast: Omit redundant address family checks in ip6_mc_source().
  net: Use standard structures for generic socket address structures.
  ipv6 netns: Make several "global" sysctl variables namespace aware.
  netns: Use net_eq() to compare net-namespaces for optimization.
  ipv6: remove unused macros from net/ipv6.h
  ipv6: remove unused parameter from ip6_ra_control
  tcp: fix kernel panic with listening_get_next
  tcp: Remove redundant checks when setting eff_sacks
  tcp: options clean up
  tcp: Fix MD5 signatures for non-linear skbs
  sctp: Update sctp global memory limit allocations.
  sctp: remove unnecessary byteshifting, calculate directly in big-endian
  sctp: Allow only 1 listening socket with SO_REUSEADDR
  sctp: Do not leak memory on multiple listen() calls
  sctp: Support ipv6only AF_INET6 sockets.
  ...
This commit is contained in:
Linus Torvalds 2008-07-20 17:43:29 -07:00
parent 3a53337428 fb65a7c091
commit db6d8c7a40
891 changed files with 90764 additions and 68014 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
Documentation/feature-removal-schedule.txt
View File

@ -308,9 +308,31 @@ Who: Matthew Wilcox <willy@linux.intel.com>
---------------------------
What: SCTP_GET_PEER_ADDRS_NUM_OLD, SCTP_GET_PEER_ADDRS_OLD,
SCTP_GET_LOCAL_ADDRS_NUM_OLD, SCTP_GET_LOCAL_ADDRS_OLD
When: June 2009
Why: A newer version of the options have been introduced in 2005 that
removes the limitions of the old API. The sctp library has been
converted to use these new options at the same time. Any user
space app that directly uses the old options should convert to using
the new options.
Who: Vlad Yasevich <vladislav.yasevich@hp.com>
---------------------------
What: CONFIG_THERMAL_HWMON
When: January 2009
Why: This option was introduced just to allow older lm-sensors userspace
to keep working over the upgrade to 2.6.26. At the scheduled time of
removal fixed lm-sensors (2.x or 3.x) should be readily available.
Who: Rene Herman <rene.herman@gmail.com>
---------------------------
What: Code that is now under CONFIG_WIRELESS_EXT_SYSFS
(in net/core/net-sysfs.c)
When: After the only user (hal) has seen a release with the patches
for enough time, probably some time in 2010.
Why: Over 1K .text/.data size reduction, data is available in other
ways (ioctls)
Who: Johannes Berg <johannes@sipsolutions.net>

100
Documentation/networking/bonding.txt
View File

@ -289,35 +289,73 @@ downdelay
fail_over_mac
Specifies whether active-backup mode should set all slaves to
the same MAC address (the traditional behavior), or, when
enabled, change the bond's MAC address when changing the
active interface (i.e., fail over the MAC address itself).
the same MAC address at enslavement (the traditional
behavior), or, when enabled, perform special handling of the
bond's MAC address in accordance with the selected policy.
Fail over MAC is useful for devices that cannot ever alter
their MAC address, or for devices that refuse incoming
broadcasts with their own source MAC (which interferes with
the ARP monitor).
Possible values are:
The down side of fail over MAC is that every device on the
network must be updated via gratuitous ARP, vs. just updating
a switch or set of switches (which often takes place for any
traffic, not just ARP traffic, if the switch snoops incoming
traffic to update its tables) for the traditional method. If
the gratuitous ARP is lost, communication may be disrupted.
none or 0
When fail over MAC is used in conjuction with the mii monitor,
devices which assert link up prior to being able to actually
transmit and receive are particularly susecptible to loss of
the gratuitous ARP, and an appropriate updelay setting may be
required.
This setting disables fail_over_mac, and causes
bonding to set all slaves of an active-backup bond to
the same MAC address at enslavement time. This is the
default.
A value of 0 disables fail over MAC, and is the default. A
value of 1 enables fail over MAC. This option is enabled
automatically if the first slave added cannot change its MAC
address. This option may be modified via sysfs only when no
slaves are present in the bond.
active or 1
This option was added in bonding version 3.2.0.
The "active" fail_over_mac policy indicates that the
MAC address of the bond should always be the MAC
address of the currently active slave. The MAC
address of the slaves is not changed; instead, the MAC
address of the bond changes during a failover.
This policy is useful for devices that cannot ever
alter their MAC address, or for devices that refuse
incoming broadcasts with their own source MAC (which
interferes with the ARP monitor).
The down side of this policy is that every device on
the network must be updated via gratuitous ARP,
vs. just updating a switch or set of switches (which
often takes place for any traffic, not just ARP
traffic, if the switch snoops incoming traffic to
update its tables) for the traditional method. If the
gratuitous ARP is lost, communication may be
disrupted.
When this policy is used in conjuction with the mii
monitor, devices which assert link up prior to being
able to actually transmit and receive are particularly
susecptible to loss of the gratuitous ARP, and an
appropriate updelay setting may be required.
follow or 2
The "follow" fail_over_mac policy causes the MAC
address of the bond to be selected normally (normally
the MAC address of the first slave added to the bond).
However, the second and subsequent slaves are not set
to this MAC address while they are in a backup role; a
slave is programmed with the bond's MAC address at
failover time (and the formerly active slave receives
the newly active slave's MAC address).
This policy is useful for multiport devices that
either become confused or incur a performance penalty
when multiple ports are programmed with the same MAC
address.
The default policy is none, unless the first slave cannot
change its MAC address, in which case the active policy is
selected by default.
This option may be modified via sysfs only when no slaves are
present in the bond.
This option was added in bonding version 3.2.0. The "follow"
policy was added in bonding version 3.3.0.
lacp_rate
@ -338,7 +376,8 @@ max_bonds
Specifies the number of bonding devices to create for this
instance of the bonding driver. E.g., if max_bonds is 3, and
the bonding driver is not already loaded, then bond0, bond1
and bond2 will be created. The default value is 1.
and bond2 will be created. The default value is 1. Specifying
a value of 0 will load bonding, but will not create any devices.
miimon
@ -501,6 +540,17 @@ mode
swapped with the new curr_active_slave that was
chosen.
num_grat_arp
Specifies the number of gratuitous ARPs to be issued after a
failover event. One gratuitous ARP is issued immediately after
the failover, subsequent ARPs are sent at a rate of one per link
monitor interval (arp_interval or miimon, whichever is active).
The valid range is 0 - 255; the default value is 1. This option
affects only the active-backup mode. This option was added for
bonding version 3.3.0.
primary
A string (eth0, eth2, etc) specifying which slave is the

167
Documentation/networking/dm9000.txt Normal file
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@ -0,0 +1,167 @@
DM9000 Network driver
=====================
Copyright 2008 Simtec Electronics,
Ben Dooks <ben@simtec.co.uk> <ben-linux@fluff.org>
Introduction
------------
This file describes how to use the DM9000 platform-device based network driver
that is contained in the files drivers/net/dm9000.c and drivers/net/dm9000.h.
The driver supports three DM9000 variants, the DM9000E which is the first chip
supported as well as the newer DM9000A and DM9000B devices. It is currently
maintained and tested by Ben Dooks, who should be CC: to any patches for this
driver.
Defining the platform device
----------------------------
The minimum set of resources attached to the platform device are as follows:
1) The physical address of the address register
2) The physical address of the data register
3) The IRQ line the device's interrupt pin is connected to.
These resources should be specified in that order, as the ordering of the
two address regions is important (the driver expects these to be address
and then data).
An example from arch/arm/mach-s3c2410/mach-bast.c is:
static struct resource bast_dm9k_resource[] = {
[0] = {
.start = S3C2410_CS5 + BAST_PA_DM9000,
.end = S3C2410_CS5 + BAST_PA_DM9000 + 3,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = S3C2410_CS5 + BAST_PA_DM9000 + 0x40,
.end = S3C2410_CS5 + BAST_PA_DM9000 + 0x40 + 0x3f,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = IRQ_DM9000,
.end = IRQ_DM9000,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
}
};
static struct platform_device bast_device_dm9k = {
.name = "dm9000",
.id = 0,
.num_resources = ARRAY_SIZE(bast_dm9k_resource),
.resource = bast_dm9k_resource,
};
Note the setting of the IRQ trigger flag in bast_dm9k_resource[2].flags,
as this will generate a warning if it is not present. The trigger from
the flags field will be passed to request_irq() when registering the IRQ
handler to ensure that the IRQ is setup correctly.
This shows a typical platform device, without the optional configuration
platform data supplied. The next example uses the same resources, but adds
the optional platform data to pass extra configuration data:
static struct dm9000_plat_data bast_dm9k_platdata = {
.flags = DM9000_PLATF_16BITONLY,
};
static struct platform_device bast_device_dm9k = {
.name = "dm9000",
.id = 0,
.num_resources = ARRAY_SIZE(bast_dm9k_resource),
.resource = bast_dm9k_resource,
.dev = {
.platform_data = &bast_dm9k_platdata,
}
};
The platform data is defined in include/linux/dm9000.h and described below.
Platform data
-------------
Extra platform data for the DM9000 can describe the IO bus width to the
device, whether or not an external PHY is attached to the device and
the availability of an external configuration EEPROM.
The flags for the platform data .flags field are as follows:
DM9000_PLATF_8BITONLY
The IO should be done with 8bit operations.
DM9000_PLATF_16BITONLY
The IO should be done with 16bit operations.
DM9000_PLATF_32BITONLY
The IO should be done with 32bit operations.
DM9000_PLATF_EXT_PHY
The chip is connected to an external PHY.
DM9000_PLATF_NO_EEPROM
This can be used to signify that the board does not have an
EEPROM, or that the EEPROM should be hidden from the user.
DM9000_PLATF_SIMPLE_PHY
Switch to using the simpler PHY polling method which does not
try and read the MII PHY state regularly. This is only available
when using the internal PHY. See the section on link state polling
for more information.
The config symbol DM9000_FORCE_SIMPLE_PHY_POLL, Kconfig entry
"Force simple NSR based PHY polling" allows this flag to be
forced on at build time.
PHY Link state polling
----------------------
The driver keeps track of the link state and informs the network core
about link (carrier) availablilty. This is managed by several methods
depending on the version of the chip and on which PHY is being used.
For the internal PHY, the original (and currently default) method is
to read the MII state, either when the status changes if we have the
necessary interrupt support in the chip or every two seconds via a
periodic timer.
To reduce the overhead for the internal PHY, there is now the option
of using the DM9000_FORCE_SIMPLE_PHY_POLL config, or DM9000_PLATF_SIMPLE_PHY
platform data option to read the summary information without the
expensive MII accesses. This method is faster, but does not print
as much information.
When using an external PHY, the driver currently has to poll the MII
link status as there is no method for getting an interrupt on link change.
DM9000A / DM9000B
-----------------
These chips are functionally similar to the DM9000E and are supported easily
by the same driver. The features are:
1) Interrupt on internal PHY state change. This means that the periodic
polling of the PHY status may be disabled on these devices when using
the internal PHY.
2) TCP/UDP checksum offloading, which the driver does not currently support.
ethtool
-------
The driver supports the ethtool interface for access to the driver
state information, the PHY state and the EEPROM.

21
Documentation/networking/ip-sysctl.txt
View File

@ -551,8 +551,9 @@ icmp_echo_ignore_broadcasts - BOOLEAN
icmp_ratelimit - INTEGER
Limit the maximal rates for sending ICMP packets whose type matches
icmp_ratemask (see below) to specific targets.
0 to disable any limiting, otherwise the maximal rate in jiffies(1)
Default: 100
0 to disable any limiting,
otherwise the minimal space between responses in milliseconds.
Default: 1000
icmp_ratemask - INTEGER
Mask made of ICMP types for which rates are being limited.
@ -1023,11 +1024,23 @@ max_addresses - INTEGER
autoconfigured addresses.
Default: 16
disable_ipv6 - BOOLEAN
Disable IPv6 operation.
Default: FALSE (enable IPv6 operation)
accept_dad - INTEGER
Whether to accept DAD (Duplicate Address Detection).
0: Disable DAD
1: Enable DAD (default)
2: Enable DAD, and disable IPv6 operation if MAC-based duplicate
link-local address has been found.
icmp/*:
ratelimit - INTEGER
Limit the maximal rates for sending ICMPv6 packets.
0 to disable any limiting, otherwise the maximal rate in jiffies(1)
Default: 100
0 to disable any limiting,
otherwise the minimal space between responses in milliseconds.
Default: 1000
IPv6 Update by:

419
Documentation/networking/ixgb.txt
View File

@ -1,7 +1,7 @@
Linux* Base Driver for the Intel(R) PRO/10GbE Family of Adapters
================================================================
Linux Base Driver for 10 Gigabit Intel(R) Network Connection
=============================================================
November 17, 2004
October 9, 2007
Contents
@ -9,94 +9,151 @@ Contents
- In This Release
- Identifying Your Adapter
- Building and Installation
- Command Line Parameters
- Improving Performance
- Additional Configurations
- Known Issues/Troubleshooting
- Support
In This Release
===============
This file describes the Linux* Base Driver for the Intel(R) PRO/10GbE Family
of Adapters, version 1.0.x.
This file describes the ixgb Linux Base Driver for the 10 Gigabit Intel(R)
Network Connection. This driver includes support for Itanium(R)2-based
systems.
For questions related to hardware requirements, refer to the documentation
supplied with your 10 Gigabit adapter. All hardware requirements listed apply
to use with Linux.
The following features are available in this kernel:
- Native VLANs
- Channel Bonding (teaming)
- SNMP
Channel Bonding documentation can be found in the Linux kernel source:
/Documentation/networking/bonding.txt
The driver information previously displayed in the /proc filesystem is not
supported in this release. Alternatively, you can use ethtool (version 1.6
or later), lspci, and ifconfig to obtain the same information.
Instructions on updating ethtool can be found in the section "Additional
Configurations" later in this document.
For questions related to hardware requirements, refer to the documentation
supplied with your Intel PRO/10GbE adapter. All hardware requirements listed
apply to use with Linux.
Identifying Your Adapter
========================
To verify your Intel adapter is supported, find the board ID number on the
adapter. Look for a label that has a barcode and a number in the format
A12345-001.
The following Intel network adapters are compatible with the drivers in this
release:
Use the above information and the Adapter & Driver ID Guide at:
Controller Adapter Name Physical Layer
---------- ------------ --------------
82597EX Intel(R) PRO/10GbE LR/SR/CX4 10G Base-LR (1310 nm optical fiber)
Server Adapters 10G Base-SR (850 nm optical fiber)
10G Base-CX4(twin-axial copper cabling)
http://support.intel.com/support/network/adapter/pro100/21397.htm
For more information on how to identify your adapter, go to the Adapter &
Driver ID Guide at:
For the latest Intel network drivers for Linux, go to:
http://support.intel.com/support/network/sb/CS-012904.htm
Building and Installation
=========================
select m for "Intel(R) PRO/10GbE support" located at:
Location:
-> Device Drivers
-> Network device support (NETDEVICES [=y])
-> Ethernet (10000 Mbit) (NETDEV_10000 [=y])
1. make modules && make modules_install
2. Load the module:
    modprobe ixgb <parameter>=<value>
The insmod command can be used if the full
path to the driver module is specified. For example:
insmod /lib/modules/<KERNEL VERSION>/kernel/drivers/net/ixgb/ixgb.ko
With 2.6 based kernels also make sure that older ixgb drivers are
removed from the kernel, before loading the new module:
rmmod ixgb; modprobe ixgb
3. Assign an IP address to the interface by entering the following, where
x is the interface number:
ifconfig ethx <IP_address>
4. Verify that the interface works. Enter the following, where <IP_address>
is the IP address for another machine on the same subnet as the interface
that is being tested:
ping <IP_address>
http://downloadfinder.intel.com/scripts-df/support_intel.asp
Command Line Parameters
=======================
If the driver is built as a module, the following optional parameters are
used by entering them on the command line with the modprobe or insmod command
using this syntax:
If the driver is built as a module, the following optional parameters are
used by entering them on the command line with the modprobe command using
this syntax:
modprobe ixgb [<option>=<VAL1>,<VAL2>,...]
insmod ixgb [<option>=<VAL1>,<VAL2>,...]
For example, with two 10GbE PCI adapters, entering:
For example, with two PRO/10GbE PCI adapters, entering:
modprobe ixgb TxDescriptors=80,128
insmod ixgb TxDescriptors=80,128
loads the ixgb driver with 80 TX resources for the first adapter and 128 TX
loads the ixgb driver with 80 TX resources for the first adapter and 128 TX
resources for the second adapter.
The default value for each parameter is generally the recommended setting,
unless otherwise noted. Also, if the driver is statically built into the
kernel, the driver is loaded with the default values for all the parameters.
Ethtool can be used to change some of the parameters at runtime.
unless otherwise noted.
FlowControl
Valid Range: 0-3 (0=none, 1=Rx only, 2=Tx only, 3=Rx&Tx)
Default: Read from the EEPROM
If EEPROM is not detected, default is 3
This parameter controls the automatic generation(Tx) and response(Rx) to
Ethernet PAUSE frames.
If EEPROM is not detected, default is 1
This parameter controls the automatic generation(Tx) and response(Rx) to
Ethernet PAUSE frames. There are hardware bugs associated with enabling
Tx flow control so beware.
RxDescriptors
Valid Range: 64-512
Default Value: 512
This value is the number of receive descriptors allocated by the driver.
Increasing this value allows the driver to buffer more incoming packets.
Each descriptor is 16 bytes. A receive buffer is also allocated for
each descriptor and can be either 2048, 4056, 8192, or 16384 bytes,
depending on the MTU setting. When the MTU size is 1500 or less, the
This value is the number of receive descriptors allocated by the driver.
Increasing this value allows the driver to buffer more incoming packets.
Each descriptor is 16 bytes. A receive buffer is also allocated for
each descriptor and can be either 2048, 4056, 8192, or 16384 bytes,
depending on the MTU setting. When the MTU size is 1500 or less, the
receive buffer size is 2048 bytes. When the MTU is greater than 1500 the
receive buffer size will be either 4056, 8192, or 16384 bytes. The
receive buffer size will be either 4056, 8192, or 16384 bytes. The
maximum MTU size is 16114.
RxIntDelay
Valid Range: 0-65535 (0=off)
Default Value: 6
This value delays the generation of receive interrupts in units of
0.8192 microseconds. Receive interrupt reduction can improve CPU
efficiency if properly tuned for specific network traffic. Increasing
this value adds extra latency to frame reception and can end up
decreasing the throughput of TCP traffic. If the system is reporting
dropped receives, this value may be set too high, causing the driver to
Default Value: 72
This value delays the generation of receive interrupts in units of
0.8192 microseconds. Receive interrupt reduction can improve CPU
efficiency if properly tuned for specific network traffic. Increasing
this value adds extra latency to frame reception and can end up
decreasing the throughput of TCP traffic. If the system is reporting
dropped receives, this value may be set too high, causing the driver to
run out of available receive descriptors.
TxDescriptors
Valid Range: 64-4096
Default Value: 256
This value is the number of transmit descriptors allocated by the driver.
Increasing this value allows the driver to queue more transmits. Each
Increasing this value allows the driver to queue more transmits. Each
descriptor is 16 bytes.
XsumRX
@ -105,51 +162,49 @@ Default Value: 1
A value of '1' indicates that the driver should enable IP checksum
offload for received packets (both UDP and TCP) to the adapter hardware.
XsumTX
Valid Range: 0-1
Default Value: 1
A value of '1' indicates that the driver should enable IP checksum
offload for transmitted packets (both UDP and TCP) to the adapter
hardware.
Improving Performance
=====================
With the Intel PRO/10 GbE adapter, the default Linux configuration will very
likely limit the total available throughput artificially. There is a set of
things that when applied together increase the ability of Linux to transmit
and receive data. The following enhancements were originally acquired from
settings published at http://www.spec.org/web99 for various submitted results
using Linux.
With the 10 Gigabit server adapters, the default Linux configuration will
very likely limit the total available throughput artificially. There is a set
of configuration changes that, when applied together, will increase the ability
of Linux to transmit and receive data. The following enhancements were
originally acquired from settings published at http://www.spec.org/web99/ for
various submitted results using Linux.
NOTE: These changes are only suggestions, and serve as a starting point for
tuning your network performance.
NOTE: These changes are only suggestions, and serve as a starting point for
tuning your network performance.
The changes are made in three major ways, listed in order of greatest effect:
- Use ifconfig to modify the mtu (maximum transmission unit) and the txqueuelen
- Use ifconfig to modify the mtu (maximum transmission unit) and the txqueuelen
parameter.
- Use sysctl to modify /proc parameters (essentially kernel tuning)
- Use setpci to modify the MMRBC field in PCI-X configuration space to increase
- Use setpci to modify the MMRBC field in PCI-X configuration space to increase
transmit burst lengths on the bus.
NOTE: setpci modifies the adapter's configuration registers to allow it to read
up to 4k bytes at a time (for transmits). However, for some systems the
behavior after modifying this register may be undefined (possibly errors of some
kind). A power-cycle, hard reset or explicitly setting the e6 register back to
22 (setpci -d 8086:1048 e6.b=22) may be required to get back to a stable
configuration.
NOTE: setpci modifies the adapter's configuration registers to allow it to read
up to 4k bytes at a time (for transmits). However, for some systems the
behavior after modifying this register may be undefined (possibly errors of
some kind). A power-cycle, hard reset or explicitly setting the e6 register
back to 22 (setpci -d 8086:1a48 e6.b=22) may be required to get back to a
stable configuration.
- COPY these lines and paste them into ixgb_perf.sh:
#!/bin/bash
echo "configuring network performance , edit this file to change the interface"
echo "configuring network performance , edit this file to change the interface
or device ID of 10GbE card"
# set mmrbc to 4k reads, modify only Intel 10GbE device IDs
setpci -d 8086:1048 e6.b=2e
# set the MTU (max transmission unit) - it requires your switch and clients to change too!
# replace 1a48 with appropriate 10GbE device's ID installed on the system,
# if needed.
setpci -d 8086:1a48 e6.b=2e
# set the MTU (max transmission unit) - it requires your switch and clients
# to change as well.
# set the txqueuelen
# your ixgb adapter should be loaded as eth1 for this to work, change if needed
ifconfig eth1 mtu 9000 txqueuelen 1000 up
# call the sysctl utility to modify /proc/sys entries
sysctl -p ./sysctl_ixgb.conf
# call the sysctl utility to modify /proc/sys entries
sysctl -p ./sysctl_ixgb.conf
- END ixgb_perf.sh
- COPY these lines and paste them into sysctl_ixgb.conf:
@ -159,54 +214,220 @@ sysctl -p ./sysctl_ixgb.conf
# several network benchmark tests, your mileage may vary
### IPV4 specific settings
net.ipv4.tcp_timestamps = 0 # turns TCP timestamp support off, default 1, reduces CPU use
net.ipv4.tcp_sack = 0 # turn SACK support off, default on
# on systems with a VERY fast bus -> memory interface this is the big gainer
net.ipv4.tcp_rmem = 10000000 10000000 10000000 # sets min/default/max TCP read buffer, default 4096 87380 174760
net.ipv4.tcp_wmem = 10000000 10000000 10000000 # sets min/pressure/max TCP write buffer, default 4096 16384 131072
net.ipv4.tcp_mem = 10000000 10000000 10000000 # sets min/pressure/max TCP buffer space, default 31744 32256 32768
# turn TCP timestamp support off, default 1, reduces CPU use
net.ipv4.tcp_timestamps = 0
# turn SACK support off, default on
# on systems with a VERY fast bus -> memory interface this is the big gainer
net.ipv4.tcp_sack = 0
# set min/default/max TCP read buffer, default 4096 87380 174760
net.ipv4.tcp_rmem = 10000000 10000000 10000000
# set min/pressure/max TCP write buffer, default 4096 16384 131072
net.ipv4.tcp_wmem = 10000000 10000000 10000000
# set min/pressure/max TCP buffer space, default 31744 32256 32768
net.ipv4.tcp_mem = 10000000 10000000 10000000
### CORE settings (mostly for socket and UDP effect)
net.core.rmem_max = 524287 # maximum receive socket buffer size, default 131071
net.core.wmem_max = 524287 # maximum send socket buffer size, default 131071
net.core.rmem_default = 524287 # default receive socket buffer size, default 65535
net.core.wmem_default = 524287 # default send socket buffer size, default 65535
net.core.optmem_max = 524287 # maximum amount of option memory buffers, default 10240
net.core.netdev_max_backlog = 300000 # number of unprocessed input packets before kernel starts dropping them, default 300
# set maximum receive socket buffer size, default 131071
net.core.rmem_max = 524287
# set maximum send socket buffer size, default 131071
net.core.wmem_max = 524287
# set default receive socket buffer size, default 65535
net.core.rmem_default = 524287
# set default send socket buffer size, default 65535
net.core.wmem_default = 524287
# set maximum amount of option memory buffers, default 10240
net.core.optmem_max = 524287
# set number of unprocessed input packets before kernel starts dropping them; default 300
net.core.netdev_max_backlog = 300000
- END sysctl_ixgb.conf
Edit the ixgb_perf.sh script if necessary to change eth1 to whatever interface
your ixgb driver is using.
Edit the ixgb_perf.sh script if necessary to change eth1 to whatever interface
your ixgb driver is using and/or replace '1a48' with appropriate 10GbE device's
ID installed on the system.
NOTE: Unless these scripts are added to the boot process, these changes will
only last only until the next system reboot.
NOTE: Unless these scripts are added to the boot process, these changes will
only last only until the next system reboot.
Resolving Slow UDP Traffic
--------------------------
If your server does not seem to be able to receive UDP traffic as fast as it
can receive TCP traffic, it could be because Linux, by default, does not set
the network stack buffers as large as they need to be to support high UDP
transfer rates. One way to alleviate this problem is to allow more memory to
be used by the IP stack to store incoming data.
If your server does not seem to be able to receive UDP traffic as fast as it
can receive TCP traffic, it could be because Linux, by default, does not set
the network stack buffers as large as they need to be to support high UDP
transfer rates. One way to alleviate this problem is to allow more memory to
be used by the IP stack to store incoming data.
For instance, use the commands:
For instance, use the commands:
sysctl -w net.core.rmem_max=262143
and
sysctl -w net.core.rmem_default=262143
to increase the read buffer memory max and default to 262143 (256k - 1) from
defaults of max=131071 (128k - 1) and default=65535 (64k - 1). These variables
will increase the amount of memory used by the network stack for receives, and
to increase the read buffer memory max and default to 262143 (256k - 1) from
defaults of max=131071 (128k - 1) and default=65535 (64k - 1). These variables
will increase the amount of memory used by the network stack for receives, and
can be increased significantly more if necessary for your application.
Additional Configurations
=========================
Configuring the Driver on Different Distributions
-------------------------------------------------
Configuring a network driver to load properly when the system is started is
distribution dependent. Typically, the configuration process involves adding
an alias line to /etc/modprobe.conf as well as editing other system startup
scripts and/or configuration files. Many popular Linux distributions ship
with tools to make these changes for you. To learn the proper way to
configure a network device for your system, refer to your distribution
documentation. If during this process you are asked for the driver or module
name, the name for the Linux Base Driver for the Intel 10GbE Family of
Adapters is ixgb.
Viewing Link Messages
---------------------
Link messages will not be displayed to the console if the distribution is
restricting system messages. In order to see network driver link messages on
your console, set dmesg to eight by entering the following:
dmesg -n 8
NOTE: This setting is not saved across reboots.
Jumbo Frames
------------
The driver supports Jumbo Frames for all adapters. Jumbo Frames support is
enabled by changing the MTU to a value larger than the default of 1500.
The maximum value for the MTU is 16114. Use the ifconfig command to
increase the MTU size. For example:
ifconfig ethx mtu 9000 up
The maximum MTU setting for Jumbo Frames is 16114. This value coincides
with the maximum Jumbo Frames size of 16128.
Ethtool
-------
The driver utilizes the ethtool interface for driver configuration and
diagnostics, as well as displaying statistical information. Ethtool
version 1.6 or later is required for this functionality.
The latest release of ethtool can be found from
http://sourceforge.net/projects/gkernel
NOTE: Ethtool 1.6 only supports a limited set of ethtool options. Support
for a more complete ethtool feature set can be enabled by upgrading
to the latest version.
NAPI
----
NAPI (Rx polling mode) is supported in the ixgb driver. NAPI is enabled
or disabled based on the configuration of the kernel. see CONFIG_IXGB_NAPI
See www.cyberus.ca/~hadi/usenix-paper.tgz for more information on NAPI.
Known Issues/Troubleshooting
============================
NOTE: After installing the driver, if your Intel Network Connection is not
working, verify in the "In This Release" section of the readme that you have
installed the correct driver.
Intel(R) PRO/10GbE CX4 Server Adapter Cable Interoperability Issue with
Fujitsu XENPAK Module in SmartBits Chassis
---------------------------------------------------------------------
Excessive CRC errors may be observed if the Intel(R) PRO/10GbE CX4
Server adapter is connected to a Fujitsu XENPAK CX4 module in a SmartBits
chassis using 15 m/24AWG cable assemblies manufactured by Fujitsu or Leoni.
The CRC errors may be received either by the Intel(R) PRO/10GbE CX4
Server adapter or the SmartBits. If this situation occurs using a different
cable assembly may resolve the issue.
CX4 Server Adapter Cable Interoperability Issues with HP Procurve 3400cl
Switch Port
------------------------------------------------------------------------
Excessive CRC errors may be observed if the Intel(R) PRO/10GbE CX4 Server
adapter is connected to an HP Procurve 3400cl switch port using short cables
(1 m or shorter). If this situation occurs, using a longer cable may resolve
the issue.
Excessive CRC errors may be observed using Fujitsu 24AWG cable assemblies that
Are 10 m or longer or where using a Leoni 15 m/24AWG cable assembly. The CRC
errors may be received either by the CX4 Server adapter or at the switch. If
this situation occurs, using a different cable assembly may resolve the issue.
Jumbo Frames System Requirement
-------------------------------
Memory allocation failures have been observed on Linux systems with 64 MB
of RAM or less that are running Jumbo Frames. If you are using Jumbo
Frames, your system may require more than the advertised minimum
requirement of 64 MB of system memory.
Performance Degradation with Jumbo Frames
-----------------------------------------
Degradation in throughput performance may be observed in some Jumbo frames
environments. If this is observed, increasing the application's socket buffer
size and/or increasing the /proc/sys/net/ipv4/tcp_*mem entry values may help.
See the specific application manual and /usr/src/linux*/Documentation/
networking/ip-sysctl.txt for more details.
Allocating Rx Buffers when Using Jumbo Frames
---------------------------------------------
Allocating Rx buffers when using Jumbo Frames on 2.6.x kernels may fail if
the available memory is heavily fragmented. This issue may be seen with PCI-X
adapters or with packet split disabled. This can be reduced or eliminated
by changing the amount of available memory for receive buffer allocation, by
increasing /proc/sys/vm/min_free_kbytes.
Multiple Interfaces on Same Ethernet Broadcast Network
------------------------------------------------------
Due to the default ARP behavior on Linux, it is not possible to have
one system on two IP networks in the same Ethernet broadcast domain
(non-partitioned switch) behave as expected. All Ethernet interfaces
will respond to IP traffic for any IP address assigned to the system.
This results in unbalanced receive traffic.
If you have multiple interfaces in a server, do either of the following:
- Turn on ARP filtering by entering:
echo 1 > /proc/sys/net/ipv4/conf/all/arp_filter
- Install the interfaces in separate broadcast domains - either in
different switches or in a switch partitioned to VLANs.
UDP Stress Test Dropped Packet Issue
--------------------------------------
Under small packets UDP stress test with 10GbE driver, the Linux system
may drop UDP packets due to the fullness of socket buffers. You may want
to change the driver's Flow Control variables to the minimum value for
controlling packet reception.
Tx Hangs Possible Under Stress
------------------------------
Under stress conditions, if TX hangs occur, turning off TSO
"ethtool -K eth0 tso off" may resolve the problem.
Support
=======
For general information and support, go to the Intel support website at:
For general information, go to the Intel support website at:
http://support.intel.com
or the Intel Wired Networking project hosted by Sourceforge at:
http://sourceforge.net/projects/e1000
If an issue is identified with the released source code on the supported
kernel with a supported adapter, email the specific information related to
the issue to linux.nics@intel.com.
kernel with a supported adapter, email the specific information related
to the issue to e1000-devel@lists.sf.net

67
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@ -0,0 +1,67 @@
mac80211_hwsim - software simulator of 802.11 radio(s) for mac80211
Copyright (c) 2008, Jouni Malinen <j@w1.fi>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License version 2 as
published by the Free Software Foundation.
Introduction
mac80211_hwsim is a Linux kernel module that can be used to simulate
arbitrary number of IEEE 802.11 radios for mac80211. It can be used to
test most of the mac80211 functionality and user space tools (e.g.,
hostapd and wpa_supplicant) in a way that matches very closely with
the normal case of using real WLAN hardware. From the mac80211 view
point, mac80211_hwsim is yet another hardware driver, i.e., no changes
to mac80211 are needed to use this testing tool.
The main goal for mac80211_hwsim is to make it easier for developers
to test their code and work with new features to mac80211, hostapd,
and wpa_supplicant. The simulated radios do not have the limitations
of real hardware, so it is easy to generate an arbitrary test setup
and always reproduce the same setup for future tests. In addition,
since all radio operation is simulated, any channel can be used in
tests regardless of regulatory rules.
mac80211_hwsim kernel module has a parameter 'radios' that can be used
to select how many radios are simulated (default 2). This allows
configuration of both very simply setups (e.g., just a single access
point and a station) or large scale tests (multiple access points with
hundreds of stations).
mac80211_hwsim works by tracking the current channel of each virtual
radio and copying all transmitted frames to all other radios that are
currently enabled and on the same channel as the transmitting
radio. Software encryption in mac80211 is used so that the frames are
actually encrypted over the virtual air interface to allow more
complete testing of encryption.
A global monitoring netdev, hwsim#, is created independent of
mac80211. This interface can be used to monitor all transmitted frames
regardless of channel.
Simple example
This example shows how to use mac80211_hwsim to simulate two radios:
one to act as an access point and the other as a station that
associates with the AP. hostapd and wpa_supplicant are used to take
care of WPA2-PSK authentication. In addition, hostapd is also
processing access point side of association.
Please note that the current Linux kernel does not enable AP mode, so a
simple patch is needed to enable AP mode selection:
http://johannes.sipsolutions.net/patches/kernel/all/LATEST/006-allow-ap-vlan-modes.patch
# Build mac80211_hwsim as part of kernel configuration
# Load the module
modprobe mac80211_hwsim
# Run hostapd (AP) for wlan0
hostapd hostapd.conf
# Run wpa_supplicant (station) for wlan1
wpa_supplicant -Dwext -iwlan1 -c wpa_supplicant.conf

11
Documentation/networking/mac80211_hwsim/hostapd.conf Normal file
View File

@ -0,0 +1,11 @@
interface=wlan0
driver=nl80211
hw_mode=g
channel=1
ssid=mac80211 test
wpa=2
wpa_key_mgmt=WPA-PSK
wpa_pairwise=CCMP
wpa_passphrase=12345678

10
Documentation/networking/mac80211_hwsim/wpa_supplicant.conf Normal file
View File

@ -0,0 +1,10 @@
ctrl_interface=/var/run/wpa_supplicant
network={
ssid="mac80211 test"
psk="12345678"
key_mgmt=WPA-PSK
proto=WPA2
pairwise=CCMP
group=CCMP
}

90
Documentation/networking/multiqueue.txt
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@ -3,19 +3,11 @@
===========================================
Section 1: Base driver requirements for implementing multiqueue support
Section 2: Qdisc support for multiqueue devices
Section 3: Brief howto using PRIO or RR for multiqueue devices
Intro: Kernel support for multiqueue devices
---------------------------------------------------------
Kernel support for multiqueue devices is only an API that is presented to the
netdevice layer for base drivers to implement. This feature is part of the
core networking stack, and all network devices will be running on the
multiqueue-aware stack. If a base driver only has one queue, then these
changes are transparent to that driver.
Kernel support for multiqueue devices is always present.
Section 1: Base driver requirements for implementing multiqueue support
-----------------------------------------------------------------------
@ -32,84 +24,4 @@ netif_{start|stop|wake}_subqueue() functions to manage each queue while the
device is still operational. netdev->queue_lock is still used when the device
comes online or when it's completely shut down (unregister_netdev(), etc.).
Finally, the base driver should indicate that it is a multiqueue device. The
feature flag NETIF_F_MULTI_QUEUE should be added to the netdev->features
bitmap on device initialization. Below is an example from e1000:
#ifdef CONFIG_E1000_MQ
if ( (adapter->hw.mac.type == e1000_82571) ||
(adapter->hw.mac.type == e1000_82572) ||
(adapter->hw.mac.type == e1000_80003es2lan))
netdev->features |= NETIF_F_MULTI_QUEUE;
#endif
Section 2: Qdisc support for multiqueue devices
-----------------------------------------------
Currently two qdiscs support multiqueue devices. A new round-robin qdisc,
sch_rr, and sch_prio. The qdisc is responsible for classifying the skb's to
bands and queues, and will store the queue mapping into skb->queue_mapping.
Use this field in the base driver to determine which queue to send the skb
to.
sch_rr has been added for hardware that doesn't want scheduling policies from
software, so it's a straight round-robin qdisc. It uses the same syntax and
classification priomap that sch_prio uses, so it should be intuitive to
configure for people who've used sch_prio.
In order to utilitize the multiqueue features of the qdiscs, the network
device layer needs to enable multiple queue support. This can be done by
selecting NETDEVICES_MULTIQUEUE under Drivers.
The PRIO qdisc naturally plugs into a multiqueue device. If
NETDEVICES_MULTIQUEUE is selected, then on qdisc load, the number of
bands requested is compared to the number of queues on the hardware. If they
are equal, it sets a one-to-one mapping up between the queues and bands. If
they're not equal, it will not load the qdisc. This is the same behavior
for RR. Once the association is made, any skb that is classified will have
skb->queue_mapping set, which will allow the driver to properly queue skb's
to multiple queues.
Section 3: Brief howto using PRIO and RR for multiqueue devices
---------------------------------------------------------------
The userspace command 'tc,' part of the iproute2 package, is used to configure
qdiscs. To add the PRIO qdisc to your network device, assuming the device is
called eth0, run the following command:
# tc qdisc add dev eth0 root handle 1: prio bands 4 multiqueue
This will create 4 bands, 0 being highest priority, and associate those bands
to the queues on your NIC. Assuming eth0 has 4 Tx queues, the band mapping
would look like:
band 0 => queue 0
band 1 => queue 1
band 2 => queue 2
band 3 => queue 3
Traffic will begin flowing through each queue if your TOS values are assigning
traffic across the various bands. For example, ssh traffic will always try to
go out band 0 based on TOS -> Linux priority conversion (realtime traffic),
so it will be sent out queue 0. ICMP traffic (pings) fall into the "normal"
traffic classification, which is band 1. Therefore pings will be send out
queue 1 on the NIC.
Note the use of the multiqueue keyword. This is only in versions of iproute2
that support multiqueue networking devices; if this is omitted when loading
a qdisc onto a multiqueue device, the qdisc will load and operate the same
if it were loaded onto a single-queue device (i.e. - sends all traffic to
queue 0).
Another alternative to multiqueue band allocation can be done by using the
multiqueue option and specify 0 bands. If this is the case, the qdisc will
allocate the number of bands to equal the number of queues that the device
reports, and bring the qdisc online.
The behavior of tc filters remains the same, where it will override TOS priority
classification.
Author: Peter P. Waskiewicz Jr. <peter.p.waskiewicz.jr@intel.com>

7
Documentation/networking/s2io.txt
View File

@ -52,13 +52,10 @@ d. MSI/MSI-X. Can be enabled on platforms which support this feature
(IA64, Xeon) resulting in noticeable performance improvement(upto 7%
on certain platforms).
e. NAPI. Compile-time option(CONFIG_S2IO_NAPI) for better Rx interrupt
moderation.
f. Statistics. Comprehensive MAC-level and software statistics displayed
e. Statistics. Comprehensive MAC-level and software statistics displayed
using "ethtool -S" option.
g. Multi-FIFO/Ring. Supports up to 8 transmit queues and receive rings,
f. Multi-FIFO/Ring. Supports up to 8 transmit queues and receive rings,
with multiple steering options.
4. Command line parameters

78
Documentation/powerpc/booting-without-of.txt
View File

@ -41,12 +41,24 @@ Table of Contents
VI - System-on-a-chip devices and nodes
1) Defining child nodes of an SOC
2) Representing devices without a current OF specification
a) PHY nodes
b) Interrupt controllers
c) CFI or JEDEC memory-mapped NOR flash
d) 4xx/Axon EMAC ethernet nodes
e) Xilinx IP cores
f) USB EHCI controllers
a) MDIO IO device
b) Gianfar-compatible ethernet nodes
c) PHY nodes
d) Interrupt controllers
e) I2C
f) Freescale SOC USB controllers
g) Freescale SOC SEC Security Engines
h) Board Control and Status (BCSR)
i) Freescale QUICC Engine module (QE)
j) CFI or JEDEC memory-mapped NOR flash
k) Global Utilities Block
l) Freescale Communications Processor Module
m) Chipselect/Local Bus
n) 4xx/Axon EMAC ethernet nodes
o) Xilinx IP cores
p) Freescale Synchronous Serial Interface
q) USB EHCI controllers
r) MDIO on GPIOs
VII - Marvell Discovery mv64[345]6x System Controller chips
1) The /system-controller node
@ -1815,6 +1827,60 @@ platforms are moved over to use the flattened-device-tree model.
big-endian;
};
r) Freescale Display Interface Unit
The Freescale DIU is a LCD controller, with proper hardware, it can also
drive DVI monitors.
Required properties:
- compatible : should be "fsl-diu".
- reg : should contain at least address and length of the DIU register
set.
- Interrupts : one DIU interrupt should be describe here.
Example (MPC8610HPCD)
display@2c000 {
compatible = "fsl,diu";
reg = <0x2c000 100>;
interrupts = <72 2>;
interrupt-parent = <&mpic>;
};
s) Freescale on board FPGA
This is the memory-mapped registers for on board FPGA.
Required properities:
- compatible : should be "fsl,fpga-pixis".
- reg : should contain the address and the lenght of the FPPGA register
set.
Example (MPC8610HPCD)
board-control@e8000000 {
compatible = "fsl,fpga-pixis";
reg = <0xe8000000 32>;
};
r) MDIO on GPIOs
Currently defined compatibles:
- virtual,gpio-mdio
MDC and MDIO lines connected to GPIO controllers are listed in the
gpios property as described in section VIII.1 in the following order:
MDC, MDIO.
Example:
mdio {
compatible = "virtual,mdio-gpio";
#address-cells = <1>;
#size-cells = <0>;
gpios = <&qe_pio_a 11
&qe_pio_c 6>;
};
VII - Marvell Discovery mv64[345]6x System Controller chips
===========================================================

549
Documentation/rfkill.txt
View File

@ -1,89 +1,528 @@
rfkill - RF switch subsystem support
====================================
1 Implementation details
2 Driver support
3 Userspace support
1 Introduction
2 Implementation details
3 Kernel driver guidelines
3.1 wireless device drivers
3.2 platform/switch drivers
3.3 input device drivers
4 Kernel API
5 Userspace support
1. Introduction:
The rfkill switch subsystem exists to add a generic interface to circuitry that
can enable or disable the signal output of a wireless *transmitter* of any
type. By far, the most common use is to disable radio-frequency transmitters.
Note that disabling the signal output means that the the transmitter is to be
made to not emit any energy when "blocked". rfkill is not about blocking data
transmissions, it is about blocking energy emission.
The rfkill subsystem offers support for keys and switches often found on
laptops to enable wireless devices like WiFi and Bluetooth, so that these keys
and switches actually perform an action in all wireless devices of a given type
attached to the system.
The buttons to enable and disable the wireless transmitters are important in
situations where the user is for example using his laptop on a location where
radio-frequency transmitters _must_ be disabled (e.g. airplanes).
Because of this requirement, userspace support for the keys should not be made
mandatory. Because userspace might want to perform some additional smarter
tasks when the key is pressed, rfkill provides userspace the possibility to
take over the task to handle the key events.
===============================================================================
1: Implementation details
2: Implementation details
The rfkill switch subsystem offers support for keys often found on laptops
to enable wireless devices like WiFi and Bluetooth.
The rfkill subsystem is composed of various components: the rfkill class, the
rfkill-input module (an input layer handler), and some specific input layer
events.
This is done by providing the user 3 possibilities:
1 - The rfkill system handles all events; userspace is not aware of events.
2 - The rfkill system handles all events; userspace is informed about the events.
3 - The rfkill system does not handle events; userspace handles all events.
The rfkill class provides kernel drivers with an interface that allows them to
know when they should enable or disable a wireless network device transmitter.
This is enabled by the CONFIG_RFKILL Kconfig option.
The buttons to enable and disable the wireless radios are important in
situations where the user is for example using his laptop on a location where
wireless radios _must_ be disabled (e.g. airplanes).
Because of this requirement, userspace support for the keys should not be
made mandatory. Because userspace might want to perform some additional smarter
tasks when the key is pressed, rfkill still provides userspace the possibility
to take over the task to handle the key events.
The rfkill class support makes sure userspace will be notified of all state
changes on rfkill devices through uevents. It provides a notification chain
for interested parties in the kernel to also get notified of rfkill state
changes in other drivers. It creates several sysfs entries which can be used
by userspace. See section "Userspace support".
The system inside the kernel has been split into 2 separate sections:
1 - RFKILL
2 - RFKILL_INPUT
The rfkill-input module provides the kernel with the ability to implement a
basic response when the user presses a key or button (or toggles a switch)
related to rfkill functionality. It is an in-kernel implementation of default
policy of reacting to rfkill-related input events and neither mandatory nor
required for wireless drivers to operate. It is enabled by the
CONFIG_RFKILL_INPUT Kconfig option.
The first option enables rfkill support and will make sure userspace will
be notified of any events through the input device. It also creates several
sysfs entries which can be used by userspace. See section "Userspace support".
rfkill-input is a rfkill-related events input layer handler. This handler will
listen to all rfkill key events and will change the rfkill state of the
wireless devices accordingly. With this option enabled userspace could either
do nothing or simply perform monitoring tasks.
The second option provides an rfkill input handler. This handler will
listen to all rfkill key events and will toggle the radio accordingly.
With this option enabled userspace could either do nothing or simply
perform monitoring tasks.
The rfkill-input module also provides EPO (emergency power-off) functionality
for all wireless transmitters. This function cannot be overridden, and it is
always active. rfkill EPO is related to *_RFKILL_ALL input layer events.
Important terms for the rfkill subsystem:
In order to avoid confusion, we avoid the term "switch" in rfkill when it is
referring to an electronic control circuit that enables or disables a
transmitter. We reserve it for the physical device a human manipulates
(which is an input device, by the way):
rfkill switch:
A physical device a human manipulates. Its state can be perceived by
the kernel either directly (through a GPIO pin, ACPI GPE) or by its
effect on a rfkill line of a wireless device.
rfkill controller:
A hardware circuit that controls the state of a rfkill line, which a
kernel driver can interact with *to modify* that state (i.e. it has
either write-only or read/write access).
rfkill line:
An input channel (hardware or software) of a wireless device, which
causes a wireless transmitter to stop emitting energy (BLOCK) when it
is active. Point of view is extremely important here: rfkill lines are
always seen from the PoV of a wireless device (and its driver).
soft rfkill line/software rfkill line:
A rfkill line the wireless device driver can directly change the state
of. Related to rfkill_state RFKILL_STATE_SOFT_BLOCKED.
hard rfkill line/hardware rfkill line:
A rfkill line that works fully in hardware or firmware, and that cannot
be overridden by the kernel driver. The hardware device or the
firmware just exports its status to the driver, but it is read-only.
Related to rfkill_state RFKILL_STATE_HARD_BLOCKED.
The enum rfkill_state describes the rfkill state of a transmitter:
When a rfkill line or rfkill controller is in the RFKILL_STATE_UNBLOCKED state,
the wireless transmitter (radio TX circuit for example) is *enabled*. When the
it is in the RFKILL_STATE_SOFT_BLOCKED or RFKILL_STATE_HARD_BLOCKED, the
wireless transmitter is to be *blocked* from operating.
RFKILL_STATE_SOFT_BLOCKED indicates that a call to toggle_radio() can change
that state. RFKILL_STATE_HARD_BLOCKED indicates that a call to toggle_radio()
will not be able to change the state and will return with a suitable error if
attempts are made to set the state to RFKILL_STATE_UNBLOCKED.
RFKILL_STATE_HARD_BLOCKED is used by drivers to signal that the device is
locked in the BLOCKED state by a hardwire rfkill line (typically an input pin
that, when active, forces the transmitter to be disabled) which the driver
CANNOT override.
Full rfkill functionality requires two different subsystems to cooperate: the
input layer and the rfkill class. The input layer issues *commands* to the
entire system requesting that devices registered to the rfkill class change
state. The way this interaction happens is not complex, but it is not obvious
either:
Kernel Input layer:
* Generates KEY_WWAN, KEY_WLAN, KEY_BLUETOOTH, SW_RFKILL_ALL, and
other such events when the user presses certain keys, buttons, or
toggles certain physical switches.
THE INPUT LAYER IS NEVER USED TO PROPAGATE STATUS, NOTIFICATIONS OR THE
KIND OF STUFF AN ON-SCREEN-DISPLAY APPLICATION WOULD REPORT. It is
used to issue *commands* for the system to change behaviour, and these
commands may or may not be carried out by some kernel driver or
userspace application. It follows that doing user feedback based only
on input events is broken, as there is no guarantee that an input event
will be acted upon.
Most wireless communication device drivers implementing rfkill
functionality MUST NOT generate these events, and have no reason to
register themselves with the input layer. Doing otherwise is a common
misconception. There is an API to propagate rfkill status change
information, and it is NOT the input layer.
rfkill class:
* Calls a hook in a driver to effectively change the wireless
transmitter state;
* Keeps track of the wireless transmitter state (with help from
the driver);
* Generates userspace notifications (uevents) and a call to a
notification chain (kernel) when there is a wireless transmitter
state change;
* Connects a wireless communications driver with the common rfkill
control system, which, for example, allows actions such as
"switch all bluetooth devices offline" to be carried out by
userspace or by rfkill-input.
THE RFKILL CLASS NEVER ISSUES INPUT EVENTS. THE RFKILL CLASS DOES
NOT LISTEN TO INPUT EVENTS. NO DRIVER USING THE RFKILL CLASS SHALL
EVER LISTEN TO, OR ACT ON RFKILL INPUT EVENTS. Doing otherwise is
a layering violation.
Most wireless data communication drivers in the kernel have just to
implement the rfkill class API to work properly. Interfacing to the
input layer is not often required (and is very often a *bug*) on
wireless drivers.
Platform drivers often have to attach to the input layer to *issue*
(but never to listen to) rfkill events for rfkill switches, and also to
the rfkill class to export a control interface for the platform rfkill
controllers to the rfkill subsystem. This does NOT mean the rfkill
switch is attached to a rfkill class (doing so is almost always wrong).
It just means the same kernel module is the driver for different
devices (rfkill switches and rfkill controllers).
Userspace input handlers (uevents) or kernel input handlers (rfkill-input):
* Implements the policy of what should happen when one of the input
layer events related to rfkill operation is received.
* Uses the sysfs interface (userspace) or private rfkill API calls
to tell the devices registered with the rfkill class to change
their state (i.e. translates the input layer event into real
action).
* rfkill-input implements EPO by handling EV_SW SW_RFKILL_ALL 0
(power off all transmitters) in a special way: it ignores any
overrides and local state cache and forces all transmitters to the
RFKILL_STATE_SOFT_BLOCKED state (including those which are already
supposed to be BLOCKED). Note that the opposite event (power on all
transmitters) is handled normally.
Userspace uevent handler or kernel platform-specific drivers hooked to the
rfkill notifier chain:
* Taps into the rfkill notifier chain or to KOBJ_CHANGE uevents,
in order to know when a device that is registered with the rfkill
class changes state;
* Issues feedback notifications to the user;
* In the rare platforms where this is required, synthesizes an input
event to command all *OTHER* rfkill devices to also change their
statues when a specific rfkill device changes state.
===============================================================================
3: Kernel driver guidelines
Remember: point-of-view is everything for a driver that connects to the rfkill
subsystem. All the details below must be measured/perceived from the point of
view of the specific driver being modified.
The first thing one needs to know is whether his driver should be talking to
the rfkill class or to the input layer. In rare cases (platform drivers), it
could happen that you need to do both, as platform drivers often handle a
variety of devices in the same driver.
Do not mistake input devices for rfkill controllers. The only type of "rfkill
switch" device that is to be registered with the rfkill class are those
directly controlling the circuits that cause a wireless transmitter to stop
working (or the software equivalent of them), i.e. what we call a rfkill
controller. Every other kind of "rfkill switch" is just an input device and
MUST NOT be registered with the rfkill class.
A driver should register a device with the rfkill class when ALL of the
following conditions are met (they define a rfkill controller):
1. The device is/controls a data communications wireless transmitter;
2. The kernel can interact with the hardware/firmware to CHANGE the wireless
transmitter state (block/unblock TX operation);
3. The transmitter can be made to not emit any energy when "blocked":
rfkill is not about blocking data transmissions, it is about blocking
energy emission;
A driver should register a device with the input subsystem to issue
rfkill-related events (KEY_WLAN, KEY_BLUETOOTH, KEY_WWAN, KEY_WIMAX,
SW_RFKILL_ALL, etc) when ALL of the folowing conditions are met:
1. It is directly related to some physical device the user interacts with, to
command the O.S./firmware/hardware to enable/disable a data communications
wireless transmitter.
Examples of the physical device are: buttons, keys and switches the user
will press/touch/slide/switch to enable or disable the wireless
communication device.
2. It is NOT slaved to another device, i.e. there is no other device that
issues rfkill-related input events in preference to this one.
Please refer to the corner cases and examples section for more details.
When in doubt, do not issue input events. For drivers that should generate
input events in some platforms, but not in others (e.g. b43), the best solution
is to NEVER generate input events in the first place. That work should be
deferred to a platform-specific kernel module (which will know when to generate
events through the rfkill notifier chain) or to userspace. This avoids the
usual maintenance problems with DMI whitelisting.
Corner cases and examples:
====================================
2: Driver support
To build a driver with rfkill subsystem support, the driver should
depend on the Kconfig symbol RFKILL; it should _not_ depend on
RKFILL_INPUT.
1. If the device is an input device that, because of hardware or firmware,
causes wireless transmitters to be blocked regardless of the kernel's will, it
is still just an input device, and NOT to be registered with the rfkill class.
Unless key events trigger an interrupt to which the driver listens, polling
will be required to determine the key state changes. For this the input
layer providers the input-polldev handler.
2. If the wireless transmitter switch control is read-only, it is an input
device and not to be registered with the rfkill class (and maybe not to be made
an input layer event source either, see below).
A driver should implement a few steps to correctly make use of the
rfkill subsystem. First for non-polling drivers:
3. If there is some other device driver *closer* to the actual hardware the
user interacted with (the button/switch/key) to issue an input event, THAT is
the device driver that should be issuing input events.
- rfkill_allocate()
- input_allocate_device()
- rfkill_register()
- input_register_device()
E.g:
[RFKILL slider switch] -- [GPIO hardware] -- [WLAN card rf-kill input]
(platform driver) (wireless card driver)
For polling drivers:
The user is closer to the RFKILL slide switch plaform driver, so the driver
which must issue input events is the platform driver looking at the GPIO
hardware, and NEVER the wireless card driver (which is just a slave). It is
very likely that there are other leaves than just the WLAN card rf-kill input
(e.g. a bluetooth card, etc)...
- rfkill_allocate()
- input_allocate_polled_device()
- rfkill_register()
- input_register_polled_device()
On the other hand, some embedded devices do this:
When a key event has been detected, the correct event should be
sent over the input device which has been registered by the driver.
[RFKILL slider switch] -- [WLAN card rf-kill input]
(wireless card driver)
In this situation, the wireless card driver *could* register itself as an input
device and issue rf-kill related input events... but in order to AVOID the need
for DMI whitelisting, the wireless card driver does NOT do it. Userspace (HAL)
or a platform driver (that exists only on these embedded devices) will do the
dirty job of issuing the input events.
COMMON MISTAKES in kernel drivers, related to rfkill:
====================================
3: Userspace support
For each key an input device will be created which will send out the correct
key event when the rfkill key has been pressed.
1. NEVER confuse input device keys and buttons with input device switches.
1a. Switches are always set or reset. They report the current state
(on position or off position).
1b. Keys and buttons are either in the pressed or not-pressed state, and
that's it. A "button" that latches down when you press it, and
unlatches when you press it again is in fact a switch as far as input
devices go.
Add the SW_* events you need for switches, do NOT try to emulate a button using
KEY_* events just because there is no such SW_* event yet. Do NOT try to use,
for example, KEY_BLUETOOTH when you should be using SW_BLUETOOTH instead.
2. Input device switches (sources of EV_SW events) DO store their current state
(so you *must* initialize it by issuing a gratuitous input layer event on
driver start-up and also when resuming from sleep), and that state CAN be
queried from userspace through IOCTLs. There is no sysfs interface for this,
but that doesn't mean you should break things trying to hook it to the rfkill
class to get a sysfs interface :-)
3. Do not issue *_RFKILL_ALL events by default, unless you are sure it is the
correct event for your switch/button. These events are emergency power-off
events when they are trying to turn the transmitters off. An example of an
input device which SHOULD generate *_RFKILL_ALL events is the wireless-kill
switch in a laptop which is NOT a hotkey, but a real switch that kills radios
in hardware, even if the O.S. has gone to lunch. An example of an input device
which SHOULD NOT generate *_RFKILL_ALL events by default, is any sort of hot
key that does nothing by itself, as well as any hot key that is type-specific
(e.g. the one for WLAN).
3.1 Guidelines for wireless device drivers
------------------------------------------
1. Each independent transmitter in a wireless device (usually there is only one
transmitter per device) should have a SINGLE rfkill class attached to it.
2. If the device does not have any sort of hardware assistance to allow the
driver to rfkill the device, the driver should emulate it by taking all actions
required to silence the transmitter.
3. If it is impossible to silence the transmitter (i.e. it still emits energy,
even if it is just in brief pulses, when there is no data to transmit and there
is no hardware support to turn it off) do NOT lie to the users. Do not attach
it to a rfkill class. The rfkill subsystem does not deal with data
transmission, it deals with energy emission. If the transmitter is emitting
energy, it is not blocked in rfkill terms.
4. It doesn't matter if the device has multiple rfkill input lines affecting
the same transmitter, their combined state is to be exported as a single state
per transmitter (see rule 1).
This rule exists because users of the rfkill subsystem expect to get (and set,
when possible) the overall transmitter rfkill state, not of a particular rfkill
line.
Example of a WLAN wireless driver connected to the rfkill subsystem:
--------------------------------------------------------------------
A certain WLAN card has one input pin that causes it to block the transmitter
and makes the status of that input pin available (only for reading!) to the
kernel driver. This is a hard rfkill input line (it cannot be overridden by
the kernel driver).
The card also has one PCI register that, if manipulated by the driver, causes
it to block the transmitter. This is a soft rfkill input line.
It has also a thermal protection circuitry that shuts down its transmitter if
the card overheats, and makes the status of that protection available (only for
reading!) to the kernel driver. This is also a hard rfkill input line.
If either one of these rfkill lines are active, the transmitter is blocked by
the hardware and forced offline.
The driver should allocate and attach to its struct device *ONE* instance of
the rfkill class (there is only one transmitter).
It can implement the get_state() hook, and return RFKILL_STATE_HARD_BLOCKED if
either one of its two hard rfkill input lines are active. If the two hard
rfkill lines are inactive, it must return RFKILL_STATE_SOFT_BLOCKED if its soft
rfkill input line is active. Only if none of the rfkill input lines are
active, will it return RFKILL_STATE_UNBLOCKED.
If it doesn't implement the get_state() hook, it must make sure that its calls
to rfkill_force_state() are enough to keep the status always up-to-date, and it
must do a rfkill_force_state() on resume from sleep.
Every time the driver gets a notification from the card that one of its rfkill
lines changed state (polling might be needed on badly designed cards that don't
generate interrupts for such events), it recomputes the rfkill state as per
above, and calls rfkill_force_state() to update it.
The driver should implement the toggle_radio() hook, that:
1. Returns an error if one of the hardware rfkill lines are active, and the
caller asked for RFKILL_STATE_UNBLOCKED.
2. Activates the soft rfkill line if the caller asked for state
RFKILL_STATE_SOFT_BLOCKED. It should do this even if one of the hard rfkill
lines are active, effectively double-blocking the transmitter.
3. Deactivates the soft rfkill line if none of the hardware rfkill lines are
active and the caller asked for RFKILL_STATE_UNBLOCKED.
===============================================================================
4: Kernel API
To build a driver with rfkill subsystem support, the driver should depend on
(or select) the Kconfig symbol RFKILL; it should _not_ depend on RKFILL_INPUT.
The hardware the driver talks to may be write-only (where the current state
of the hardware is unknown), or read-write (where the hardware can be queried
about its current state).
The rfkill class will call the get_state hook of a device every time it needs
to know the *real* current state of the hardware. This can happen often.
Some hardware provides events when its status changes. In these cases, it is
best for the driver to not provide a get_state hook, and instead register the
rfkill class *already* with the correct status, and keep it updated using
rfkill_force_state() when it gets an event from the hardware.
There is no provision for a statically-allocated rfkill struct. You must
use rfkill_allocate() to allocate one.
You should:
- rfkill_allocate()
- modify rfkill fields (flags, name)
- modify state to the current hardware state (THIS IS THE ONLY TIME
YOU CAN ACCESS state DIRECTLY)
- rfkill_register()
The only way to set a device to the RFKILL_STATE_HARD_BLOCKED state is through
a suitable return of get_state() or through rfkill_force_state().
When a device is in the RFKILL_STATE_HARD_BLOCKED state, the only way to switch
it to a different state is through a suitable return of get_state() or through
rfkill_force_state().
If toggle_radio() is called to set a device to state RFKILL_STATE_SOFT_BLOCKED
when that device is already at the RFKILL_STATE_HARD_BLOCKED state, it should
not return an error. Instead, it should try to double-block the transmitter,
so that its state will change from RFKILL_STATE_HARD_BLOCKED to
RFKILL_STATE_SOFT_BLOCKED should the hardware blocking cease.
Please refer to the source for more documentation.
===============================================================================
5: Userspace support
rfkill devices issue uevents (with an action of "change"), with the following
environment variables set:
RFKILL_NAME
RFKILL_STATE
RFKILL_TYPE
The ABI for these variables is defined by the sysfs attributes. It is best
to take a quick look at the source to make sure of the possible values.
It is expected that HAL will trap those, and bridge them to DBUS, etc. These
events CAN and SHOULD be used to give feedback to the user about the rfkill
status of the system.
Input devices may issue events that are related to rfkill. These are the
various KEY_* events and SW_* events supported by rfkill-input.c.
******IMPORTANT******
When rfkill-input is ACTIVE, userspace is NOT TO CHANGE THE STATE OF AN RFKILL
SWITCH IN RESPONSE TO AN INPUT EVENT also handled by rfkill-input, unless it
has set to true the user_claim attribute for that particular switch. This rule
is *absolute*; do NOT violate it.
******IMPORTANT******
Userspace must not assume it is the only source of control for rfkill switches.
Their state CAN and WILL change due to firmware actions, direct user actions,
and the rfkill-input EPO override for *_RFKILL_ALL.
When rfkill-input is not active, userspace must initiate a rfkill status
change by writing to the "state" attribute in order for anything to happen.
Take particular care to implement EV_SW SW_RFKILL_ALL properly. When that
switch is set to OFF, *every* rfkill device *MUST* be immediately put into the
RFKILL_STATE_SOFT_BLOCKED state, no questions asked.
The following sysfs entries will be created:
name: Name assigned by driver to this key (interface or driver name).
type: Name of the key type ("wlan", "bluetooth", etc).
state: Current state of the key. 1: On, 0: Off.
state: Current state of the transmitter
0: RFKILL_STATE_SOFT_BLOCKED
transmitter is forced off, but one can override it
by a write to the state attribute;
1: RFKILL_STATE_UNBLOCKED
transmiter is NOT forced off, and may operate if
all other conditions for such operation are met
(such as interface is up and configured, etc);
2: RFKILL_STATE_HARD_BLOCKED
transmitter is forced off by something outside of
the driver's control. One cannot set a device to
this state through writes to the state attribute;
claim: 1: Userspace handles events, 0: Kernel handles events
Both the "state" and "claim" entries are also writable. For the "state" entry
this means that when 1 or 0 is written all radios, not yet in the requested
state, will be will be toggled accordingly.
this means that when 1 or 0 is written, the device rfkill state (if not yet in
the requested state), will be will be toggled accordingly.
For the "claim" entry writing 1 to it means that the kernel no longer handles
key events even though RFKILL_INPUT input was enabled. When "claim" has been
set to 0, userspace should make sure that it listens for the input events or
check the sysfs "state" entry regularly to correctly perform the required
tasks when the rkfill key is pressed.
check the sysfs "state" entry regularly to correctly perform the required tasks
when the rkfill key is pressed.
A note about input devices and EV_SW events:
In order to know the current state of an input device switch (like
SW_RFKILL_ALL), you will need to use an IOCTL. That information is not
available through sysfs in a generic way at this time, and it is not available
through the rfkill class AT ALL.

18
MAINTAINERS
View File

@ -2189,6 +2189,8 @@ P: Jesse Brandeburg
M: jesse.brandeburg@intel.com
P: Bruce Allan
M: bruce.w.allan@intel.com
P: PJ Waskiewicz
M: peter.p.waskiewicz.jr@intel.com
P: John Ronciak
M: john.ronciak@intel.com
L: e1000-devel@lists.sourceforge.net
@ -2725,12 +2727,10 @@ L: libertas-dev@lists.infradead.org
S: Maintained
MARVELL MV643XX ETHERNET DRIVER
P: Dale Farnsworth
M: dale@farnsworth.org
P: Manish Lachwani
M: mlachwani@mvista.com
P: Lennert Buytenhek
M: buytenh@marvell.com
L: netdev@vger.kernel.org
S: Odd Fixes for 2.4; Maintained for 2.6.
S: Supported
MATROX FRAMEBUFFER DRIVER
P: Petr Vandrovec
@ -3274,14 +3274,6 @@ L: linux-kernel@vger.kernel.org
T: git git.infradead.org/battery-2.6.git
S: Maintained
POWERPC 4xx EMAC DRIVER
P: Eugene Surovegin
M: ebs@ebshome.net
W: http://kernel.ebshome.net/emac/
L: linuxppc-dev@ozlabs.org
L: netdev@vger.kernel.org
S: Maintained
PNP SUPPORT
P: Adam Belay
M: ambx1@neo.rr.com

7
arch/blackfin/mach-bf527/boards/ezkit.c
View File

@ -323,10 +323,15 @@ static struct platform_device smc91x_device = {
static struct resource dm9000_resources[] = {
[0] = {
.start = 0x203FB800,
.end = 0x203FB800 + 8,
.end = 0x203FB800 + 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 0x203FB800 + 4,
.end = 0x203FB800 + 5,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = IRQ_PF9,
.end = IRQ_PF9,
.flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),

7
arch/blackfin/mach-bf533/boards/H8606.c
View File

@ -65,10 +65,15 @@ static struct platform_device rtc_device = {
static struct resource dm9000_resources[] = {
[0] = {
.start = 0x20300000,
.end = 0x20300000 + 8,
.end = 0x20300000 + 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 0x20300000 + 4,
.end = 0x20300000 + 5,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = IRQ_PF10,
.end = IRQ_PF10,
.flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),

7
arch/blackfin/mach-bf537/boards/generic_board.c
View File

@ -166,10 +166,15 @@ static struct platform_device smc91x_device = {
static struct resource dm9000_resources[] = {
[0] = {
.start = 0x203FB800,
.end = 0x203FB800 + 8,
.end = 0x203FB800 + 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 0x203FB800 + 4,
.end = 0x203FB800 + 5,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = IRQ_PF9,
.end = IRQ_PF9,
.flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),

79
drivers/atm/Kconfig
View File

@ -294,7 +294,7 @@ config ATM_HORIZON_DEBUG
config ATM_IA
tristate "Interphase ATM PCI x575/x525/x531"
depends on PCI && !64BIT
depends on PCI
---help---
This is a driver for the Interphase (i)ChipSAR adapter cards
which include a variety of variants in term of the size of the
@ -325,81 +325,22 @@ config ATM_IA_DEBUG
speed of the driver, and the size of your syslog files! When
inactive, they will have only a modest impact on performance.
config ATM_FORE200E_MAYBE
config ATM_FORE200E
tristate "FORE Systems 200E-series"
depends on PCI || SBUS
depends on (PCI || SBUS)
select FW_LOADER
---help---
This is a driver for the FORE Systems 200E-series ATM adapter
cards. It simultaneously supports PCA-200E and SBA-200E models
on PCI and SBUS hosts. Say Y (or M to compile as a module
named fore_200e) here if you have one of these ATM adapters.
Note that the driver will actually be compiled only if you
additionally enable the support for PCA-200E and/or SBA-200E
cards.
See the file <file:Documentation/networking/fore200e.txt> for
further details.
config ATM_FORE200E_PCA
bool "PCA-200E support"
depends on ATM_FORE200E_MAYBE && PCI
help
Say Y here if you want your PCA-200E cards to be probed.
config ATM_FORE200E_PCA_DEFAULT_FW
bool "Use default PCA-200E firmware (normally enabled)"
depends on ATM_FORE200E_PCA
help
Use the default PCA-200E firmware data shipped with the driver.
Normal users do not have to deal with the firmware stuff, so
they should say Y here.
config ATM_FORE200E_PCA_FW
string "Pathname of user-supplied binary firmware"
depends on ATM_FORE200E_PCA && !ATM_FORE200E_PCA_DEFAULT_FW
default ""
help
This defines the pathname of an alternative PCA-200E binary
firmware image supplied by the user. This pathname may be
absolute or relative to the drivers/atm directory.
The driver comes with an adequate firmware image, so normal users do
not have to supply an alternative one. They just say Y to "Use
default PCA-200E firmware" instead.
config ATM_FORE200E_SBA
bool "SBA-200E support"
depends on ATM_FORE200E_MAYBE && SBUS
help
Say Y here if you want your SBA-200E cards to be probed.
config ATM_FORE200E_SBA_DEFAULT_FW
bool "Use default SBA-200E firmware (normally enabled)"
depends on ATM_FORE200E_SBA
help
Use the default SBA-200E firmware data shipped with the driver.
Normal users do not have to deal with the firmware stuff, so
they should say Y here.
config ATM_FORE200E_SBA_FW
string "Pathname of user-supplied binary firmware"
depends on ATM_FORE200E_SBA && !ATM_FORE200E_SBA_DEFAULT_FW
default ""
help
This defines the pathname of an alternative SBA-200E binary
firmware image supplied by the user. This pathname may be
absolute or relative to the drivers/atm directory.
The driver comes with an adequate firmware image, so normal users do
not have to supply an alternative one. They just say Y to "Use
default SBA-200E firmware", above.
config ATM_FORE200E_USE_TASKLET
bool "Defer interrupt work to a tasklet"
depends on (PCI || SBUS) && (ATM_FORE200E_PCA || ATM_FORE200E_SBA)
depends on ATM_FORE200E
default n
help
This defers work to be done by the interrupt handler to a
@ -408,7 +349,7 @@ config ATM_FORE200E_USE_TASKLET
config ATM_FORE200E_TX_RETRY
int "Maximum number of tx retries"
depends on (PCI || SBUS) && (ATM_FORE200E_PCA || ATM_FORE200E_SBA)
depends on ATM_FORE200E
default "16"
---help---
Specifies the number of times the driver attempts to transmit
@ -425,7 +366,7 @@ config ATM_FORE200E_TX_RETRY
config ATM_FORE200E_DEBUG
int "Debugging level (0-3)"
depends on (PCI || SBUS) && (ATM_FORE200E_PCA || ATM_FORE200E_SBA)
depends on ATM_FORE200E
default "0"
help
Specifies the level of debugging messages issued by the driver.
@ -436,12 +377,6 @@ config ATM_FORE200E_DEBUG
the performances of the driver, and the size of your syslog files!
Keep the debugging level to 0 during normal operations.
config ATM_FORE200E
tristate
depends on (PCI || SBUS) && (ATM_FORE200E_PCA || ATM_FORE200E_SBA)
default m if ATM_FORE200E_MAYBE!=y
default y if ATM_FORE200E_MAYBE=y
config ATM_HE
tristate "ForeRunner HE Series"
depends on PCI

39
drivers/atm/Makefile
View File

@ -3,14 +3,6 @@
#
fore_200e-objs := fore200e.o
hostprogs-y := fore200e_mkfirm
# Files generated that shall be removed upon make clean
clean-files := pca200e.bin pca200e.bin1 pca200e.bin2 pca200e_ecd.bin \
pca200e_ecd.bin1 pca200e_ecd.bin2 sba200e_ecd.bin sba200e_ecd.bin1 \
sba200e_ecd.bin2
# Firmware generated that shall be removed upon make clean
clean-files += fore200e_pca_fw.c fore200e_sba_fw.c
obj-$(CONFIG_ATM_ZATM) += zatm.o uPD98402.o
obj-$(CONFIG_ATM_NICSTAR) += nicstar.o
@ -36,38 +28,7 @@ obj-$(CONFIG_ATM_TCP) += atmtcp.o
obj-$(CONFIG_ATM_FIRESTREAM) += firestream.o
obj-$(CONFIG_ATM_LANAI) += lanai.o
ifeq ($(CONFIG_ATM_FORE200E_PCA),y)
fore_200e-objs += fore200e_pca_fw.o
# guess the target endianess to choose the right PCA-200E firmware image
ifeq ($(CONFIG_ATM_FORE200E_PCA_DEFAULT_FW),y)
byteorder.h := include$(if $(patsubst $(srctree),,$(objtree)),2)/asm/byteorder.h
CONFIG_ATM_FORE200E_PCA_FW := $(obj)/pca200e$(if $(shell $(CC) $(KBUILD_CPPFLAGS) -E -dM $(byteorder.h) | grep ' __LITTLE_ENDIAN '),.bin,_ecd.bin2)
endif
endif
ifeq ($(CONFIG_ATM_FORE200E_SBA),y)
fore_200e-objs += fore200e_sba_fw.o
ifeq ($(CONFIG_ATM_FORE200E_SBA_DEFAULT_FW),y)
CONFIG_ATM_FORE200E_SBA_FW := $(obj)/sba200e_ecd.bin2
endif
endif
obj-$(CONFIG_ATM_HE) += he.o
ifeq ($(CONFIG_ATM_HE_USE_SUNI),y)
obj-$(CONFIG_ATM_HE) += suni.o
endif
# FORE Systems 200E-series firmware magic
$(obj)/fore200e_pca_fw.c: $(patsubst "%", %, $(CONFIG_ATM_FORE200E_PCA_FW)) \
$(obj)/fore200e_mkfirm
$(obj)/fore200e_mkfirm -k -b _fore200e_pca_fw \
-i $(CONFIG_ATM_FORE200E_PCA_FW) -o $@
$(obj)/fore200e_sba_fw.c: $(patsubst "%", %, $(CONFIG_ATM_FORE200E_SBA_FW)) \
$(obj)/fore200e_mkfirm
$(obj)/fore200e_mkfirm -k -b _fore200e_sba_fw \
-i $(CONFIG_ATM_FORE200E_SBA_FW) -o $@
# deal with the various suffixes of the binary firmware images
$(obj)/%.bin $(obj)/%.bin1 $(obj)/%.bin2: $(src)/%.data
objcopy -Iihex $< -Obinary $@.gz
gzip -n -df $@.gz

128
drivers/atm/fore200e.c
View File

@ -36,6 +36,7 @@
#include <linux/atm_suni.h>
#include <linux/dma-mapping.h>
#include <linux/delay.h>
#include <linux/firmware.h>
#include <asm/io.h>
#include <asm/string.h>
#include <asm/page.h>
@ -45,7 +46,7 @@
#include <asm/uaccess.h>
#include <asm/atomic.h>
#ifdef CONFIG_ATM_FORE200E_SBA
#ifdef CONFIG_SBUS
#include <asm/idprom.h>
#include <asm/sbus.h>
#include <asm/openprom.h>
@ -382,9 +383,6 @@ fore200e_shutdown(struct fore200e* fore200e)
case FORE200E_STATE_START_FW:
/* nothing to do for that state */
case FORE200E_STATE_LOAD_FW:
/* nothing to do for that state */
case FORE200E_STATE_RESET:
/* nothing to do for that state */
@ -405,7 +403,7 @@ fore200e_shutdown(struct fore200e* fore200e)
}
#ifdef CONFIG_ATM_FORE200E_PCA
#ifdef CONFIG_PCI
static u32 fore200e_pca_read(volatile u32 __iomem *addr)
{
@ -658,10 +656,10 @@ fore200e_pca_proc_read(struct fore200e* fore200e, char *page)
pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
}
#endif /* CONFIG_ATM_FORE200E_PCA */
#endif /* CONFIG_PCI */
#ifdef CONFIG_ATM_FORE200E_SBA
#ifdef CONFIG_SBUS
static u32
fore200e_sba_read(volatile u32 __iomem *addr)
@ -907,7 +905,7 @@ fore200e_sba_proc_read(struct fore200e* fore200e, char *page)
return sprintf(page, " SBUS slot/device:\t\t%d/'%s'\n", sbus_dev->slot, sbus_dev->prom_name);
}
#endif /* CONFIG_ATM_FORE200E_SBA */
#endif /* CONFIG_SBUS */
static void
@ -2552,13 +2550,53 @@ fore200e_monitor_puts(struct fore200e* fore200e, char* str)
while (fore200e_monitor_getc(fore200e) >= 0);
}
#ifdef __LITTLE_ENDIAN
#define FW_EXT ".bin"
#else
#define FW_EXT "_ecd.bin2"
#endif
static int __devinit
fore200e_start_fw(struct fore200e* fore200e)
fore200e_load_and_start_fw(struct fore200e* fore200e)
{
int ok;
char cmd[ 48 ];
struct fw_header* fw_header = (struct fw_header*) fore200e->bus->fw_data;
const struct firmware *firmware;
struct device *device;
struct fw_header *fw_header;
u32 *fw_data, fw_size;
u32 __iomem *load_addr;
char buf[48];
int err = -ENODEV;
if (strcmp(fore200e->bus->model_name, "PCA-200E") == 0)
device = &((struct pci_dev *) fore200e->bus_dev)->dev;
#ifdef CONFIG_SBUS
else if (strcmp(fore200e->bus->model_name, "SBA-200E") == 0)
device = &((struct sbus_dev *) fore200e->bus_dev)->ofdev.dev;
#endif
else
return err;
sprintf(buf, "%s%s", fore200e->bus->proc_name, FW_EXT);
if (request_firmware(&firmware, buf, device) == 1) {
printk(FORE200E "missing %s firmware image\n", fore200e->bus->model_name);
return err;
}
fw_data = (u32 *) firmware->data;
fw_size = firmware->size / sizeof(u32);
fw_header = (struct fw_header *) firmware->data;
load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n",
fore200e->name, load_addr, fw_size);
if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) {
printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name);
goto release;
}
for (; fw_size--; fw_data++, load_addr++)
fore200e->bus->write(le32_to_cpu(*fw_data), load_addr);
DPRINTK(2, "device %s firmware being started\n", fore200e->name);
@ -2567,46 +2605,22 @@ fore200e_start_fw(struct fore200e* fore200e)
fore200e_spin(100);
#endif
sprintf(cmd, "\rgo %x\r", le32_to_cpu(fw_header->start_offset));
sprintf(buf, "\rgo %x\r", le32_to_cpu(fw_header->start_offset));
fore200e_monitor_puts(fore200e, buf);
fore200e_monitor_puts(fore200e, cmd);
ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000);
if (ok == 0) {
if (fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000) == 0) {
printk(FORE200E "device %s firmware didn't start\n", fore200e->name);
return -ENODEV;
goto release;
}
printk(FORE200E "device %s firmware started\n", fore200e->name);
fore200e->state = FORE200E_STATE_START_FW;
return 0;
}
err = 0;
static int __devinit
fore200e_load_fw(struct fore200e* fore200e)
{
__le32* fw_data = (__le32*) fore200e->bus->fw_data;
u32 fw_size = (u32) *fore200e->bus->fw_size / sizeof(u32);
struct fw_header* fw_header = (struct fw_header*) fw_data;
u32 __iomem *load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n",
fore200e->name, load_addr, fw_size);
if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) {
printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name);
return -ENODEV;
}
for (; fw_size--; fw_data++, load_addr++)
fore200e->bus->write(le32_to_cpu(*fw_data), load_addr);
fore200e->state = FORE200E_STATE_LOAD_FW;
return 0;
release:
release_firmware(firmware);
return err;
}
@ -2652,10 +2666,7 @@ fore200e_init(struct fore200e* fore200e)
if (fore200e_reset(fore200e, 1) < 0)
return -ENODEV;
if (fore200e_load_fw(fore200e) < 0)
return -ENODEV;
if (fore200e_start_fw(fore200e) < 0)
if (fore200e_load_and_start_fw(fore200e) < 0)
return -ENODEV;
if (fore200e_initialize(fore200e) < 0)
@ -2689,7 +2700,7 @@ fore200e_init(struct fore200e* fore200e)
return 0;
}
#ifdef CONFIG_ATM_FORE200E_PCA
#ifdef CONFIG_PCI
static int __devinit
fore200e_pca_detect(struct pci_dev *pci_dev, const struct pci_device_id *pci_ent)
{
@ -2804,7 +2815,7 @@ fore200e_module_init(void)
}
}
#ifdef CONFIG_ATM_FORE200E_PCA
#ifdef CONFIG_PCI
if (!pci_register_driver(&fore200e_pca_driver))
return 0;
#endif
@ -2821,7 +2832,7 @@ fore200e_module_cleanup(void)
{
struct fore200e *fore200e, *next;
#ifdef CONFIG_ATM_FORE200E_PCA
#ifdef CONFIG_PCI
pci_unregister_driver(&fore200e_pca_driver);
#endif
@ -3140,19 +3151,9 @@ static const struct atmdev_ops fore200e_ops =
};
#ifdef CONFIG_ATM_FORE200E_PCA
extern const unsigned char _fore200e_pca_fw_data[];
extern const unsigned int _fore200e_pca_fw_size;
#endif
#ifdef CONFIG_ATM_FORE200E_SBA
extern const unsigned char _fore200e_sba_fw_data[];
extern const unsigned int _fore200e_sba_fw_size;
#endif
static const struct fore200e_bus fore200e_bus[] = {
#ifdef CONFIG_ATM_FORE200E_PCA
#ifdef CONFIG_PCI
{ "PCA-200E", "pca200e", 32, 4, 32,
_fore200e_pca_fw_data, &_fore200e_pca_fw_size,
fore200e_pca_read,
fore200e_pca_write,
fore200e_pca_dma_map,
@ -3173,9 +3174,8 @@ static const struct fore200e_bus fore200e_bus[] = {
fore200e_pca_proc_read,
},
#endif
#ifdef CONFIG_ATM_FORE200E_SBA
#ifdef CONFIG_SBUS
{ "SBA-200E", "sba200e", 32, 64, 32,
_fore200e_sba_fw_data, &_fore200e_sba_fw_size,
fore200e_sba_read,
fore200e_sba_write,
fore200e_sba_dma_map,

3
drivers/atm/fore200e.h
View File

@ -754,7 +754,6 @@ typedef enum fore200e_state {
FORE200E_STATE_CONFIGURE, /* bus interface configured */
FORE200E_STATE_MAP, /* board space mapped in host memory */
FORE200E_STATE_RESET, /* board resetted */
FORE200E_STATE_LOAD_FW, /* firmware loaded */
FORE200E_STATE_START_FW, /* firmware started */
FORE200E_STATE_INITIALIZE, /* initialize command successful */
FORE200E_STATE_INIT_CMDQ, /* command queue initialized */
@ -803,8 +802,6 @@ typedef struct fore200e_bus {
int descr_alignment; /* tpd/rpd/rbd DMA alignment requirement */
int buffer_alignment; /* rx buffers DMA alignment requirement */
int status_alignment; /* status words DMA alignment requirement */
const unsigned char* fw_data; /* address of firmware data start */
const unsigned int* fw_size; /* address of firmware data size */
u32 (*read)(volatile u32 __iomem *);
void (*write)(u32, volatile u32 __iomem *);
u32 (*dma_map)(struct fore200e*, void*, int, int);

31
drivers/atm/fore200e_firmware_copyright
View File

@ -1,31 +0,0 @@
These microcode data are placed under the terms of the GNU General Public License.
We would prefer you not to distribute modified versions of it and not to ask
for assembly or other microcode source.
Copyright (c) 1995-2000 FORE Systems, Inc., as an unpublished work. This
notice does not imply unrestricted or public access to these materials which
are a trade secret of FORE Systems, Inc. or its subsidiaries or affiliates
(together referred to as "FORE"), and which may not be reproduced, used, sold
or transferred to any third party without FORE's prior written consent. All
rights reserved.
U.S. Government Restricted Rights. If you are licensing the Software on
behalf of the U.S. Government ("Government"), the following provisions apply
to you. If the software is supplied to the Department of Defense ("DoD"), it
is classified as "Commercial Computer Software" under paragraph 252.227-7014
of the DoD Supplement to the Federal Acquisition Regulations ("DFARS") (or any
successor regulations) and the Government is acquiring only the license
rights granted herein (the license rights customarily provided to non-Government
users). If the Software is supplied to any unit or agency of the Government
other than the DoD, it is classified as "Restricted Computer Software" and
the Government's rights in the Software are defined in paragraph 52.227-19 of
the Federal Acquisition Regulations ("FAR") (or any successor regulations) or,
in the cases of NASA, in paragraph 18.52.227-86 of the NASA Supplement to the FAR
(or any successor regulations).
FORE Systems is a registered trademark, and ForeRunner, ForeRunnerLE, and
ForeThought are trademarks of FORE Systems, Inc. All other brands or product
names are trademarks or registered trademarks of their respective holders.

154
drivers/atm/fore200e_mkfirm.c
View File

@ -1,154 +0,0 @@
/*
mkfirm.c: generates a C readable file from a binary firmware image
Christophe Lizzi (lizzi@{csti.fr, cnam.fr}), June 1999.
This software may be used and distributed according to the terms
of the GNU General Public License, incorporated herein by reference.
*/
#include <stdio.h>
#include <stdlib.h>
#include <sys/types.h>
#include <time.h>
char* default_basename = "pca200e"; /* was initially written for the PCA-200E firmware */
char* default_infname = "<stdin>";
char* default_outfname = "<stdout>";
char* progname;
int verbose = 0;
int inkernel = 0;
void usage(void)
{
fprintf(stderr,
"%s: [-v] [-k] [-b basename ] [-i firmware.bin] [-o firmware.c]\n",
progname);
exit(-1);
}
int main(int argc, char** argv)
{
time_t now;
char* infname = NULL;
char* outfname = NULL;
char* basename = NULL;
FILE* infile;
FILE* outfile;
unsigned firmsize;
int c;
progname = *(argv++);
while (argc > 1) {
if ((*argv)[0] == '-') {
switch ((*argv)[1]) {
case 'i':
if (argc-- < 3)
usage();
infname = *(++argv);
break;
case 'o':
if (argc-- < 3)
usage();
outfname = *(++argv);
break;
case 'b':
if (argc-- < 3)
usage();
basename = *(++argv);
break;
case 'v':
verbose = 1;
break;
case 'k':
inkernel = 1;
break;
default:
usage();
}
}
else {
usage();
}
argc--;
argv++;
}
if (infname != NULL) {
infile = fopen(infname, "r");
if (infile == NULL) {
fprintf(stderr, "%s: can't open %s for reading\n",
progname, infname);
exit(-2);
}
}
else {
infile = stdin;
infname = default_infname;
}
if (outfname) {
outfile = fopen(outfname, "w");
if (outfile == NULL) {
fprintf(stderr, "%s: can't open %s for writing\n",
progname, outfname);
exit(-3);
}
}
else {
outfile = stdout;
outfname = default_outfname;
}
if (basename == NULL)
basename = default_basename;
if (verbose) {
fprintf(stderr, "%s: input file = %s\n", progname, infname );
fprintf(stderr, "%s: output file = %s\n", progname, outfname );
fprintf(stderr, "%s: firmware basename = %s\n", progname, basename );
}
time(&now);
fprintf(outfile, "/*\n generated by %s from %s on %s"
" DO NOT EDIT!\n*/\n\n",
progname, infname, ctime(&now));
if (inkernel)
fprintf(outfile, "#include <linux/init.h>\n\n" );
/* XXX force 32 bit alignment? */
fprintf(outfile, "const unsigned char%s %s_data[] = {\n",
inkernel ? " __initdata" : "", basename );
c = getc(infile);
fprintf(outfile,"\t0x%02x", c);
firmsize = 1;
while ((c = getc(infile)) >= 0) {
if (firmsize++ % 8)
fprintf(outfile,", 0x%02x", c);
else
fprintf(outfile,",\n\t0x%02x", c);
}
fprintf(outfile, "\n};\n\n");
fprintf(outfile, "const unsigned int%s %s_size = %u;\n",
inkernel ? " __initdata" : "", basename, firmsize );
if (infile != stdin)
fclose(infile);
if (outfile != stdout)
fclose(outfile);
if(verbose)
fprintf(stderr, "%s: firmware size = %u\n", progname, firmsize);
exit(0);
}

152
drivers/atm/he.c
View File

@ -75,14 +75,8 @@
#include <linux/atm.h>
#include <linux/sonet.h>
#define USE_TASKLET
#undef USE_SCATTERGATHER
#undef USE_CHECKSUM_HW /* still confused about this */
#define USE_RBPS
#undef USE_RBPS_POOL /* if memory is tight try this */
#undef USE_RBPL_POOL /* if memory is tight try this */
#define USE_TPD_POOL
/* #undef CONFIG_ATM_HE_USE_SUNI */
/* #undef HE_DEBUG */
#include "he.h"
@ -388,9 +382,7 @@ he_init_one(struct pci_dev *pci_dev, const struct pci_device_id *pci_ent)
he_dev->atm_dev->dev_data = he_dev;
atm_dev->dev_data = he_dev;
he_dev->number = atm_dev->number;
#ifdef USE_TASKLET
tasklet_init(&he_dev->tasklet, he_tasklet, (unsigned long) he_dev);
#endif
spin_lock_init(&he_dev->global_lock);
if (he_start(atm_dev)) {
@ -787,23 +779,13 @@ he_init_group(struct he_dev *he_dev, int group)
{
int i;
#ifdef USE_RBPS
/* small buffer pool */
#ifdef USE_RBPS_POOL
he_dev->rbps_pool = pci_pool_create("rbps", he_dev->pci_dev,
CONFIG_RBPS_BUFSIZE, 8, 0);
if (he_dev->rbps_pool == NULL) {
hprintk("unable to create rbps pages\n");
return -ENOMEM;
}
#else /* !USE_RBPS_POOL */
he_dev->rbps_pages = pci_alloc_consistent(he_dev->pci_dev,
CONFIG_RBPS_SIZE * CONFIG_RBPS_BUFSIZE, &he_dev->rbps_pages_phys);
if (he_dev->rbps_pages == NULL) {
hprintk("unable to create rbps page pool\n");
return -ENOMEM;
}
#endif /* USE_RBPS_POOL */
he_dev->rbps_base = pci_alloc_consistent(he_dev->pci_dev,
CONFIG_RBPS_SIZE * sizeof(struct he_rbp), &he_dev->rbps_phys);
@ -818,14 +800,9 @@ he_init_group(struct he_dev *he_dev, int group)
dma_addr_t dma_handle;
void *cpuaddr;
#ifdef USE_RBPS_POOL
cpuaddr = pci_pool_alloc(he_dev->rbps_pool, GFP_KERNEL|GFP_DMA, &dma_handle);
if (cpuaddr == NULL)
return -ENOMEM;
#else
cpuaddr = he_dev->rbps_pages + (i * CONFIG_RBPS_BUFSIZE);
dma_handle = he_dev->rbps_pages_phys + (i * CONFIG_RBPS_BUFSIZE);
#endif
he_dev->rbps_virt[i].virt = cpuaddr;
he_dev->rbps_base[i].status = RBP_LOANED | RBP_SMALLBUF | (i << RBP_INDEX_OFF);
@ -844,30 +821,14 @@ he_init_group(struct he_dev *he_dev, int group)
RBP_QSIZE(CONFIG_RBPS_SIZE - 1) |
RBP_INT_ENB,
G0_RBPS_QI + (group * 32));
#else /* !USE_RBPS */
he_writel(he_dev, 0x0, G0_RBPS_S + (group * 32));
he_writel(he_dev, 0x0, G0_RBPS_T + (group * 32));
he_writel(he_dev, 0x0, G0_RBPS_QI + (group * 32));
he_writel(he_dev, RBP_THRESH(0x1) | RBP_QSIZE(0x0),
G0_RBPS_BS + (group * 32));
#endif /* USE_RBPS */
/* large buffer pool */
#ifdef USE_RBPL_POOL
he_dev->rbpl_pool = pci_pool_create("rbpl", he_dev->pci_dev,
CONFIG_RBPL_BUFSIZE, 8, 0);
if (he_dev->rbpl_pool == NULL) {
hprintk("unable to create rbpl pool\n");
return -ENOMEM;
}
#else /* !USE_RBPL_POOL */
he_dev->rbpl_pages = (void *) pci_alloc_consistent(he_dev->pci_dev,
CONFIG_RBPL_SIZE * CONFIG_RBPL_BUFSIZE, &he_dev->rbpl_pages_phys);
if (he_dev->rbpl_pages == NULL) {
hprintk("unable to create rbpl pages\n");
return -ENOMEM;
}
#endif /* USE_RBPL_POOL */
he_dev->rbpl_base = pci_alloc_consistent(he_dev->pci_dev,
CONFIG_RBPL_SIZE * sizeof(struct he_rbp), &he_dev->rbpl_phys);
@ -882,14 +843,9 @@ he_init_group(struct he_dev *he_dev, int group)
dma_addr_t dma_handle;
void *cpuaddr;
#ifdef USE_RBPL_POOL
cpuaddr = pci_pool_alloc(he_dev->rbpl_pool, GFP_KERNEL|GFP_DMA, &dma_handle);
if (cpuaddr == NULL)
return -ENOMEM;
#else
cpuaddr = he_dev->rbpl_pages + (i * CONFIG_RBPL_BUFSIZE);
dma_handle = he_dev->rbpl_pages_phys + (i * CONFIG_RBPL_BUFSIZE);
#endif
he_dev->rbpl_virt[i].virt = cpuaddr;
he_dev->rbpl_base[i].status = RBP_LOANED | (i << RBP_INDEX_OFF);
@ -1475,7 +1431,6 @@ he_start(struct atm_dev *dev)
he_init_tpdrq(he_dev);
#ifdef USE_TPD_POOL
he_dev->tpd_pool = pci_pool_create("tpd", he_dev->pci_dev,
sizeof(struct he_tpd), TPD_ALIGNMENT, 0);
if (he_dev->tpd_pool == NULL) {
@ -1484,20 +1439,6 @@ he_start(struct atm_dev *dev)
}
INIT_LIST_HEAD(&he_dev->outstanding_tpds);
#else
he_dev->tpd_base = (void *) pci_alloc_consistent(he_dev->pci_dev,
CONFIG_NUMTPDS * sizeof(struct he_tpd), &he_dev->tpd_base_phys);
if (!he_dev->tpd_base)
return -ENOMEM;
for (i = 0; i < CONFIG_NUMTPDS; ++i) {
he_dev->tpd_base[i].status = (i << TPD_ADDR_SHIFT);
he_dev->tpd_base[i].inuse = 0;
}
he_dev->tpd_head = he_dev->tpd_base;
he_dev->tpd_end = &he_dev->tpd_base[CONFIG_NUMTPDS - 1];
#endif
if (he_init_group(he_dev, 0) != 0)
return -ENOMEM;
@ -1606,9 +1547,7 @@ he_stop(struct he_dev *he_dev)
gen_cntl_0 &= ~(INT_PROC_ENBL | INIT_ENB);
pci_write_config_dword(pci_dev, GEN_CNTL_0, gen_cntl_0);
#ifdef USE_TASKLET
tasklet_disable(&he_dev->tasklet);
#endif
/* disable recv and transmit */
@ -1638,7 +1577,6 @@ he_stop(struct he_dev *he_dev)
he_dev->hsp, he_dev->hsp_phys);
if (he_dev->rbpl_base) {
#ifdef USE_RBPL_POOL
int i;
for (i = 0; i < CONFIG_RBPL_SIZE; ++i) {
@ -1647,22 +1585,14 @@ he_stop(struct he_dev *he_dev)
pci_pool_free(he_dev->rbpl_pool, cpuaddr, dma_handle);
}
#else
pci_free_consistent(he_dev->pci_dev, CONFIG_RBPL_SIZE
* CONFIG_RBPL_BUFSIZE, he_dev->rbpl_pages, he_dev->rbpl_pages_phys);
#endif
pci_free_consistent(he_dev->pci_dev, CONFIG_RBPL_SIZE
* sizeof(struct he_rbp), he_dev->rbpl_base, he_dev->rbpl_phys);
}
#ifdef USE_RBPL_POOL
if (he_dev->rbpl_pool)
pci_pool_destroy(he_dev->rbpl_pool);
#endif
#ifdef USE_RBPS
if (he_dev->rbps_base) {
#ifdef USE_RBPS_POOL
int i;
for (i = 0; i < CONFIG_RBPS_SIZE; ++i) {
@ -1671,20 +1601,12 @@ he_stop(struct he_dev *he_dev)
pci_pool_free(he_dev->rbps_pool, cpuaddr, dma_handle);
}
#else
pci_free_consistent(he_dev->pci_dev, CONFIG_RBPS_SIZE
* CONFIG_RBPS_BUFSIZE, he_dev->rbps_pages, he_dev->rbps_pages_phys);
#endif
pci_free_consistent(he_dev->pci_dev, CONFIG_RBPS_SIZE
* sizeof(struct he_rbp), he_dev->rbps_base, he_dev->rbps_phys);
}
#ifdef USE_RBPS_POOL
if (he_dev->rbps_pool)
pci_pool_destroy(he_dev->rbps_pool);
#endif
#endif /* USE_RBPS */
if (he_dev->rbrq_base)
pci_free_consistent(he_dev->pci_dev, CONFIG_RBRQ_SIZE * sizeof(struct he_rbrq),
@ -1698,14 +1620,8 @@ he_stop(struct he_dev *he_dev)
pci_free_consistent(he_dev->pci_dev, CONFIG_TBRQ_SIZE * sizeof(struct he_tbrq),
he_dev->tpdrq_base, he_dev->tpdrq_phys);
#ifdef USE_TPD_POOL
if (he_dev->tpd_pool)
pci_pool_destroy(he_dev->tpd_pool);
#else
if (he_dev->tpd_base)
pci_free_consistent(he_dev->pci_dev, CONFIG_NUMTPDS * sizeof(struct he_tpd),
he_dev->tpd_base, he_dev->tpd_base_phys);
#endif
if (he_dev->pci_dev) {
pci_read_config_word(he_dev->pci_dev, PCI_COMMAND, &command);
@ -1720,7 +1636,6 @@ he_stop(struct he_dev *he_dev)
static struct he_tpd *
__alloc_tpd(struct he_dev *he_dev)
{
#ifdef USE_TPD_POOL
struct he_tpd *tpd;
dma_addr_t dma_handle;
@ -1735,27 +1650,6 @@ __alloc_tpd(struct he_dev *he_dev)
tpd->iovec[2].addr = 0; tpd->iovec[2].len = 0;
return tpd;
#else
int i;
for (i = 0; i < CONFIG_NUMTPDS; ++i) {
++he_dev->tpd_head;
if (he_dev->tpd_head > he_dev->tpd_end) {
he_dev->tpd_head = he_dev->tpd_base;
}
if (!he_dev->tpd_head->inuse) {
he_dev->tpd_head->inuse = 1;
he_dev->tpd_head->status &= TPD_MASK;
he_dev->tpd_head->iovec[0].addr = 0; he_dev->tpd_head->iovec[0].len = 0;
he_dev->tpd_head->iovec[1].addr = 0; he_dev->tpd_head->iovec[1].len = 0;
he_dev->tpd_head->iovec[2].addr = 0; he_dev->tpd_head->iovec[2].len = 0;
return he_dev->tpd_head;
}
}
hprintk("out of tpds -- increase CONFIG_NUMTPDS (%d)\n", CONFIG_NUMTPDS);
return NULL;
#endif
}
#define AAL5_LEN(buf,len) \
@ -1804,11 +1698,9 @@ he_service_rbrq(struct he_dev *he_dev, int group)
RBRQ_CON_CLOSED(he_dev->rbrq_head) ? " CON_CLOSED" : "",
RBRQ_HBUF_ERR(he_dev->rbrq_head) ? " HBUF_ERR" : "");
#ifdef USE_RBPS
if (RBRQ_ADDR(he_dev->rbrq_head) & RBP_SMALLBUF)
rbp = &he_dev->rbps_base[RBP_INDEX(RBRQ_ADDR(he_dev->rbrq_head))];
else
#endif
rbp = &he_dev->rbpl_base[RBP_INDEX(RBRQ_ADDR(he_dev->rbrq_head))];
buf_len = RBRQ_BUFLEN(he_dev->rbrq_head) * 4;
@ -1887,12 +1779,10 @@ he_service_rbrq(struct he_dev *he_dev, int group)
for (iov = he_vcc->iov_head;
iov < he_vcc->iov_tail; ++iov) {
#ifdef USE_RBPS
if (iov->iov_base & RBP_SMALLBUF)
memcpy(skb_put(skb, iov->iov_len),
he_dev->rbps_virt[RBP_INDEX(iov->iov_base)].virt, iov->iov_len);
else
#endif
memcpy(skb_put(skb, iov->iov_len),
he_dev->rbpl_virt[RBP_INDEX(iov->iov_base)].virt, iov->iov_len);
}
@ -1937,11 +1827,9 @@ return_host_buffers:
for (iov = he_vcc->iov_head;
iov < he_vcc->iov_tail; ++iov) {
#ifdef USE_RBPS
if (iov->iov_base & RBP_SMALLBUF)
rbp = &he_dev->rbps_base[RBP_INDEX(iov->iov_base)];
else
#endif
rbp = &he_dev->rbpl_base[RBP_INDEX(iov->iov_base)];
rbp->status &= ~RBP_LOANED;
@ -1977,9 +1865,7 @@ he_service_tbrq(struct he_dev *he_dev, int group)
he_dev->hsp->group[group].tbrq_tail);
struct he_tpd *tpd;
int slot, updated = 0;
#ifdef USE_TPD_POOL
struct he_tpd *__tpd;
#endif
/* 2.1.6 transmit buffer return queue */
@ -1991,7 +1877,6 @@ he_service_tbrq(struct he_dev *he_dev, int group)
TBRQ_TPD(he_dev->tbrq_head),
TBRQ_EOS(he_dev->tbrq_head) ? " EOS" : "",
TBRQ_MULTIPLE(he_dev->tbrq_head) ? " MULTIPLE" : "");
#ifdef USE_TPD_POOL
tpd = NULL;
list_for_each_entry(__tpd, &he_dev->outstanding_tpds, entry) {
if (TPD_ADDR(__tpd->status) == TBRQ_TPD(he_dev->tbrq_head)) {
@ -2006,9 +1891,6 @@ he_service_tbrq(struct he_dev *he_dev, int group)
TBRQ_TPD(he_dev->tbrq_head));
goto next_tbrq_entry;
}
#else
tpd = &he_dev->tpd_base[ TPD_INDEX(TBRQ_TPD(he_dev->tbrq_head)) ];
#endif
if (TBRQ_EOS(he_dev->tbrq_head)) {
HPRINTK("wake_up(tx_waitq) cid 0x%x\n",
@ -2038,12 +1920,8 @@ he_service_tbrq(struct he_dev *he_dev, int group)
}
next_tbrq_entry:
#ifdef USE_TPD_POOL
if (tpd)
pci_pool_free(he_dev->tpd_pool, tpd, TPD_ADDR(tpd->status));
#else
tpd->inuse = 0;
#endif
he_dev->tbrq_head = (struct he_tbrq *)
((unsigned long) he_dev->tbrq_base |
TBRQ_MASK(++he_dev->tbrq_head));
@ -2086,7 +1964,6 @@ he_service_rbpl(struct he_dev *he_dev, int group)
he_writel(he_dev, RBPL_MASK(he_dev->rbpl_tail), G0_RBPL_T);
}
#ifdef USE_RBPS
static void
he_service_rbps(struct he_dev *he_dev, int group)
{
@ -2113,7 +1990,6 @@ he_service_rbps(struct he_dev *he_dev, int group)
if (moved)
he_writel(he_dev, RBPS_MASK(he_dev->rbps_tail), G0_RBPS_T);
}
#endif /* USE_RBPS */
static void
he_tasklet(unsigned long data)
@ -2124,9 +2000,7 @@ he_tasklet(unsigned long data)
int updated = 0;
HPRINTK("tasklet (0x%lx)\n", data);
#ifdef USE_TASKLET
spin_lock_irqsave(&he_dev->global_lock, flags);
#endif
while (he_dev->irq_head != he_dev->irq_tail) {
++updated;
@ -2141,9 +2015,7 @@ he_tasklet(unsigned long data)
case ITYPE_RBRQ_TIMER:
if (he_service_rbrq(he_dev, group)) {
he_service_rbpl(he_dev, group);
#ifdef USE_RBPS
he_service_rbps(he_dev, group);
#endif /* USE_RBPS */
}
break;
case ITYPE_TBRQ_THRESH:
@ -2156,9 +2028,7 @@ he_tasklet(unsigned long data)
he_service_rbpl(he_dev, group);
break;
case ITYPE_RBPS_THRESH:
#ifdef USE_RBPS
he_service_rbps(he_dev, group);
#endif /* USE_RBPS */
break;
case ITYPE_PHY:
HPRINTK("phy interrupt\n");
@ -2186,9 +2056,7 @@ he_tasklet(unsigned long data)
he_service_rbrq(he_dev, 0);
he_service_rbpl(he_dev, 0);
#ifdef USE_RBPS
he_service_rbps(he_dev, 0);
#endif /* USE_RBPS */
he_service_tbrq(he_dev, 0);
break;
default:
@ -2210,9 +2078,7 @@ he_tasklet(unsigned long data)
IRQ_TAIL(he_dev->irq_tail), IRQ0_HEAD);
(void) he_readl(he_dev, INT_FIFO); /* 8.1.2 controller errata; flush posted writes */
}
#ifdef USE_TASKLET
spin_unlock_irqrestore(&he_dev->global_lock, flags);
#endif
}
static irqreturn_t
@ -2244,11 +2110,7 @@ he_irq_handler(int irq, void *dev_id)
if (he_dev->irq_head != he_dev->irq_tail) {
handled = 1;
#ifdef USE_TASKLET
tasklet_schedule(&he_dev->tasklet);
#else
he_tasklet((unsigned long) he_dev);
#endif
he_writel(he_dev, INT_CLEAR_A, INT_FIFO); /* clear interrupt */
(void) he_readl(he_dev, INT_FIFO); /* flush posted writes */
}
@ -2305,23 +2167,14 @@ __enqueue_tpd(struct he_dev *he_dev, struct he_tpd *tpd, unsigned cid)
dev_kfree_skb_any(tpd->skb);
atomic_inc(&tpd->vcc->stats->tx_err);
}
#ifdef USE_TPD_POOL
pci_pool_free(he_dev->tpd_pool, tpd, TPD_ADDR(tpd->status));
#else
tpd->inuse = 0;
#endif
return;
}
}
/* 2.1.5 transmit packet descriptor ready queue */
#ifdef USE_TPD_POOL
list_add_tail(&tpd->entry, &he_dev->outstanding_tpds);
he_dev->tpdrq_tail->tpd = TPD_ADDR(tpd->status);
#else
he_dev->tpdrq_tail->tpd = he_dev->tpd_base_phys +
(TPD_INDEX(tpd->status) * sizeof(struct he_tpd));
#endif
he_dev->tpdrq_tail->cid = cid;
wmb();
@ -2511,13 +2364,8 @@ he_open(struct atm_vcc *vcc)
goto open_failed;
}
#ifdef USE_RBPS
rsr1 = RSR1_GROUP(0);
rsr4 = RSR4_GROUP(0);
#else /* !USE_RBPS */
rsr1 = RSR1_GROUP(0)|RSR1_RBPL_ONLY;
rsr4 = RSR4_GROUP(0)|RSR4_RBPL_ONLY;
#endif /* USE_RBPS */
rsr0 = vcc->qos.rxtp.traffic_class == ATM_UBR ?
(RSR0_EPD_ENABLE|RSR0_PPD_ENABLE) : 0;

26
drivers/atm/he.h
View File

@ -51,8 +51,6 @@
#define CONFIG_IRQ_SIZE 128
#define CONFIG_IRQ_THRESH (CONFIG_IRQ_SIZE/2)
#define CONFIG_NUMTPDS 256
#define CONFIG_TPDRQ_SIZE 512
#define TPDRQ_MASK(x) (((unsigned long)(x))&((CONFIG_TPDRQ_SIZE<<3)-1))
@ -140,12 +138,7 @@ struct he_tpd {
struct sk_buff *skb;
struct atm_vcc *vcc;
#ifdef USE_TPD_POOL
struct list_head entry;
#else
u32 inuse;
char padding[32 - sizeof(u32) - (2*sizeof(void*))];
#endif
};
#define TPD_ALIGNMENT 64
@ -291,16 +284,9 @@ struct he_dev {
volatile unsigned *irq_tailoffset;
int irq_peak;
#ifdef USE_TASKLET
struct tasklet_struct tasklet;
#endif
#ifdef USE_TPD_POOL
struct pci_pool *tpd_pool;
struct list_head outstanding_tpds;
#else
struct he_tpd *tpd_head, *tpd_base, *tpd_end;
dma_addr_t tpd_base_phys;
#endif
dma_addr_t tpdrq_phys;
struct he_tpdrq *tpdrq_base, *tpdrq_tail, *tpdrq_head;
@ -311,25 +297,13 @@ struct he_dev {
struct he_rbrq *rbrq_base, *rbrq_head;
int rbrq_peak;
#ifdef USE_RBPL_POOL
struct pci_pool *rbpl_pool;
#else
void *rbpl_pages;
dma_addr_t rbpl_pages_phys;
#endif
dma_addr_t rbpl_phys;
struct he_rbp *rbpl_base, *rbpl_tail;
struct he_virt *rbpl_virt;
int rbpl_peak;
#ifdef USE_RBPS
#ifdef USE_RBPS_POOL
struct pci_pool *rbps_pool;
#else
void *rbps_pages;
dma_addr_t rbps_pages_phys;
#endif
#endif
dma_addr_t rbps_phys;
struct he_rbp *rbps_base, *rbps_tail;
struct he_virt *rbps_virt;

30
drivers/atm/iphase.c
View File

@ -65,12 +65,7 @@
#include "iphase.h"
#include "suni.h"
#define swap(x) (((x & 0xff) << 8) | ((x & 0xff00) >> 8))
struct suni_priv {
struct k_sonet_stats sonet_stats; /* link diagnostics */
unsigned char loop_mode; /* loopback mode */
struct atm_dev *dev; /* device back-pointer */
struct suni_priv *next; /* next SUNI */
};
#define PRIV(dev) ((struct suni_priv *) dev->phy_data)
static unsigned char ia_phy_get(struct atm_dev *dev, unsigned long addr);
@ -94,10 +89,6 @@ module_param(IADebugFlag, uint, 0644);
MODULE_LICENSE("GPL");
#if BITS_PER_LONG != 32
# error FIXME: this driver only works on 32-bit platforms
#endif
/**************************** IA_LIB **********************************/
static void ia_init_rtn_q (IARTN_Q *que)
@ -1411,7 +1402,6 @@ static int rx_init(struct atm_dev *dev)
struct abr_vc_table *abr_vc_table;
u16 *vc_table;
u16 *reass_table;
u16 *ptr16;
int i,j, vcsize_sel;
u_short freeq_st_adr;
u_short *freeq_start;
@ -1426,14 +1416,15 @@ static int rx_init(struct atm_dev *dev)
printk(KERN_ERR DEV_LABEL "can't allocate DLEs\n");
goto err_out;
}
iadev->rx_dle_q.start = (struct dle*)dle_addr;
iadev->rx_dle_q.start = (struct dle *)dle_addr;
iadev->rx_dle_q.read = iadev->rx_dle_q.start;
iadev->rx_dle_q.write = iadev->rx_dle_q.start;
iadev->rx_dle_q.end = (struct dle*)((u32)dle_addr+sizeof(struct dle)*DLE_ENTRIES);
iadev->rx_dle_q.end = (struct dle*)((unsigned long)dle_addr+sizeof(struct dle)*DLE_ENTRIES);
/* the end of the dle q points to the entry after the last
DLE that can be used. */
/* write the upper 20 bits of the start address to rx list address register */
/* We know this is 32bit bus addressed so the following is safe */
writel(iadev->rx_dle_dma & 0xfffff000,
iadev->dma + IPHASE5575_RX_LIST_ADDR);
IF_INIT(printk("Tx Dle list addr: 0x%08x value: 0x%0x\n",
@ -1587,11 +1578,12 @@ static int rx_init(struct atm_dev *dev)
Set Packet Aging Interval count register to overflow in about 4 us
*/
writew(0xF6F8, iadev->reass_reg+PKT_TM_CNT );
ptr16 = (u16*)j;
i = ((u32)ptr16 >> 6) & 0xff;
ptr16 += j - 1;
i |=(((u32)ptr16 << 2) & 0xff00);
i = (j >> 6) & 0xFF;
j += 2 * (j - 1);
i |= ((j << 2) & 0xFF00);
writew(i, iadev->reass_reg+TMOUT_RANGE);
/* initiate the desc_tble */
for(i=0; i<iadev->num_tx_desc;i++)
iadev->desc_tbl[i].timestamp = 0;
@ -1914,7 +1906,7 @@ static int tx_init(struct atm_dev *dev)
iadev->tx_dle_q.start = (struct dle*)dle_addr;
iadev->tx_dle_q.read = iadev->tx_dle_q.start;
iadev->tx_dle_q.write = iadev->tx_dle_q.start;
iadev->tx_dle_q.end = (struct dle*)((u32)dle_addr+sizeof(struct dle)*DLE_ENTRIES);
iadev->tx_dle_q.end = (struct dle*)((unsigned long)dle_addr+sizeof(struct dle)*DLE_ENTRIES);
/* write the upper 20 bits of the start address to tx list address register */
writel(iadev->tx_dle_dma & 0xfffff000,
@ -2907,7 +2899,7 @@ static int ia_pkt_tx (struct atm_vcc *vcc, struct sk_buff *skb) {
dev_kfree_skb_any(skb);
return 0;
}
if ((u32)skb->data & 3) {
if ((unsigned long)skb->data & 3) {
printk("Misaligned SKB\n");
if (vcc->pop)
vcc->pop(vcc, skb);

850
drivers/atm/pca200e.data
View File

@ -1,850 +0,0 @@
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130
drivers/atm/suni.c
View File

@ -1,8 +1,14 @@
/* drivers/atm/suni.c - PMC PM5346 SUNI (PHY) driver */
/*
* drivers/atm/suni.c - S/UNI PHY driver
*
* Supports the following:
* PMC PM5346 S/UNI LITE
* PMC PM5350 S/UNI 155 ULTRA
* PMC PM5355 S/UNI 622
*/
/* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
#include <linux/module.h>
#include <linux/jiffies.h>
#include <linux/kernel.h>
@ -29,15 +35,6 @@
#define DPRINTK(format,args...)
#endif
struct suni_priv {
struct k_sonet_stats sonet_stats; /* link diagnostics */
int loop_mode; /* loopback mode */
struct atm_dev *dev; /* device back-pointer */
struct suni_priv *next; /* next SUNI */
};
#define PRIV(dev) ((struct suni_priv *) dev->phy_data)
#define PUT(val,reg) dev->ops->phy_put(dev,val,SUNI_##reg)
@ -155,25 +152,105 @@ static int get_diag(struct atm_dev *dev,void __user *arg)
static int set_loopback(struct atm_dev *dev,int mode)
{
unsigned char control;
int reg, dle, lle;
control = GET(MCT) & ~(SUNI_MCT_DLE | SUNI_MCT_LLE);
if (PRIV(dev)->type == SUNI_MRI_TYPE_PM5355) {
reg = SUNI_MCM;
dle = SUNI_MCM_DLE;
lle = SUNI_MCM_LLE;
} else {
reg = SUNI_MCT;
dle = SUNI_MCT_DLE;
lle = SUNI_MCT_LLE;
}
control = dev->ops->phy_get(dev, reg) & ~(dle | lle);
switch (mode) {
case ATM_LM_NONE:
break;
case ATM_LM_LOC_PHY:
control |= SUNI_MCT_DLE;
control |= dle;
break;
case ATM_LM_RMT_PHY:
control |= SUNI_MCT_LLE;
control |= lle;
break;
default:
return -EINVAL;
}
PUT(control,MCT);
dev->ops->phy_put(dev, control, reg);
PRIV(dev)->loop_mode = mode;
return 0;
}
/*
* SONET vs. SDH Configuration
*
* Z0INS (register 0x06): 0 for SONET, 1 for SDH
* ENSS (register 0x3D): 0 for SONET, 1 for SDH
* LEN16 (register 0x28): 0 for SONET, 1 for SDH (n/a for S/UNI 155 QUAD)
* LEN16 (register 0x50): 0 for SONET, 1 for SDH (n/a for S/UNI 155 QUAD)
* S[1:0] (register 0x46): 00 for SONET, 10 for SDH
*/
static int set_sonet(struct atm_dev *dev)
{
if (PRIV(dev)->type == SUNI_MRI_TYPE_PM5355) {
PUT(GET(RPOP_RC) & ~SUNI_RPOP_RC_ENSS, RPOP_RC);
PUT(GET(SSTB_CTRL) & ~SUNI_SSTB_CTRL_LEN16, SSTB_CTRL);
PUT(GET(SPTB_CTRL) & ~SUNI_SPTB_CTRL_LEN16, SPTB_CTRL);
}
REG_CHANGE(SUNI_TPOP_APM_S, SUNI_TPOP_APM_S_SHIFT,
SUNI_TPOP_S_SONET, TPOP_APM);
return 0;
}
static int set_sdh(struct atm_dev *dev)
{
if (PRIV(dev)->type == SUNI_MRI_TYPE_PM5355) {
PUT(GET(RPOP_RC) | SUNI_RPOP_RC_ENSS, RPOP_RC);
PUT(GET(SSTB_CTRL) | SUNI_SSTB_CTRL_LEN16, SSTB_CTRL);
PUT(GET(SPTB_CTRL) | SUNI_SPTB_CTRL_LEN16, SPTB_CTRL);
}
REG_CHANGE(SUNI_TPOP_APM_S, SUNI_TPOP_APM_S_SHIFT,
SUNI_TPOP_S_SDH, TPOP_APM);
return 0;
}
static int get_framing(struct atm_dev *dev, void __user *arg)
{
int framing;
unsigned char s;
s = (GET(TPOP_APM) & SUNI_TPOP_APM_S) >> SUNI_TPOP_APM_S_SHIFT;
if (s == SUNI_TPOP_S_SONET)
framing = SONET_FRAME_SONET;
else
framing = SONET_FRAME_SDH;
return put_user(framing, (int __user *) arg) ? -EFAULT : 0;
}
static int set_framing(struct atm_dev *dev, void __user *arg)
{
int mode;
if (get_user(mode, (int __user *) arg))
return -EFAULT;
if (mode == SONET_FRAME_SONET)
return set_sonet(dev);
else if (mode == SONET_FRAME_SDH)
return set_sdh(dev);
return -EINVAL;
}
static int suni_ioctl(struct atm_dev *dev,unsigned int cmd,void __user *arg)
{
@ -188,14 +265,16 @@ static int suni_ioctl(struct atm_dev *dev,unsigned int cmd,void __user *arg)
case SONET_GETDIAG:
return get_diag(dev,arg);
case SONET_SETFRAMING:
if ((int)(unsigned long)arg != SONET_FRAME_SONET) return -EINVAL;
return 0;
if (!capable(CAP_NET_ADMIN))
return -EPERM;
return set_framing(dev, arg);
case SONET_GETFRAMING:
return put_user(SONET_FRAME_SONET,(int __user *)arg) ?
-EFAULT : 0;
return get_framing(dev, arg);
case SONET_GETFRSENSE:
return -EINVAL;
case ATM_SETLOOP:
if (!capable(CAP_NET_ADMIN))
return -EPERM;
return set_loopback(dev,(int)(unsigned long)arg);
case ATM_GETLOOP:
return put_user(PRIV(dev)->loop_mode,(int __user *)arg) ?
@ -229,10 +308,6 @@ static int suni_start(struct atm_dev *dev)
unsigned long flags;
int first;
if (!(dev->phy_data = kmalloc(sizeof(struct suni_priv),GFP_KERNEL)))
return -ENOMEM;
PRIV(dev)->dev = dev;
spin_lock_irqsave(&sunis_lock,flags);
first = !sunis;
PRIV(dev)->next = sunis;
@ -293,16 +368,21 @@ int suni_init(struct atm_dev *dev)
{
unsigned char mri;
if (!(dev->phy_data = kmalloc(sizeof(struct suni_priv),GFP_KERNEL)))
return -ENOMEM;
PRIV(dev)->dev = dev;
mri = GET(MRI); /* reset SUNI */
PRIV(dev)->type = (mri & SUNI_MRI_TYPE) >> SUNI_MRI_TYPE_SHIFT;
PUT(mri | SUNI_MRI_RESET,MRI);
PUT(mri,MRI);
PUT((GET(MT) & SUNI_MT_DS27_53),MT); /* disable all tests */
REG_CHANGE(SUNI_TPOP_APM_S,SUNI_TPOP_APM_S_SHIFT,SUNI_TPOP_S_SONET,
TPOP_APM); /* use SONET */
set_sonet(dev);
REG_CHANGE(SUNI_TACP_IUCHP_CLP,0,SUNI_TACP_IUCHP_CLP,
TACP_IUCHP); /* idle cells */
PUT(SUNI_IDLE_PATTERN,TACP_IUCPOP);
dev->phy = &suni_ops;
return 0;
}

40
drivers/atm/suni.h
View File

@ -1,14 +1,15 @@
/* drivers/atm/suni.h - PMC PM5346 SUNI (PHY) declarations */
/*
* drivers/atm/suni.h - S/UNI PHY driver
*/
/* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
#ifndef DRIVER_ATM_SUNI_H
#define DRIVER_ATM_SUNI_H
#include <linux/atmdev.h>
#include <linux/atmioc.h>
#include <linux/sonet.h>
/* SUNI registers */
@ -39,7 +40,8 @@
#define SUNI_RLOP_LFM 0x1F /* RLOP Line FEBE MSB */
#define SUNI_TLOP_CTRL 0x20 /* TLOP Control */
#define SUNI_TLOP_DIAG 0x21 /* TLOP Diagnostic */
/* 0x22-0x2F reserved */
/* 0x22-0x27 reserved */
#define SUNI_SSTB_CTRL 0x28
#define SUNI_RPOP_SC 0x30 /* RPOP Status/Control */
#define SUNI_RPOP_IS 0x31 /* RPOP Interrupt Status */
/* 0x32 reserved */
@ -52,6 +54,7 @@
#define SUNI_RPOP_PFM 0x3B /* RPOP Path FEBE MSB */
/* 0x3C reserved */
#define SUNI_RPOP_PBC 0x3D /* RPOP Path BIP-8 Configuration */
#define SUNI_RPOP_RC 0x3D /* RPOP Ring Control (PM5355) */
/* 0x3E-0x3F reserved */
#define SUNI_TPOP_CD 0x40 /* TPOP Control/Diagnostic */
#define SUNI_TPOP_PC 0x41 /* TPOP Pointer Control */
@ -82,7 +85,8 @@
#define SUNI_TACP_TCC 0x65 /* TACP Transmit Cell Counter */
#define SUNI_TACP_TCCM 0x66 /* TACP Transmit Cell Counter MSB */
#define SUNI_TACP_CFG 0x67 /* TACP Configuration */
/* 0x68-0x7F reserved */
#define SUNI_SPTB_CTRL 0x68 /* SPTB Control */
/* 0x69-0x7F reserved */
#define SUNI_MT 0x80 /* Master Test */
/* 0x81-0xFF reserved */
@ -94,9 +98,18 @@
#define SUNI_MRI_ID_SHIFT 0
#define SUNI_MRI_TYPE 0x70 /* R, SUNI type (lite is 011) */
#define SUNI_MRI_TYPE_SHIFT 4
#define SUNI_MRI_TYPE_PM5346 0x3 /* S/UNI 155 LITE */
#define SUNI_MRI_TYPE_PM5347 0x4 /* S/UNI 155 PLUS */
#define SUNI_MRI_TYPE_PM5350 0x7 /* S/UNI 155 ULTRA */
#define SUNI_MRI_TYPE_PM5355 0x1 /* S/UNI 622 */
#define SUNI_MRI_RESET 0x80 /* RW, reset & power down chip
0: normal operation
1: reset & low power */
/* MCM is reg 0x4 */
#define SUNI_MCM_LLE 0x20 /* line loopback (PM5355) */
#define SUNI_MCM_DLE 0x10 /* diagnostic loopback (PM5355) */
/* MCT is reg 5 */
#define SUNI_MCT_LOOPT 0x01 /* RW, timing source, 0: from
TRCLK+/- */
@ -144,6 +157,12 @@
/* TLOP_DIAG is reg 0x21 */
#define SUNI_TLOP_DIAG_DBIP 0x01 /* insert line BIP err (continuously) */
/* SSTB_CTRL is reg 0x28 */
#define SUNI_SSTB_CTRL_LEN16 0x01 /* path trace message length bit */
/* RPOP_RC is reg 0x3D (PM5355) */
#define SUNI_RPOP_RC_ENSS 0x40 /* enable size bit */
/* TPOP_DIAG is reg 0x40 */
#define SUNI_TPOP_DIAG_PAIS 0x01 /* insert STS path alarm ind (cont) */
#define SUNI_TPOP_DIAG_DB3 0x02 /* insert path BIP err (continuously) */
@ -191,6 +210,9 @@
pattern */
#define SUNI_TACP_IUCHP_GFC_SHIFT 4
/* SPTB_CTRL is reg 0x68 */
#define SUNI_SPTB_CTRL_LEN16 0x01 /* path trace message length */
/* MT is reg 0x80 */
#define SUNI_MT_HIZIO 0x01 /* RW, all but data bus & MP interface
tri-state */
@ -205,6 +227,14 @@
#ifdef __KERNEL__
struct suni_priv {
struct k_sonet_stats sonet_stats; /* link diagnostics */
int loop_mode; /* loopback mode */
int type; /* phy type */
struct atm_dev *dev; /* device back-pointer */
struct suni_priv *next; /* next SUNI */
};
int suni_init(struct atm_dev *dev);
#endif

1
drivers/bluetooth/Kconfig
View File

@ -71,6 +71,7 @@ config BT_HCIUART_H4
config BT_HCIUART_BCSP
bool "BCSP protocol support"
depends on BT_HCIUART
select BITREVERSE
help
BCSP (BlueCore Serial Protocol) is serial protocol for communication
between Bluetooth device and host. This protocol is required for non

44
drivers/bluetooth/hci_bcsp.c
View File

@ -39,6 +39,8 @@
#include <linux/signal.h>
#include <linux/ioctl.h>
#include <linux/skbuff.h>
#include <linux/bitrev.h>
#include <asm/unaligned.h>
#include <net/bluetooth/bluetooth.h>
#include <net/bluetooth/hci_core.h>
@ -124,27 +126,6 @@ static void bcsp_crc_update(u16 *crc, u8 d)
*crc = reg;
}
/*
Get reverse of generated crc
Implementation note
The crc generator (bcsp_crc_init() and bcsp_crc_update())
creates a reversed crc, so it needs to be swapped back before
being passed on.
*/
static u16 bcsp_crc_reverse(u16 crc)
{
u16 b, rev;
for (b = 0, rev = 0; b < 16; b++) {
rev = rev << 1;
rev |= (crc & 1);
crc = crc >> 1;
}
return (rev);
}
/* ---- BCSP core ---- */
static void bcsp_slip_msgdelim(struct sk_buff *skb)
@ -235,10 +216,10 @@ static struct sk_buff *bcsp_prepare_pkt(struct bcsp_struct *bcsp, u8 *data,
}
if (hciextn && chan == 5) {
struct hci_command_hdr *hdr = (struct hci_command_hdr *) data;
__le16 opcode = ((struct hci_command_hdr *)data)->opcode;
/* Vendor specific commands */
if (hci_opcode_ogf(__le16_to_cpu(hdr->opcode)) == 0x3f) {
if (hci_opcode_ogf(__le16_to_cpu(opcode)) == 0x3f) {
u8 desc = *(data + HCI_COMMAND_HDR_SIZE);
if ((desc & 0xf0) == 0xc0) {
data += HCI_COMMAND_HDR_SIZE + 1;
@ -296,7 +277,7 @@ static struct sk_buff *bcsp_prepare_pkt(struct bcsp_struct *bcsp, u8 *data,
/* Put CRC */
if (bcsp->use_crc) {
bcsp_txmsg_crc = bcsp_crc_reverse(bcsp_txmsg_crc);
bcsp_txmsg_crc = bitrev16(bcsp_txmsg_crc);
bcsp_slip_one_byte(nskb, (u8) ((bcsp_txmsg_crc >> 8) & 0x00ff));
bcsp_slip_one_byte(nskb, (u8) (bcsp_txmsg_crc & 0x00ff));
}
@ -566,6 +547,11 @@ static void bcsp_complete_rx_pkt(struct hci_uart *hu)
bcsp->rx_skb = NULL;
}
static u16 bscp_get_crc(struct bcsp_struct *bcsp)
{
return get_unaligned_be16(&bcsp->rx_skb->data[bcsp->rx_skb->len - 2]);
}
/* Recv data */
static int bcsp_recv(struct hci_uart *hu, void *data, int count)
{
@ -624,14 +610,10 @@ static int bcsp_recv(struct hci_uart *hu, void *data, int count)
continue;
case BCSP_W4_CRC:
if (bcsp_crc_reverse(bcsp->message_crc) !=
(bcsp->rx_skb->data[bcsp->rx_skb->len - 2] << 8) +
bcsp->rx_skb->data[bcsp->rx_skb->len - 1]) {
if (bitrev16(bcsp->message_crc) != bscp_get_crc(bcsp)) {
BT_ERR ("Checksum failed: computed %04x received %04x",
bcsp_crc_reverse(bcsp->message_crc),
(bcsp->rx_skb-> data[bcsp->rx_skb->len - 2] << 8) +
bcsp->rx_skb->data[bcsp->rx_skb->len - 1]);
bitrev16(bcsp->message_crc),
bscp_get_crc(bcsp));
kfree_skb(bcsp->rx_skb);
bcsp->rx_state = BCSP_W4_PKT_DELIMITER;

28
drivers/char/pcmcia/synclink_cs.c
View File

@ -3886,9 +3886,8 @@ static bool rx_get_frame(MGSLPC_INFO *info)
framesize = 0;
#if SYNCLINK_GENERIC_HDLC
{
struct net_device_stats *stats = hdlc_stats(info->netdev);
stats->rx_errors++;
stats->rx_frame_errors++;
info->netdev->stats.rx_errors++;
info->netdev->stats.rx_frame_errors++;
}
#endif
} else
@ -4144,7 +4143,6 @@ static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
{
MGSLPC_INFO *info = dev_to_port(dev);
struct net_device_stats *stats = hdlc_stats(dev);
unsigned long flags;
if (debug_level >= DEBUG_LEVEL_INFO)
@ -4159,8 +4157,8 @@ static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
info->tx_put = info->tx_count = skb->len;
/* update network statistics */
stats->tx_packets++;
stats->tx_bytes += skb->len;
dev->stats.tx_packets++;
dev->stats.tx_bytes += skb->len;
/* done with socket buffer, so free it */
dev_kfree_skb(skb);
@ -4376,14 +4374,13 @@ static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
static void hdlcdev_tx_timeout(struct net_device *dev)
{
MGSLPC_INFO *info = dev_to_port(dev);
struct net_device_stats *stats = hdlc_stats(dev);
unsigned long flags;
if (debug_level >= DEBUG_LEVEL_INFO)
printk("hdlcdev_tx_timeout(%s)\n",dev->name);
stats->tx_errors++;
stats->tx_aborted_errors++;
dev->stats.tx_errors++;
dev->stats.tx_aborted_errors++;
spin_lock_irqsave(&info->lock,flags);
tx_stop(info);
@ -4416,27 +4413,26 @@ static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
{
struct sk_buff *skb = dev_alloc_skb(size);
struct net_device *dev = info->netdev;
struct net_device_stats *stats = hdlc_stats(dev);
if (debug_level >= DEBUG_LEVEL_INFO)
printk("hdlcdev_rx(%s)\n",dev->name);
if (skb == NULL) {
printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
stats->rx_dropped++;
dev->stats.rx_dropped++;
return;
}
memcpy(skb_put(skb, size),buf,size);
memcpy(skb_put(skb, size), buf, size);
skb->protocol = hdlc_type_trans(skb, info->netdev);
skb->protocol = hdlc_type_trans(skb, dev);
stats->rx_packets++;
stats->rx_bytes += size;
dev->stats.rx_packets++;
dev->stats.rx_bytes += size;
netif_rx(skb);
info->netdev->last_rx = jiffies;
dev->last_rx = jiffies;
}
/**

33
drivers/char/synclink.c
View File

@ -6631,9 +6631,8 @@ static bool mgsl_get_rx_frame(struct mgsl_struct *info)
framesize = 0;
#if SYNCLINK_GENERIC_HDLC
{
struct net_device_stats *stats = hdlc_stats(info->netdev);
stats->rx_errors++;
stats->rx_frame_errors++;
info->netdev->stats.rx_errors++;
info->netdev->stats.rx_frame_errors++;
}
#endif
} else
@ -7744,7 +7743,6 @@ static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
{
struct mgsl_struct *info = dev_to_port(dev);
struct net_device_stats *stats = hdlc_stats(dev);
unsigned long flags;
if (debug_level >= DEBUG_LEVEL_INFO)
@ -7758,8 +7756,8 @@ static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
mgsl_load_tx_dma_buffer(info, skb->data, skb->len);
/* update network statistics */
stats->tx_packets++;
stats->tx_bytes += skb->len;
dev->stats.tx_packets++;
dev->stats.tx_bytes += skb->len;
/* done with socket buffer, so free it */
dev_kfree_skb(skb);
@ -7975,14 +7973,13 @@ static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
static void hdlcdev_tx_timeout(struct net_device *dev)
{
struct mgsl_struct *info = dev_to_port(dev);
struct net_device_stats *stats = hdlc_stats(dev);
unsigned long flags;
if (debug_level >= DEBUG_LEVEL_INFO)
printk("hdlcdev_tx_timeout(%s)\n",dev->name);
stats->tx_errors++;
stats->tx_aborted_errors++;
dev->stats.tx_errors++;
dev->stats.tx_aborted_errors++;
spin_lock_irqsave(&info->irq_spinlock,flags);
usc_stop_transmitter(info);
@ -8015,27 +8012,27 @@ static void hdlcdev_rx(struct mgsl_struct *info, char *buf, int size)
{
struct sk_buff *skb = dev_alloc_skb(size);
struct net_device *dev = info->netdev;
struct net_device_stats *stats = hdlc_stats(dev);
if (debug_level >= DEBUG_LEVEL_INFO)
printk("hdlcdev_rx(%s)\n",dev->name);
printk("hdlcdev_rx(%s)\n", dev->name);
if (skb == NULL) {
printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
stats->rx_dropped++;
printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n",
dev->name);
dev->stats.rx_dropped++;
return;
}
memcpy(skb_put(skb, size),buf,size);
memcpy(skb_put(skb, size), buf, size);
skb->protocol = hdlc_type_trans(skb, info->netdev);
skb->protocol = hdlc_type_trans(skb, dev);
stats->rx_packets++;
stats->rx_bytes += size;
dev->stats.rx_packets++;
dev->stats.rx_bytes += size;
netif_rx(skb);
info->netdev->last_rx = jiffies;
dev->last_rx = jiffies;
}
/**

28
drivers/char/synclink_gt.c
View File

@ -1536,7 +1536,6 @@ static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
{
struct slgt_info *info = dev_to_port(dev);
struct net_device_stats *stats = hdlc_stats(dev);
unsigned long flags;
DBGINFO(("%s hdlc_xmit\n", dev->name));
@ -1549,8 +1548,8 @@ static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
tx_load(info, skb->data, skb->len);
/* update network statistics */
stats->tx_packets++;
stats->tx_bytes += skb->len;
dev->stats.tx_packets++;
dev->stats.tx_bytes += skb->len;
/* done with socket buffer, so free it */
dev_kfree_skb(skb);
@ -1767,13 +1766,12 @@ static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
static void hdlcdev_tx_timeout(struct net_device *dev)
{
struct slgt_info *info = dev_to_port(dev);
struct net_device_stats *stats = hdlc_stats(dev);
unsigned long flags;
DBGINFO(("%s hdlcdev_tx_timeout\n", dev->name));
stats->tx_errors++;
stats->tx_aborted_errors++;
dev->stats.tx_errors++;
dev->stats.tx_aborted_errors++;
spin_lock_irqsave(&info->lock,flags);
tx_stop(info);
@ -1806,26 +1804,25 @@ static void hdlcdev_rx(struct slgt_info *info, char *buf, int size)
{
struct sk_buff *skb = dev_alloc_skb(size);
struct net_device *dev = info->netdev;
struct net_device_stats *stats = hdlc_stats(dev);
DBGINFO(("%s hdlcdev_rx\n", dev->name));
if (skb == NULL) {
DBGERR(("%s: can't alloc skb, drop packet\n", dev->name));
stats->rx_dropped++;
dev->stats.rx_dropped++;
return;
}
memcpy(skb_put(skb, size),buf,size);
memcpy(skb_put(skb, size), buf, size);
skb->protocol = hdlc_type_trans(skb, info->netdev);
skb->protocol = hdlc_type_trans(skb, dev);
stats->rx_packets++;
stats->rx_bytes += size;
dev->stats.rx_packets++;
dev->stats.rx_bytes += size;
netif_rx(skb);
info->netdev->last_rx = jiffies;
dev->last_rx = jiffies;
}
/**
@ -4568,9 +4565,8 @@ check_again:
#if SYNCLINK_GENERIC_HDLC
if (framesize == 0) {
struct net_device_stats *stats = hdlc_stats(info->netdev);
stats->rx_errors++;
stats->rx_frame_errors++;
info->netdev->stats.rx_errors++;
info->netdev->stats.rx_frame_errors++;
}
#endif

31
drivers/char/synclinkmp.c
View File

@ -1672,7 +1672,6 @@ static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
{
SLMP_INFO *info = dev_to_port(dev);
struct net_device_stats *stats = hdlc_stats(dev);
unsigned long flags;
if (debug_level >= DEBUG_LEVEL_INFO)
@ -1686,8 +1685,8 @@ static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
tx_load_dma_buffer(info, skb->data, skb->len);
/* update network statistics */
stats->tx_packets++;
stats->tx_bytes += skb->len;
dev->stats.tx_packets++;
dev->stats.tx_bytes += skb->len;
/* done with socket buffer, so free it */
dev_kfree_skb(skb);
@ -1903,14 +1902,13 @@ static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
static void hdlcdev_tx_timeout(struct net_device *dev)
{
SLMP_INFO *info = dev_to_port(dev);
struct net_device_stats *stats = hdlc_stats(dev);
unsigned long flags;
if (debug_level >= DEBUG_LEVEL_INFO)
printk("hdlcdev_tx_timeout(%s)\n",dev->name);
stats->tx_errors++;
stats->tx_aborted_errors++;
dev->stats.tx_errors++;
dev->stats.tx_aborted_errors++;
spin_lock_irqsave(&info->lock,flags);
tx_stop(info);
@ -1943,27 +1941,27 @@ static void hdlcdev_rx(SLMP_INFO *info, char *buf, int size)
{
struct sk_buff *skb = dev_alloc_skb(size);
struct net_device *dev = info->netdev;
struct net_device_stats *stats = hdlc_stats(dev);
if (debug_level >= DEBUG_LEVEL_INFO)
printk("hdlcdev_rx(%s)\n",dev->name);
if (skb == NULL) {
printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
stats->rx_dropped++;
printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n",
dev->name);
dev->stats.rx_dropped++;
return;
}
memcpy(skb_put(skb, size),buf,size);
memcpy(skb_put(skb, size), buf, size);
skb->protocol = hdlc_type_trans(skb, info->netdev);
skb->protocol = hdlc_type_trans(skb, dev);
stats->rx_packets++;
stats->rx_bytes += size;
dev->stats.rx_packets++;
dev->stats.rx_bytes += size;
netif_rx(skb);
info->netdev->last_rx = jiffies;
dev->last_rx = jiffies;
}
/**
@ -4976,9 +4974,8 @@ CheckAgain:
framesize = 0;
#if SYNCLINK_GENERIC_HDLC
{
struct net_device_stats *stats = hdlc_stats(info->netdev);
stats->rx_errors++;
stats->rx_frame_errors++;
info->netdev->stats.rx_errors++;
info->netdev->stats.rx_frame_errors++;
}
#endif
}

4
drivers/infiniband/ulp/ipoib/ipoib_multicast.c
View File

@ -769,7 +769,7 @@ void ipoib_mcast_restart_task(struct work_struct *work)
ipoib_mcast_stop_thread(dev, 0);
local_irq_save(flags);
netif_tx_lock(dev);
netif_addr_lock(dev);
spin_lock(&priv->lock);
/*
@ -846,7 +846,7 @@ void ipoib_mcast_restart_task(struct work_struct *work)
}
spin_unlock(&priv->lock);
netif_tx_unlock(dev);
netif_addr_unlock(dev);
local_irq_restore(flags);
/* We have to cancel outside of the spinlock */

2
drivers/isdn/i4l/isdn_net.c
View File

@ -287,7 +287,7 @@ isdn_net_unbind_channel(isdn_net_local * lp)
BEWARE! This chunk of code cannot be called from hardware
interrupt handler. I hope it is true. --ANK
*/
qdisc_reset(lp->netdev->dev->qdisc);
qdisc_reset_all_tx(lp->netdev->dev);
}
lp->dialstate = 0;
dev->rx_netdev[isdn_dc2minor(lp->isdn_device, lp->isdn_channel)] = NULL;

4
drivers/media/dvb/dvb-core/dvb_net.c
View File

@ -1133,7 +1133,7 @@ static void wq_set_multicast_list (struct work_struct *work)
dvb_net_feed_stop(dev);
priv->rx_mode = RX_MODE_UNI;
netif_tx_lock_bh(dev);
netif_addr_lock_bh(dev);
if (dev->flags & IFF_PROMISC) {
dprintk("%s: promiscuous mode\n", dev->name);
@ -1158,7 +1158,7 @@ static void wq_set_multicast_list (struct work_struct *work)
}
}
netif_tx_unlock_bh(dev);
netif_addr_unlock_bh(dev);
dvb_net_feed_start(dev);
}

14
drivers/net/3c503.c
View File

@ -149,7 +149,7 @@ el2_pio_probe(struct net_device *dev)
#ifndef MODULE
struct net_device * __init el2_probe(int unit)
{
struct net_device *dev = alloc_ei_netdev();
struct net_device *dev = alloc_eip_netdev();
int err;
if (!dev)
@ -340,7 +340,7 @@ el2_probe1(struct net_device *dev, int ioaddr)
dev->stop = &el2_close;
dev->ethtool_ops = &netdev_ethtool_ops;
#ifdef CONFIG_NET_POLL_CONTROLLER
dev->poll_controller = ei_poll;
dev->poll_controller = eip_poll;
#endif
retval = register_netdev(dev);
@ -386,7 +386,7 @@ el2_open(struct net_device *dev)
outb_p(0x00, E33G_IDCFR);
if (*irqp == probe_irq_off(cookie) /* It's a good IRQ line! */
&& ((retval = request_irq(dev->irq = *irqp,
ei_interrupt, 0, dev->name, dev)) == 0))
eip_interrupt, 0, dev->name, dev)) == 0))
break;
}
} while (*++irqp);
@ -395,13 +395,13 @@ el2_open(struct net_device *dev)
return retval;
}
} else {
if ((retval = request_irq(dev->irq, ei_interrupt, 0, dev->name, dev))) {
if ((retval = request_irq(dev->irq, eip_interrupt, 0, dev->name, dev))) {
return retval;
}
}
el2_init_card(dev);
ei_open(dev);
eip_open(dev);
return 0;
}
@ -412,7 +412,7 @@ el2_close(struct net_device *dev)
dev->irq = ei_status.saved_irq;
outb(EGACFR_IRQOFF, E33G_GACFR); /* disable interrupts. */
ei_close(dev);
eip_close(dev);
return 0;
}
@ -698,7 +698,7 @@ init_module(void)
if (this_dev != 0) break; /* only autoprobe 1st one */
printk(KERN_NOTICE "3c503.c: Presently autoprobing (not recommended) for a single card.\n");
}
dev = alloc_ei_netdev();
dev = alloc_eip_netdev();
if (!dev)
break;
dev->irq = irq[this_dev];

4
drivers/net/3c515.c
View File

@ -572,12 +572,16 @@ static int corkscrew_setup(struct net_device *dev, int ioaddr,
int irq;
DECLARE_MAC_BUF(mac);
#ifdef __ISAPNP__
if (idev) {
irq = pnp_irq(idev, 0);
vp->dev = &idev->dev;
} else {
irq = inw(ioaddr + 0x2002) & 15;
}
#else
irq = inw(ioaddr + 0x2002) & 15;
#endif
dev->base_addr = ioaddr;
dev->irq = irq;

37
drivers/net/3c523.c
View File

@ -202,7 +202,6 @@ static void elmc_xmt_int(struct net_device *dev);
static void elmc_rnr_int(struct net_device *dev);
struct priv {
struct net_device_stats stats;
unsigned long base;
char *memtop;
unsigned long mapped_start; /* Start of ioremap */
@ -989,18 +988,18 @@ static void elmc_rcv_int(struct net_device *dev)
skb->protocol = eth_type_trans(skb, dev);
netif_rx(skb);
dev->last_rx = jiffies;
p->stats.rx_packets++;
p->stats.rx_bytes += totlen;
dev->stats.rx_packets++;
dev->stats.rx_bytes += totlen;
} else {
p->stats.rx_dropped++;
dev->stats.rx_dropped++;
}
} else {
printk(KERN_WARNING "%s: received oversized frame.\n", dev->name);
p->stats.rx_dropped++;
dev->stats.rx_dropped++;
}
} else { /* frame !(ok), only with 'save-bad-frames' */
printk(KERN_WARNING "%s: oops! rfd-error-status: %04x\n", dev->name, status);
p->stats.rx_errors++;
dev->stats.rx_errors++;
}
p->rfd_top->status = 0;
p->rfd_top->last = RFD_SUSP;
@ -1018,7 +1017,7 @@ static void elmc_rnr_int(struct net_device *dev)
{
struct priv *p = (struct priv *) dev->priv;
p->stats.rx_errors++;
dev->stats.rx_errors++;
WAIT_4_SCB_CMD(); /* wait for the last cmd */
p->scb->cmd = RUC_ABORT; /* usually the RU is in the 'no resource'-state .. abort it now. */
@ -1046,24 +1045,24 @@ static void elmc_xmt_int(struct net_device *dev)
printk(KERN_WARNING "%s: strange .. xmit-int without a 'COMPLETE'\n", dev->name);
}
if (status & STAT_OK) {
p->stats.tx_packets++;
p->stats.collisions += (status & TCMD_MAXCOLLMASK);
dev->stats.tx_packets++;
dev->stats.collisions += (status & TCMD_MAXCOLLMASK);
} else {
p->stats.tx_errors++;
dev->stats.tx_errors++;
if (status & TCMD_LATECOLL) {
printk(KERN_WARNING "%s: late collision detected.\n", dev->name);
p->stats.collisions++;
dev->stats.collisions++;
} else if (status & TCMD_NOCARRIER) {
p->stats.tx_carrier_errors++;
dev->stats.tx_carrier_errors++;
printk(KERN_WARNING "%s: no carrier detected.\n", dev->name);
} else if (status & TCMD_LOSTCTS) {
printk(KERN_WARNING "%s: loss of CTS detected.\n", dev->name);
} else if (status & TCMD_UNDERRUN) {
p->stats.tx_fifo_errors++;
dev->stats.tx_fifo_errors++;
printk(KERN_WARNING "%s: DMA underrun detected.\n", dev->name);
} else if (status & TCMD_MAXCOLL) {
printk(KERN_WARNING "%s: Max. collisions exceeded.\n", dev->name);
p->stats.collisions += 16;
dev->stats.collisions += 16;
}
}
@ -1215,12 +1214,12 @@ static struct net_device_stats *elmc_get_stats(struct net_device *dev)
ovrn = p->scb->ovrn_errs;
p->scb->ovrn_errs -= ovrn;
p->stats.rx_crc_errors += crc;
p->stats.rx_fifo_errors += ovrn;
p->stats.rx_frame_errors += aln;
p->stats.rx_dropped += rsc;
dev->stats.rx_crc_errors += crc;
dev->stats.rx_fifo_errors += ovrn;
dev->stats.rx_frame_errors += aln;
dev->stats.rx_dropped += rsc;
return &p->stats;
return &dev->stats;
}
/********************************************************

45
drivers/net/3c527.c
View File

@ -158,7 +158,6 @@ struct mc32_local
int slot;
u32 base;
struct net_device_stats net_stats;
volatile struct mc32_mailbox *rx_box;
volatile struct mc32_mailbox *tx_box;
volatile struct mc32_mailbox *exec_box;
@ -1093,24 +1092,24 @@ static void mc32_update_stats(struct net_device *dev)
u32 rx_errors=0;
rx_errors+=lp->net_stats.rx_crc_errors +=st->rx_crc_errors;
rx_errors+=dev->stats.rx_crc_errors +=st->rx_crc_errors;
st->rx_crc_errors=0;
rx_errors+=lp->net_stats.rx_fifo_errors +=st->rx_overrun_errors;
rx_errors+=dev->stats.rx_fifo_errors +=st->rx_overrun_errors;
st->rx_overrun_errors=0;
rx_errors+=lp->net_stats.rx_frame_errors +=st->rx_alignment_errors;
rx_errors+=dev->stats.rx_frame_errors +=st->rx_alignment_errors;
st->rx_alignment_errors=0;
rx_errors+=lp->net_stats.rx_length_errors+=st->rx_tooshort_errors;
rx_errors+=dev->stats.rx_length_errors+=st->rx_tooshort_errors;
st->rx_tooshort_errors=0;
rx_errors+=lp->net_stats.rx_missed_errors+=st->rx_outofresource_errors;
rx_errors+=dev->stats.rx_missed_errors+=st->rx_outofresource_errors;
st->rx_outofresource_errors=0;
lp->net_stats.rx_errors=rx_errors;
dev->stats.rx_errors=rx_errors;
/* Number of packets which saw one collision */
lp->net_stats.collisions+=st->dataC[10];
dev->stats.collisions+=st->dataC[10];
st->dataC[10]=0;
/* Number of packets which saw 2--15 collisions */
lp->net_stats.collisions+=st->dataC[11];
dev->stats.collisions+=st->dataC[11];
st->dataC[11]=0;
}
@ -1178,7 +1177,7 @@ static void mc32_rx_ring(struct net_device *dev)
skb=dev_alloc_skb(length+2);
if(skb==NULL) {
lp->net_stats.rx_dropped++;
dev->stats.rx_dropped++;
goto dropped;
}
@ -1189,8 +1188,8 @@ static void mc32_rx_ring(struct net_device *dev)
skb->protocol=eth_type_trans(skb,dev);
dev->last_rx = jiffies;
lp->net_stats.rx_packets++;
lp->net_stats.rx_bytes += length;
dev->stats.rx_packets++;
dev->stats.rx_bytes += length;
netif_rx(skb);
}
@ -1253,34 +1252,34 @@ static void mc32_tx_ring(struct net_device *dev)
/* Not COMPLETED */
break;
}
lp->net_stats.tx_packets++;
dev->stats.tx_packets++;
if(!(np->status & (1<<6))) /* Not COMPLETED_OK */
{
lp->net_stats.tx_errors++;
dev->stats.tx_errors++;
switch(np->status&0x0F)
{
case 1:
lp->net_stats.tx_aborted_errors++;
dev->stats.tx_aborted_errors++;
break; /* Max collisions */
case 2:
lp->net_stats.tx_fifo_errors++;
dev->stats.tx_fifo_errors++;
break;
case 3:
lp->net_stats.tx_carrier_errors++;
dev->stats.tx_carrier_errors++;
break;
case 4:
lp->net_stats.tx_window_errors++;
dev->stats.tx_window_errors++;
break; /* CTS Lost */
case 5:
lp->net_stats.tx_aborted_errors++;
dev->stats.tx_aborted_errors++;
break; /* Transmit timeout */
}
}
/* Packets are sent in order - this is
basically a FIFO queue of buffers matching
the card ring */
lp->net_stats.tx_bytes+=lp->tx_ring[t].skb->len;
dev->stats.tx_bytes+=lp->tx_ring[t].skb->len;
dev_kfree_skb_irq(lp->tx_ring[t].skb);
lp->tx_ring[t].skb=NULL;
atomic_inc(&lp->tx_count);
@ -1367,7 +1366,7 @@ static irqreturn_t mc32_interrupt(int irq, void *dev_id)
case 6:
/* Out of RX buffers stat */
/* Must restart rx */
lp->net_stats.rx_dropped++;
dev->stats.rx_dropped++;
mc32_rx_ring(dev);
mc32_start_transceiver(dev);
break;
@ -1489,10 +1488,8 @@ static int mc32_close(struct net_device *dev)
static struct net_device_stats *mc32_get_stats(struct net_device *dev)
{
struct mc32_local *lp = netdev_priv(dev);
mc32_update_stats(dev);
return &lp->net_stats;
return &dev->stats;
}

44
drivers/net/8139cp.c
View File

@ -340,7 +340,6 @@ struct cp_private {
u32 rx_config;
u16 cpcmd;
struct net_device_stats net_stats;
struct cp_extra_stats cp_stats;
unsigned rx_head ____cacheline_aligned;
@ -457,8 +456,8 @@ static inline void cp_rx_skb (struct cp_private *cp, struct sk_buff *skb,
{
skb->protocol = eth_type_trans (skb, cp->dev);
cp->net_stats.rx_packets++;
cp->net_stats.rx_bytes += skb->len;
cp->dev->stats.rx_packets++;
cp->dev->stats.rx_bytes += skb->len;
cp->dev->last_rx = jiffies;
#if CP_VLAN_TAG_USED
@ -477,17 +476,17 @@ static void cp_rx_err_acct (struct cp_private *cp, unsigned rx_tail,
printk (KERN_DEBUG
"%s: rx err, slot %d status 0x%x len %d\n",
cp->dev->name, rx_tail, status, len);
cp->net_stats.rx_errors++;
cp->dev->stats.rx_errors++;
if (status & RxErrFrame)
cp->net_stats.rx_frame_errors++;
cp->dev->stats.rx_frame_errors++;
if (status & RxErrCRC)
cp->net_stats.rx_crc_errors++;
cp->dev->stats.rx_crc_errors++;
if ((status & RxErrRunt) || (status & RxErrLong))
cp->net_stats.rx_length_errors++;
cp->dev->stats.rx_length_errors++;
if ((status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag))
cp->net_stats.rx_length_errors++;
cp->dev->stats.rx_length_errors++;
if (status & RxErrFIFO)
cp->net_stats.rx_fifo_errors++;
cp->dev->stats.rx_fifo_errors++;
}
static inline unsigned int cp_rx_csum_ok (u32 status)
@ -539,7 +538,7 @@ rx_status_loop:
* that RX fragments are never encountered
*/
cp_rx_err_acct(cp, rx_tail, status, len);
cp->net_stats.rx_dropped++;
dev->stats.rx_dropped++;
cp->cp_stats.rx_frags++;
goto rx_next;
}
@ -556,7 +555,7 @@ rx_status_loop:
buflen = cp->rx_buf_sz + RX_OFFSET;
new_skb = dev_alloc_skb (buflen);
if (!new_skb) {
cp->net_stats.rx_dropped++;
dev->stats.rx_dropped++;
goto rx_next;
}
@ -710,20 +709,20 @@ static void cp_tx (struct cp_private *cp)
if (netif_msg_tx_err(cp))
printk(KERN_DEBUG "%s: tx err, status 0x%x\n",
cp->dev->name, status);
cp->net_stats.tx_errors++;
cp->dev->stats.tx_errors++;
if (status & TxOWC)
cp->net_stats.tx_window_errors++;
cp->dev->stats.tx_window_errors++;
if (status & TxMaxCol)
cp->net_stats.tx_aborted_errors++;
cp->dev->stats.tx_aborted_errors++;
if (status & TxLinkFail)
cp->net_stats.tx_carrier_errors++;
cp->dev->stats.tx_carrier_errors++;
if (status & TxFIFOUnder)
cp->net_stats.tx_fifo_errors++;
cp->dev->stats.tx_fifo_errors++;
} else {
cp->net_stats.collisions +=
cp->dev->stats.collisions +=
((status >> TxColCntShift) & TxColCntMask);
cp->net_stats.tx_packets++;
cp->net_stats.tx_bytes += skb->len;
cp->dev->stats.tx_packets++;
cp->dev->stats.tx_bytes += skb->len;
if (netif_msg_tx_done(cp))
printk(KERN_DEBUG "%s: tx done, slot %d\n", cp->dev->name, tx_tail);
}
@ -956,7 +955,7 @@ static void cp_set_rx_mode (struct net_device *dev)
static void __cp_get_stats(struct cp_private *cp)
{
/* only lower 24 bits valid; write any value to clear */
cp->net_stats.rx_missed_errors += (cpr32 (RxMissed) & 0xffffff);
cp->dev->stats.rx_missed_errors += (cpr32 (RxMissed) & 0xffffff);
cpw32 (RxMissed, 0);
}
@ -971,7 +970,7 @@ static struct net_device_stats *cp_get_stats(struct net_device *dev)
__cp_get_stats(cp);
spin_unlock_irqrestore(&cp->lock, flags);
return &cp->net_stats;
return &dev->stats;
}
static void cp_stop_hw (struct cp_private *cp)
@ -1142,7 +1141,7 @@ static void cp_clean_rings (struct cp_private *cp)
PCI_DMA_TODEVICE);
if (le32_to_cpu(desc->opts1) & LastFrag)
dev_kfree_skb(skb);
cp->net_stats.tx_dropped++;
cp->dev->stats.tx_dropped++;
}
}
@ -1214,7 +1213,6 @@ static int cp_close (struct net_device *dev)
spin_unlock_irqrestore(&cp->lock, flags);
synchronize_irq(dev->irq);
free_irq(dev->irq, dev);
cp_free_rings(cp);

66
drivers/net/8139too.c
View File

@ -107,8 +107,8 @@
#include <linux/mii.h>
#include <linux/completion.h>
#include <linux/crc32.h>
#include <asm/io.h>
#include <asm/uaccess.h>
#include <linux/io.h>
#include <linux/uaccess.h>
#include <asm/irq.h>
#define RTL8139_DRIVER_NAME DRV_NAME " Fast Ethernet driver " DRV_VERSION
@ -134,7 +134,7 @@
#if RTL8139_DEBUG
/* note: prints function name for you */
# define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
# define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __func__ , ## args)
#else
# define DPRINTK(fmt, args...)
#endif
@ -145,7 +145,7 @@
# define assert(expr) \
if(unlikely(!(expr))) { \
printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n", \
#expr,__FILE__,__FUNCTION__,__LINE__); \
#expr, __FILE__, __func__, __LINE__); \
}
#endif
@ -219,7 +219,7 @@ enum {
#define RTL8139B_IO_SIZE 256
#define RTL8129_CAPS HAS_MII_XCVR
#define RTL8139_CAPS HAS_CHIP_XCVR|HAS_LNK_CHNG
#define RTL8139_CAPS (HAS_CHIP_XCVR|HAS_LNK_CHNG)
typedef enum {
RTL8139 = 0,
@ -574,7 +574,6 @@ struct rtl8139_private {
u32 msg_enable;
struct napi_struct napi;
struct net_device *dev;
struct net_device_stats stats;
unsigned char *rx_ring;
unsigned int cur_rx; /* RX buf index of next pkt */
@ -1711,7 +1710,7 @@ static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev)
dev_kfree_skb(skb);
} else {
dev_kfree_skb(skb);
tp->stats.tx_dropped++;
dev->stats.tx_dropped++;
return 0;
}
@ -1762,27 +1761,27 @@ static void rtl8139_tx_interrupt (struct net_device *dev,
if (netif_msg_tx_err(tp))
printk(KERN_DEBUG "%s: Transmit error, Tx status %8.8x.\n",
dev->name, txstatus);
tp->stats.tx_errors++;
dev->stats.tx_errors++;
if (txstatus & TxAborted) {
tp->stats.tx_aborted_errors++;
dev->stats.tx_aborted_errors++;
RTL_W32 (TxConfig, TxClearAbt);
RTL_W16 (IntrStatus, TxErr);
wmb();
}
if (txstatus & TxCarrierLost)
tp->stats.tx_carrier_errors++;
dev->stats.tx_carrier_errors++;
if (txstatus & TxOutOfWindow)
tp->stats.tx_window_errors++;
dev->stats.tx_window_errors++;
} else {
if (txstatus & TxUnderrun) {
/* Add 64 to the Tx FIFO threshold. */
if (tp->tx_flag < 0x00300000)
tp->tx_flag += 0x00020000;
tp->stats.tx_fifo_errors++;
dev->stats.tx_fifo_errors++;
}
tp->stats.collisions += (txstatus >> 24) & 15;
tp->stats.tx_bytes += txstatus & 0x7ff;
tp->stats.tx_packets++;
dev->stats.collisions += (txstatus >> 24) & 15;
dev->stats.tx_bytes += txstatus & 0x7ff;
dev->stats.tx_packets++;
}
dirty_tx++;
@ -1818,7 +1817,7 @@ static void rtl8139_rx_err (u32 rx_status, struct net_device *dev,
if (netif_msg_rx_err (tp))
printk(KERN_DEBUG "%s: Ethernet frame had errors, status %8.8x.\n",
dev->name, rx_status);
tp->stats.rx_errors++;
dev->stats.rx_errors++;
if (!(rx_status & RxStatusOK)) {
if (rx_status & RxTooLong) {
DPRINTK ("%s: Oversized Ethernet frame, status %4.4x!\n",
@ -1826,11 +1825,11 @@ static void rtl8139_rx_err (u32 rx_status, struct net_device *dev,
/* A.C.: The chip hangs here. */
}
if (rx_status & (RxBadSymbol | RxBadAlign))
tp->stats.rx_frame_errors++;
dev->stats.rx_frame_errors++;
if (rx_status & (RxRunt | RxTooLong))
tp->stats.rx_length_errors++;
dev->stats.rx_length_errors++;
if (rx_status & RxCRCErr)
tp->stats.rx_crc_errors++;
dev->stats.rx_crc_errors++;
} else {
tp->xstats.rx_lost_in_ring++;
}
@ -1890,7 +1889,7 @@ static void rtl8139_rx_err (u32 rx_status, struct net_device *dev,
}
#if RX_BUF_IDX == 3
static __inline__ void wrap_copy(struct sk_buff *skb, const unsigned char *ring,
static inline void wrap_copy(struct sk_buff *skb, const unsigned char *ring,
u32 offset, unsigned int size)
{
u32 left = RX_BUF_LEN - offset;
@ -1913,9 +1912,9 @@ static void rtl8139_isr_ack(struct rtl8139_private *tp)
/* Clear out errors and receive interrupts */
if (likely(status != 0)) {
if (unlikely(status & (RxFIFOOver | RxOverflow))) {
tp->stats.rx_errors++;
tp->dev->stats.rx_errors++;
if (status & RxFIFOOver)
tp->stats.rx_fifo_errors++;
tp->dev->stats.rx_fifo_errors++;
}
RTL_W16_F (IntrStatus, RxAckBits);
}
@ -2016,8 +2015,8 @@ no_early_rx:
skb->protocol = eth_type_trans (skb, dev);
dev->last_rx = jiffies;
tp->stats.rx_bytes += pkt_size;
tp->stats.rx_packets++;
dev->stats.rx_bytes += pkt_size;
dev->stats.rx_packets++;
netif_receive_skb (skb);
} else {
@ -2025,7 +2024,7 @@ no_early_rx:
printk (KERN_WARNING
"%s: Memory squeeze, dropping packet.\n",
dev->name);
tp->stats.rx_dropped++;
dev->stats.rx_dropped++;
}
received++;
@ -2072,7 +2071,7 @@ static void rtl8139_weird_interrupt (struct net_device *dev,
assert (ioaddr != NULL);
/* Update the error count. */
tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
dev->stats.rx_missed_errors += RTL_R32 (RxMissed);
RTL_W32 (RxMissed, 0);
if ((status & RxUnderrun) && link_changed &&
@ -2082,12 +2081,12 @@ static void rtl8139_weird_interrupt (struct net_device *dev,
}
if (status & (RxUnderrun | RxErr))
tp->stats.rx_errors++;
dev->stats.rx_errors++;
if (status & PCSTimeout)
tp->stats.rx_length_errors++;
dev->stats.rx_length_errors++;
if (status & RxUnderrun)
tp->stats.rx_fifo_errors++;
dev->stats.rx_fifo_errors++;
if (status & PCIErr) {
u16 pci_cmd_status;
pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status);
@ -2227,12 +2226,11 @@ static int rtl8139_close (struct net_device *dev)
RTL_W16 (IntrMask, 0);
/* Update the error counts. */
tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
dev->stats.rx_missed_errors += RTL_R32 (RxMissed);
RTL_W32 (RxMissed, 0);
spin_unlock_irqrestore (&tp->lock, flags);
synchronize_irq (dev->irq); /* racy, but that's ok here */
free_irq (dev->irq, dev);
rtl8139_tx_clear (tp);
@ -2472,12 +2470,12 @@ static struct net_device_stats *rtl8139_get_stats (struct net_device *dev)
if (netif_running(dev)) {
spin_lock_irqsave (&tp->lock, flags);
tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
dev->stats.rx_missed_errors += RTL_R32 (RxMissed);
RTL_W32 (RxMissed, 0);
spin_unlock_irqrestore (&tp->lock, flags);
}
return &tp->stats;
return &dev->stats;
}
/* Set or clear the multicast filter for this adaptor.
@ -2561,7 +2559,7 @@ static int rtl8139_suspend (struct pci_dev *pdev, pm_message_t state)
RTL_W8 (ChipCmd, 0);
/* Update the error counts. */
tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
dev->stats.rx_missed_errors += RTL_R32 (RxMissed);
RTL_W32 (RxMissed, 0);
spin_unlock_irqrestore (&tp->lock, flags);

19
drivers/net/8390.h
View File

@ -30,8 +30,10 @@ extern int ei_debug;
#ifdef CONFIG_NET_POLL_CONTROLLER
extern void ei_poll(struct net_device *dev);
extern void eip_poll(struct net_device *dev);
#endif
/* Without I/O delay - non ISA or later chips */
extern void NS8390_init(struct net_device *dev, int startp);
extern int ei_open(struct net_device *dev);
extern int ei_close(struct net_device *dev);
@ -42,6 +44,17 @@ static inline struct net_device *alloc_ei_netdev(void)
return __alloc_ei_netdev(0);
}
/* With I/O delay form */
extern void NS8390p_init(struct net_device *dev, int startp);
extern int eip_open(struct net_device *dev);
extern int eip_close(struct net_device *dev);
extern irqreturn_t eip_interrupt(int irq, void *dev_id);
extern struct net_device *__alloc_eip_netdev(int size);
static inline struct net_device *alloc_eip_netdev(void)
{
return __alloc_eip_netdev(0);
}
/* You have one of these per-board */
struct ei_device {
const char *name;
@ -69,7 +82,6 @@ struct ei_device {
unsigned char reg0; /* Register '0' in a WD8013 */
unsigned char reg5; /* Register '5' in a WD8013 */
unsigned char saved_irq; /* Original dev->irq value. */
struct net_device_stats stat; /* The new statistics table. */
u32 *reg_offset; /* Register mapping table */
spinlock_t page_lock; /* Page register locks */
unsigned long priv; /* Private field to store bus IDs etc. */
@ -116,13 +128,14 @@ struct ei_device {
/*
* Only generate indirect loads given a machine that needs them.
* - removed AMIGA_PCMCIA from this list, handled as ISA io now
* - the _p for generates no delay by default 8390p.c overrides this.
*/
#ifndef ei_inb
#define ei_inb(_p) inb(_p)
#define ei_outb(_v,_p) outb(_v,_p)
#define ei_inb_p(_p) inb_p(_p)
#define ei_outb_p(_v,_p) outb_p(_v,_p)
#define ei_inb_p(_p) inb(_p)
#define ei_outb_p(_v,_p) outb(_v,_p)
#endif
#ifndef EI_SHIFT

66
drivers/net/8390p.c Normal file
View File

@ -0,0 +1,66 @@
/* 8390 core for ISA devices needing bus delays */
static const char version[] =
"8390p.c:v1.10cvs 9/23/94 Donald Becker (becker@cesdis.gsfc.nasa.gov)\n";
#define ei_inb(_p) inb(_p)
#define ei_outb(_v,_p) outb(_v,_p)
#define ei_inb_p(_p) inb_p(_p)
#define ei_outb_p(_v,_p) outb_p(_v,_p)
#include "lib8390.c"
int eip_open(struct net_device *dev)
{
return __ei_open(dev);
}
int eip_close(struct net_device *dev)
{
return __ei_close(dev);
}
irqreturn_t eip_interrupt(int irq, void *dev_id)
{
return __ei_interrupt(irq, dev_id);
}
#ifdef CONFIG_NET_POLL_CONTROLLER
void eip_poll(struct net_device *dev)
{
__ei_poll(dev);
}
#endif
struct net_device *__alloc_eip_netdev(int size)
{
return ____alloc_ei_netdev(size);
}
void NS8390p_init(struct net_device *dev, int startp)
{
return __NS8390_init(dev, startp);
}
EXPORT_SYMBOL(eip_open);
EXPORT_SYMBOL(eip_close);
EXPORT_SYMBOL(eip_interrupt);
#ifdef CONFIG_NET_POLL_CONTROLLER
EXPORT_SYMBOL(eip_poll);
#endif
EXPORT_SYMBOL(NS8390p_init);
EXPORT_SYMBOL(__alloc_eip_netdev);
#if defined(MODULE)
int init_module(void)
{
return 0;
}
void cleanup_module(void)
{
}
#endif /* MODULE */
MODULE_LICENSE("GPL");

191
drivers/net/Kconfig
View File

@ -26,14 +26,6 @@ menuconfig NETDEVICES
# that for each of the symbols.
if NETDEVICES
config NETDEVICES_MULTIQUEUE
bool "Netdevice multiple hardware queue support"
---help---
Say Y here if you want to allow the network stack to use multiple
hardware TX queues on an ethernet device.
Most people will say N here.
config IFB
tristate "Intermediate Functional Block support"
depends on NET_CLS_ACT
@ -515,6 +507,18 @@ config STNIC
If unsure, say N.
config SH_ETH
tristate "Renesas SuperH Ethernet support"
depends on SUPERH && \
(CPU_SUBTYPE_SH7710 || CPU_SUBTYPE_SH7712)
select CRC32
select MII
select MDIO_BITBANG
select PHYLIB
help
Renesas SuperH Ethernet device driver.
This driver support SH7710 and SH7712.
config SUNLANCE
tristate "Sun LANCE support"
depends on SBUS
@ -917,6 +921,23 @@ config DM9000
To compile this driver as a module, choose M here. The module
will be called dm9000.
config DM9000_DEBUGLEVEL
int "DM9000 maximum debug level"
depends on DM9000
default 4
help
The maximum level of debugging code compiled into the DM9000
driver.
config DM9000_FORCE_SIMPLE_PHY_POLL
bool "Force simple NSR based PHY polling"
depends on DM9000
---help---
This configuration forces the DM9000 to use the NSR's LinkStatus
bit to determine if the link is up or down instead of the more
costly MII PHY reads. Note, this will not work if the chip is
operating with an external PHY.
config ENC28J60
tristate "ENC28J60 support"
depends on EXPERIMENTAL && SPI && NET_ETHERNET
@ -934,19 +955,11 @@ config ENC28J60_WRITEVERIFY
Enable the verify after the buffer write useful for debugging purpose.
If unsure, say N.
config DM9000_DEBUGLEVEL
int "DM9000 maximum debug level"
depends on DM9000
default 4
help
The maximum level of debugging code compiled into the DM9000
driver.
config SMC911X
tristate "SMSC LAN911[5678] support"
select CRC32
select MII
depends on ARCH_PXA || SH_MAGIC_PANEL_R2
depends on ARCH_PXA || SUPERH
help
This is a driver for SMSC's LAN911x series of Ethernet chipsets
including the new LAN9115, LAN9116, LAN9117, and LAN9118.
@ -1234,7 +1247,6 @@ config IBMVETH
To compile this driver as a module, choose M here. The module will
be called ibmveth.
source "drivers/net/ibm_emac/Kconfig"
source "drivers/net/ibm_newemac/Kconfig"
config NET_PCI
@ -1277,20 +1289,6 @@ config AMD8111_ETH
To compile this driver as a module, choose M here. The module
will be called amd8111e.
config AMD8111E_NAPI
bool "Use RX polling (NAPI)"
depends on AMD8111_ETH
help
NAPI is a new driver API designed to reduce CPU and interrupt load
when the driver is receiving lots of packets from the card. It is
still somewhat experimental and thus not yet enabled by default.
If your estimated Rx load is 10kpps or more, or if the card will be
deployed on potentially unfriendly networks (e.g. in a firewall),
then say Y here.
If in doubt, say N.
config ADAPTEC_STARFIRE
tristate "Adaptec Starfire/DuraLAN support"
depends on NET_PCI && PCI
@ -1305,20 +1303,6 @@ config ADAPTEC_STARFIRE
To compile this driver as a module, choose M here: the module
will be called starfire. This is recommended.
config ADAPTEC_STARFIRE_NAPI
bool "Use Rx Polling (NAPI) (EXPERIMENTAL)"
depends on ADAPTEC_STARFIRE && EXPERIMENTAL
help
NAPI is a new driver API designed to reduce CPU and interrupt load
when the driver is receiving lots of packets from the card. It is
still somewhat experimental and thus not yet enabled by default.
If your estimated Rx load is 10kpps or more, or if the card will be
deployed on potentially unfriendly networks (e.g. in a firewall),
then say Y here.
If in doubt, say N.
config AC3200
tristate "Ansel Communications EISA 3200 support (EXPERIMENTAL)"
depends on NET_PCI && (ISA || EISA) && EXPERIMENTAL
@ -1661,7 +1645,7 @@ config SUNDANCE_MMIO
config TLAN
tristate "TI ThunderLAN support"
depends on NET_PCI && (PCI || EISA) && !64BIT
depends on NET_PCI && (PCI || EISA)
---help---
If you have a PCI Ethernet network card based on the ThunderLAN chip
which is supported by this driver, say Y and read the
@ -1701,26 +1685,6 @@ config VIA_RHINE_MMIO
If unsure, say Y.
config VIA_RHINE_NAPI
bool "Use Rx Polling (NAPI)"
depends on VIA_RHINE
help
NAPI is a new driver API designed to reduce CPU and interrupt load
when the driver is receiving lots of packets from the card.
If your estimated Rx load is 10kpps or more, or if the card will be
deployed on potentially unfriendly networks (e.g. in a firewall),
then say Y here.
config LAN_SAA9730
bool "Philips SAA9730 Ethernet support"
depends on NET_PCI && PCI && MIPS_ATLAS
help
The SAA9730 is a combined multimedia and peripheral controller used
in thin clients, Internet access terminals, and diskless
workstations.
See <http://www.semiconductors.philips.com/pip/SAA9730_flyer_1>.
config SC92031
tristate "Silan SC92031 PCI Fast Ethernet Adapter driver (EXPERIMENTAL)"
depends on NET_PCI && PCI && EXPERIMENTAL
@ -2004,9 +1968,6 @@ config E1000E
To compile this driver as a module, choose M here. The module
will be called e1000e.
config E1000E_ENABLED
def_bool E1000E != n
config IP1000
tristate "IP1000 Gigabit Ethernet support"
depends on PCI && EXPERIMENTAL
@ -2038,6 +1999,15 @@ config IGB
To compile this driver as a module, choose M here. The module
will be called igb.
config IGB_LRO
bool "Use software LRO"
depends on IGB && INET
select INET_LRO
---help---
Say Y here if you want to use large receive offload.
If in doubt, say N.
source "drivers/net/ixp2000/Kconfig"
config MYRI_SBUS
@ -2095,27 +2065,13 @@ config R8169
To compile this driver as a module, choose M here: the module
will be called r8169. This is recommended.
config R8169_NAPI
bool "Use Rx Polling (NAPI) (EXPERIMENTAL)"
depends on R8169 && EXPERIMENTAL
help
NAPI is a new driver API designed to reduce CPU and interrupt load
when the driver is receiving lots of packets from the card. It is
still somewhat experimental and thus not yet enabled by default.
If your estimated Rx load is 10kpps or more, or if the card will be
deployed on potentially unfriendly networks (e.g. in a firewall),
then say Y here.
If in doubt, say N.
config R8169_VLAN
bool "VLAN support"
depends on R8169 && VLAN_8021Q
---help---
Say Y here for the r8169 driver to support the functions required
by the kernel 802.1Q code.
If in doubt, say Y.
config SB1250_MAC
@ -2218,6 +2174,7 @@ config VIA_VELOCITY
config TIGON3
tristate "Broadcom Tigon3 support"
depends on PCI
select PHYLIB
help
This driver supports Broadcom Tigon3 based gigabit Ethernet cards.
@ -2273,6 +2230,19 @@ config GELIC_WIRELESS
the driver automatically distinguishes the models, you can
safely enable this option even if you have a wireless-less model.
config GELIC_WIRELESS_OLD_PSK_INTERFACE
bool "PS3 Wireless private PSK interface (OBSOLETE)"
depends on GELIC_WIRELESS
help
This option retains the obsolete private interface to pass
the PSK from user space programs to the driver. The PSK
stands for 'Pre Shared Key' and is used for WPA[2]-PSK
(WPA-Personal) environment.
If WPA[2]-PSK is used and you need to use old programs that
support only this old interface, say Y. Otherwise N.
If unsure, say N.
config GIANFAR
tristate "Gianfar Ethernet"
depends on FSL_SOC
@ -2282,10 +2252,6 @@ config GIANFAR
This driver supports the Gigabit TSEC on the MPC83xx, MPC85xx,
and MPC86xx family of chips, and the FEC on the 8540.
config GFAR_NAPI
bool "Use Rx Polling (NAPI)"
depends on GIANFAR
config UCC_GETH
tristate "Freescale QE Gigabit Ethernet"
depends on QUICC_ENGINE
@ -2294,10 +2260,6 @@ config UCC_GETH
This driver supports the Gigabit Ethernet mode of the QUICC Engine,
which is available on some Freescale SOCs.
config UGETH_NAPI
bool "Use Rx Polling (NAPI)"
depends on UCC_GETH
config UGETH_MAGIC_PACKET
bool "Magic Packet detection support"
depends on UCC_GETH
@ -2387,18 +2349,11 @@ config CHELSIO_T1_1G
Enables support for Chelsio's gigabit Ethernet PCI cards. If you
are using only 10G cards say 'N' here.
config CHELSIO_T1_NAPI
bool "Use Rx Polling (NAPI)"
depends on CHELSIO_T1
default y
help
NAPI is a driver API designed to reduce CPU and interrupt load
when the driver is receiving lots of packets from the card.
config CHELSIO_T3
tristate "Chelsio Communications T3 10Gb Ethernet support"
depends on PCI
depends on PCI && INET
select FW_LOADER
select INET_LRO
help
This driver supports Chelsio T3-based gigabit and 10Gb Ethernet
adapters.
@ -2426,7 +2381,8 @@ config EHEA
config IXGBE
tristate "Intel(R) 10GbE PCI Express adapters support"
depends on PCI
depends on PCI && INET
select INET_LRO
---help---
This driver supports Intel(R) 10GbE PCI Express family of
adapters. For more information on how to identify your adapter, go
@ -2464,20 +2420,6 @@ config IXGB
To compile this driver as a module, choose M here. The module
will be called ixgb.
config IXGB_NAPI
bool "Use Rx Polling (NAPI) (EXPERIMENTAL)"
depends on IXGB && EXPERIMENTAL
help
NAPI is a new driver API designed to reduce CPU and interrupt load
when the driver is receiving lots of packets from the card. It is
still somewhat experimental and thus not yet enabled by default.
If your estimated Rx load is 10kpps or more, or if the card will be
deployed on potentially unfriendly networks (e.g. in a firewall),
then say Y here.
If in doubt, say N.
config S2IO
tristate "S2IO 10Gbe XFrame NIC"
depends on PCI
@ -2486,20 +2428,6 @@ config S2IO
More specific information on configuring the driver is in
<file:Documentation/networking/s2io.txt>.
config S2IO_NAPI
bool "Use Rx Polling (NAPI) (EXPERIMENTAL)"
depends on S2IO && EXPERIMENTAL
help
NAPI is a new driver API designed to reduce CPU and interrupt load
when the driver is receiving lots of packets from the card. It is
still somewhat experimental and thus not yet enabled by default.
If your estimated Rx load is 10kpps or more, or if the card will be
deployed on potentially unfriendly networks (e.g. in a firewall),
then say Y here.
If in doubt, say N.
config MYRI10GE
tristate "Myricom Myri-10G Ethernet support"
depends on PCI && INET
@ -2564,6 +2492,7 @@ config BNX2X
tristate "Broadcom NetXtremeII 10Gb support"
depends on PCI
select ZLIB_INFLATE
select LIBCRC32C
help
This driver supports Broadcom NetXtremeII 10 gigabit Ethernet cards.
To compile this driver as a module, choose M here: the module

15
drivers/net/Makefile
View File

@ -4,7 +4,6 @@
obj-$(CONFIG_E1000) += e1000/
obj-$(CONFIG_E1000E) += e1000e/
obj-$(CONFIG_IBM_EMAC) += ibm_emac/
obj-$(CONFIG_IBM_NEW_EMAC) += ibm_newemac/
obj-$(CONFIG_IGB) += igb/
obj-$(CONFIG_IXGBE) += ixgbe/
@ -67,6 +66,7 @@ obj-$(CONFIG_FEALNX) += fealnx.o
obj-$(CONFIG_TIGON3) += tg3.o
obj-$(CONFIG_BNX2) += bnx2.o
obj-$(CONFIG_BNX2X) += bnx2x.o
bnx2x-objs := bnx2x_main.o bnx2x_link.o
spidernet-y += spider_net.o spider_net_ethtool.o
obj-$(CONFIG_SPIDER_NET) += spidernet.o sungem_phy.o
obj-$(CONFIG_GELIC_NET) += ps3_gelic.o
@ -80,6 +80,7 @@ obj-$(CONFIG_VIA_RHINE) += via-rhine.o
obj-$(CONFIG_VIA_VELOCITY) += via-velocity.o
obj-$(CONFIG_ADAPTEC_STARFIRE) += starfire.o
obj-$(CONFIG_RIONET) += rionet.o
obj-$(CONFIG_SH_ETH) += sh_eth.o
#
# end link order section
@ -105,11 +106,11 @@ ifeq ($(CONFIG_FEC_MPC52xx_MDIO),y)
endif
obj-$(CONFIG_68360_ENET) += 68360enet.o
obj-$(CONFIG_WD80x3) += wd.o 8390.o
obj-$(CONFIG_EL2) += 3c503.o 8390.o
obj-$(CONFIG_NE2000) += ne.o 8390.o
obj-$(CONFIG_NE2_MCA) += ne2.o 8390.o
obj-$(CONFIG_HPLAN) += hp.o 8390.o
obj-$(CONFIG_HPLAN_PLUS) += hp-plus.o 8390.o
obj-$(CONFIG_EL2) += 3c503.o 8390p.o
obj-$(CONFIG_NE2000) += ne.o 8390p.o
obj-$(CONFIG_NE2_MCA) += ne2.o 8390p.o
obj-$(CONFIG_HPLAN) += hp.o 8390p.o
obj-$(CONFIG_HPLAN_PLUS) += hp-plus.o 8390p.o
obj-$(CONFIG_ULTRA) += smc-ultra.o 8390.o
obj-$(CONFIG_ULTRAMCA) += smc-mca.o 8390.o
obj-$(CONFIG_ULTRA32) += smc-ultra32.o 8390.o
@ -165,7 +166,6 @@ obj-$(CONFIG_EEXPRESS_PRO) += eepro.o
obj-$(CONFIG_8139CP) += 8139cp.o
obj-$(CONFIG_8139TOO) += 8139too.o
obj-$(CONFIG_ZNET) += znet.o
obj-$(CONFIG_LAN_SAA9730) += saa9730.o
obj-$(CONFIG_CPMAC) += cpmac.o
obj-$(CONFIG_DEPCA) += depca.o
obj-$(CONFIG_EWRK3) += ewrk3.o
@ -235,6 +235,7 @@ obj-$(CONFIG_USB_CATC) += usb/
obj-$(CONFIG_USB_KAWETH) += usb/
obj-$(CONFIG_USB_PEGASUS) += usb/
obj-$(CONFIG_USB_RTL8150) += usb/
obj-$(CONFIG_USB_HSO) += usb/
obj-$(CONFIG_USB_USBNET) += usb/
obj-$(CONFIG_USB_ZD1201) += usb/

4
drivers/net/a2065.c
View File

@ -475,16 +475,12 @@ static irqreturn_t lance_interrupt (int irq, void *dev_id)
return IRQ_HANDLED;
}
struct net_device *last_dev;
static int lance_open (struct net_device *dev)
{
struct lance_private *lp = netdev_priv(dev);
volatile struct lance_regs *ll = lp->ll;
int ret;
last_dev = dev;
/* Stop the Lance */
ll->rap = LE_CSR0;
ll->rdp = LE_C0_STOP;

21
drivers/net/acenic.c
View File

@ -1457,11 +1457,6 @@ static int __devinit ace_init(struct net_device *dev)
ace_set_txprd(regs, ap, 0);
writel(0, &regs->RxRetCsm);
/*
* Zero the stats before starting the interface
*/
memset(&ap->stats, 0, sizeof(ap->stats));
/*
* Enable DMA engine now.
* If we do this sooner, Mckinley box pukes.
@ -2041,8 +2036,8 @@ static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm)
netif_rx(skb);
dev->last_rx = jiffies;
ap->stats.rx_packets++;
ap->stats.rx_bytes += retdesc->size;
dev->stats.rx_packets++;
dev->stats.rx_bytes += retdesc->size;
idx = (idx + 1) % RX_RETURN_RING_ENTRIES;
}
@ -2090,8 +2085,8 @@ static inline void ace_tx_int(struct net_device *dev,
}
if (skb) {
ap->stats.tx_packets++;
ap->stats.tx_bytes += skb->len;
dev->stats.tx_packets++;
dev->stats.tx_bytes += skb->len;
dev_kfree_skb_irq(skb);
info->skb = NULL;
}
@ -2863,11 +2858,11 @@ static struct net_device_stats *ace_get_stats(struct net_device *dev)
struct ace_mac_stats __iomem *mac_stats =
(struct ace_mac_stats __iomem *)ap->regs->Stats;
ap->stats.rx_missed_errors = readl(&mac_stats->drop_space);
ap->stats.multicast = readl(&mac_stats->kept_mc);
ap->stats.collisions = readl(&mac_stats->coll);
dev->stats.rx_missed_errors = readl(&mac_stats->drop_space);
dev->stats.multicast = readl(&mac_stats->kept_mc);
dev->stats.collisions = readl(&mac_stats->coll);
return &ap->stats;
return &dev->stats;
}

1
drivers/net/acenic.h
View File

@ -693,7 +693,6 @@ struct ace_private
__attribute__ ((aligned (SMP_CACHE_BYTES)));
u32 last_tx, last_std_rx, last_mini_rx;
#endif
struct net_device_stats stats;
int pci_using_dac;
};

137
drivers/net/amd8111e.c
View File

@ -101,9 +101,9 @@ Revision History:
#include "amd8111e.h"
#define MODULE_NAME "amd8111e"
#define MODULE_VERS "3.0.6"
#define MODULE_VERS "3.0.7"
MODULE_AUTHOR("Advanced Micro Devices, Inc.");
MODULE_DESCRIPTION ("AMD8111 based 10/100 Ethernet Controller. Driver Version 3.0.6");
MODULE_DESCRIPTION ("AMD8111 based 10/100 Ethernet Controller. Driver Version "MODULE_VERS);
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, amd8111e_pci_tbl);
module_param_array(speed_duplex, int, NULL, 0);
@ -671,11 +671,7 @@ This is the receive indication function for packets with vlan tag.
*/
static int amd8111e_vlan_rx(struct amd8111e_priv *lp, struct sk_buff *skb, u16 vlan_tag)
{
#ifdef CONFIG_AMD8111E_NAPI
return vlan_hwaccel_receive_skb(skb, lp->vlgrp,vlan_tag);
#else
return vlan_hwaccel_rx(skb, lp->vlgrp, vlan_tag);
#endif /* CONFIG_AMD8111E_NAPI */
}
#endif
@ -722,7 +718,6 @@ static int amd8111e_tx(struct net_device *dev)
return 0;
}
#ifdef CONFIG_AMD8111E_NAPI
/* This function handles the driver receive operation in polling mode */
static int amd8111e_rx_poll(struct napi_struct *napi, int budget)
{
@ -734,7 +729,6 @@ static int amd8111e_rx_poll(struct napi_struct *napi, int budget)
int min_pkt_len, status;
unsigned int intr0;
int num_rx_pkt = 0;
/*int max_rx_pkt = NUM_RX_BUFFERS;*/
short pkt_len;
#if AMD8111E_VLAN_TAG_USED
short vtag;
@ -850,108 +844,6 @@ rx_not_empty:
return num_rx_pkt;
}
#else
/*
This function will check the ownership of receive buffers and descriptors. It will indicate to kernel up to half the number of maximum receive buffers in the descriptor ring, in a single receive interrupt. It will also replenish the descriptors with new skbs.
*/
static int amd8111e_rx(struct net_device *dev)
{
struct amd8111e_priv *lp = netdev_priv(dev);
struct sk_buff *skb,*new_skb;
int rx_index = lp->rx_idx & RX_RING_DR_MOD_MASK;
int min_pkt_len, status;
int num_rx_pkt = 0;
int max_rx_pkt = NUM_RX_BUFFERS;
short pkt_len;
#if AMD8111E_VLAN_TAG_USED
short vtag;
#endif
/* If we own the next entry, it's a new packet. Send it up. */
while(++num_rx_pkt <= max_rx_pkt){
status = le16_to_cpu(lp->rx_ring[rx_index].rx_flags);
if(status & OWN_BIT)
return 0;
/* check if err summary bit is set */
if(status & ERR_BIT){
/*
* There is a tricky error noted by John Murphy,
* <murf@perftech.com> to Russ Nelson: Even with full-sized
* buffers it's possible for a jabber packet to use two
* buffers, with only the last correctly noting the error. */
/* reseting flags */
lp->rx_ring[rx_index].rx_flags &= RESET_RX_FLAGS;
goto err_next_pkt;
}
/* check for STP and ENP */
if(!((status & STP_BIT) && (status & ENP_BIT))){
/* reseting flags */
lp->rx_ring[rx_index].rx_flags &= RESET_RX_FLAGS;
goto err_next_pkt;
}
pkt_len = le16_to_cpu(lp->rx_ring[rx_index].msg_count) - 4;
#if AMD8111E_VLAN_TAG_USED
vtag = status & TT_MASK;
/*MAC will strip vlan tag*/
if(lp->vlgrp != NULL && vtag !=0)
min_pkt_len =MIN_PKT_LEN - 4;
else
#endif
min_pkt_len =MIN_PKT_LEN;
if (pkt_len < min_pkt_len) {
lp->rx_ring[rx_index].rx_flags &= RESET_RX_FLAGS;
lp->drv_rx_errors++;
goto err_next_pkt;
}
if(!(new_skb = dev_alloc_skb(lp->rx_buff_len))){
/* if allocation fail,
ignore that pkt and go to next one */
lp->rx_ring[rx_index].rx_flags &= RESET_RX_FLAGS;
lp->drv_rx_errors++;
goto err_next_pkt;
}
skb_reserve(new_skb, 2);
skb = lp->rx_skbuff[rx_index];
pci_unmap_single(lp->pci_dev,lp->rx_dma_addr[rx_index],
lp->rx_buff_len-2, PCI_DMA_FROMDEVICE);
skb_put(skb, pkt_len);
lp->rx_skbuff[rx_index] = new_skb;
lp->rx_dma_addr[rx_index] = pci_map_single(lp->pci_dev,
new_skb->data, lp->rx_buff_len-2,PCI_DMA_FROMDEVICE);
skb->protocol = eth_type_trans(skb, dev);
#if AMD8111E_VLAN_TAG_USED
if(lp->vlgrp != NULL && (vtag == TT_VLAN_TAGGED)){
amd8111e_vlan_rx(lp, skb,
le16_to_cpu(lp->rx_ring[rx_index].tag_ctrl_info));
} else
#endif
netif_rx (skb);
/*COAL update rx coalescing parameters*/
lp->coal_conf.rx_packets++;
lp->coal_conf.rx_bytes += pkt_len;
dev->last_rx = jiffies;
err_next_pkt:
lp->rx_ring[rx_index].buff_phy_addr
= cpu_to_le32(lp->rx_dma_addr[rx_index]);
lp->rx_ring[rx_index].buff_count =
cpu_to_le16(lp->rx_buff_len-2);
wmb();
lp->rx_ring[rx_index].rx_flags |= cpu_to_le16(OWN_BIT);
rx_index = (++lp->rx_idx) & RX_RING_DR_MOD_MASK;
}
return 0;
}
#endif /* CONFIG_AMD8111E_NAPI */
/*
This function will indicate the link status to the kernel.
*/
@ -1280,29 +1172,22 @@ static irqreturn_t amd8111e_interrupt(int irq, void *dev_id)
writel(intr0, mmio + INT0);
/* Check if Receive Interrupt has occurred. */
#ifdef CONFIG_AMD8111E_NAPI
if(intr0 & RINT0){
if(netif_rx_schedule_prep(dev, &lp->napi)){
if (intr0 & RINT0) {
if (netif_rx_schedule_prep(dev, &lp->napi)) {
/* Disable receive interupts */
writel(RINTEN0, mmio + INTEN0);
/* Schedule a polling routine */
__netif_rx_schedule(dev, &lp->napi);
}
else if (intren0 & RINTEN0) {
} else if (intren0 & RINTEN0) {
printk("************Driver bug! \
interrupt while in poll\n");
/* Fix by disable receive interrupts */
writel(RINTEN0, mmio + INTEN0);
}
}
#else
if(intr0 & RINT0){
amd8111e_rx(dev);
writel(VAL2 | RDMD0, mmio + CMD0);
}
#endif /* CONFIG_AMD8111E_NAPI */
/* Check if Transmit Interrupt has occurred. */
if(intr0 & TINT0)
if (intr0 & TINT0)
amd8111e_tx(dev);
/* Check if Link Change Interrupt has occurred. */
@ -1340,9 +1225,7 @@ static int amd8111e_close(struct net_device * dev)
struct amd8111e_priv *lp = netdev_priv(dev);
netif_stop_queue(dev);
#ifdef CONFIG_AMD8111E_NAPI
napi_disable(&lp->napi);
#endif
spin_lock_irq(&lp->lock);
@ -1374,9 +1257,7 @@ static int amd8111e_open(struct net_device * dev )
dev->name, dev))
return -EAGAIN;
#ifdef CONFIG_AMD8111E_NAPI
napi_enable(&lp->napi);
#endif
spin_lock_irq(&lp->lock);
@ -1384,9 +1265,7 @@ static int amd8111e_open(struct net_device * dev )
if(amd8111e_restart(dev)){
spin_unlock_irq(&lp->lock);
#ifdef CONFIG_AMD8111E_NAPI
napi_disable(&lp->napi);
#endif
if (dev->irq)
free_irq(dev->irq, dev);
return -ENOMEM;
@ -2036,9 +1915,7 @@ static int __devinit amd8111e_probe_one(struct pci_dev *pdev,
dev->irq =pdev->irq;
dev->tx_timeout = amd8111e_tx_timeout;
dev->watchdog_timeo = AMD8111E_TX_TIMEOUT;
#ifdef CONFIG_AMD8111E_NAPI
netif_napi_add(dev, &lp->napi, amd8111e_rx_poll, 32);
#endif
#ifdef CONFIG_NET_POLL_CONTROLLER
dev->poll_controller = amd8111e_poll;
#endif

3
drivers/net/arm/ixp4xx_eth.c
View File

@ -522,7 +522,6 @@ static int eth_poll(struct napi_struct *napi, int budget)
#endif
if ((n = queue_get_desc(rxq, port, 0)) < 0) {
received = 0; /* No packet received */
#if DEBUG_RX
printk(KERN_DEBUG "%s: eth_poll netif_rx_complete\n",
dev->name);
@ -543,7 +542,7 @@ static int eth_poll(struct napi_struct *napi, int budget)
printk(KERN_DEBUG "%s: eth_poll all done\n",
dev->name);
#endif
return 0; /* all work done */
return received; /* all work done */
}
desc = rx_desc_ptr(port, n);

2
drivers/net/atarilance.c
View File

@ -243,7 +243,7 @@ struct lance_private {
/* Possible memory/IO addresses for probing */
struct lance_addr {
static struct lance_addr {
unsigned long memaddr;
unsigned long ioaddr;
int slow_flag;

3
drivers/net/atlx/atl1.c
View File

@ -1859,7 +1859,8 @@ static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)
rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use);
skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
skb = netdev_alloc_skb(adapter->netdev,
adapter->rx_buffer_len + NET_IP_ALIGN);
if (unlikely(!skb)) {
/* Better luck next round */
adapter->net_stats.rx_dropped++;

2
drivers/net/au1000_eth.c
View File

@ -912,7 +912,7 @@ au1000_adjust_link(struct net_device *dev)
// link state changed
if (phydev->link) // link went up
netif_schedule(dev);
netif_tx_schedule_all(dev);
else { // link went down
aup->old_speed = 0;
aup->old_duplex = -1;

140
drivers/net/b44.c
View File

@ -148,9 +148,9 @@ static inline void b44_sync_dma_desc_for_device(struct ssb_device *sdev,
unsigned long offset,
enum dma_data_direction dir)
{
dma_sync_single_range_for_device(sdev->dma_dev, dma_base,
offset & dma_desc_align_mask,
dma_desc_sync_size, dir);
ssb_dma_sync_single_range_for_device(sdev, dma_base,
offset & dma_desc_align_mask,
dma_desc_sync_size, dir);
}
static inline void b44_sync_dma_desc_for_cpu(struct ssb_device *sdev,
@ -158,9 +158,9 @@ static inline void b44_sync_dma_desc_for_cpu(struct ssb_device *sdev,
unsigned long offset,
enum dma_data_direction dir)
{
dma_sync_single_range_for_cpu(sdev->dma_dev, dma_base,
offset & dma_desc_align_mask,
dma_desc_sync_size, dir);
ssb_dma_sync_single_range_for_cpu(sdev, dma_base,
offset & dma_desc_align_mask,
dma_desc_sync_size, dir);
}
static inline unsigned long br32(const struct b44 *bp, unsigned long reg)
@ -613,10 +613,10 @@ static void b44_tx(struct b44 *bp)
BUG_ON(skb == NULL);
dma_unmap_single(bp->sdev->dma_dev,
rp->mapping,
skb->len,
DMA_TO_DEVICE);
ssb_dma_unmap_single(bp->sdev,
rp->mapping,
skb->len,
DMA_TO_DEVICE);
rp->skb = NULL;
dev_kfree_skb_irq(skb);
}
@ -653,29 +653,29 @@ static int b44_alloc_rx_skb(struct b44 *bp, int src_idx, u32 dest_idx_unmasked)
if (skb == NULL)
return -ENOMEM;
mapping = dma_map_single(bp->sdev->dma_dev, skb->data,
RX_PKT_BUF_SZ,
DMA_FROM_DEVICE);
mapping = ssb_dma_map_single(bp->sdev, skb->data,
RX_PKT_BUF_SZ,
DMA_FROM_DEVICE);
/* Hardware bug work-around, the chip is unable to do PCI DMA
to/from anything above 1GB :-( */
if (dma_mapping_error(mapping) ||
if (ssb_dma_mapping_error(bp->sdev, mapping) ||
mapping + RX_PKT_BUF_SZ > DMA_30BIT_MASK) {
/* Sigh... */
if (!dma_mapping_error(mapping))
dma_unmap_single(bp->sdev->dma_dev, mapping,
RX_PKT_BUF_SZ, DMA_FROM_DEVICE);
if (!ssb_dma_mapping_error(bp->sdev, mapping))
ssb_dma_unmap_single(bp->sdev, mapping,
RX_PKT_BUF_SZ, DMA_FROM_DEVICE);
dev_kfree_skb_any(skb);
skb = __netdev_alloc_skb(bp->dev, RX_PKT_BUF_SZ, GFP_ATOMIC|GFP_DMA);
if (skb == NULL)
return -ENOMEM;
mapping = dma_map_single(bp->sdev->dma_dev, skb->data,
RX_PKT_BUF_SZ,
DMA_FROM_DEVICE);
if (dma_mapping_error(mapping) ||
mapping = ssb_dma_map_single(bp->sdev, skb->data,
RX_PKT_BUF_SZ,
DMA_FROM_DEVICE);
if (ssb_dma_mapping_error(bp->sdev, mapping) ||
mapping + RX_PKT_BUF_SZ > DMA_30BIT_MASK) {
if (!dma_mapping_error(mapping))
dma_unmap_single(bp->sdev->dma_dev, mapping, RX_PKT_BUF_SZ,DMA_FROM_DEVICE);
if (!ssb_dma_mapping_error(bp->sdev, mapping))
ssb_dma_unmap_single(bp->sdev, mapping, RX_PKT_BUF_SZ,DMA_FROM_DEVICE);
dev_kfree_skb_any(skb);
return -ENOMEM;
}
@ -750,9 +750,9 @@ static void b44_recycle_rx(struct b44 *bp, int src_idx, u32 dest_idx_unmasked)
dest_idx * sizeof(dest_desc),
DMA_BIDIRECTIONAL);
dma_sync_single_for_device(bp->sdev->dma_dev, le32_to_cpu(src_desc->addr),
RX_PKT_BUF_SZ,
DMA_FROM_DEVICE);
ssb_dma_sync_single_for_device(bp->sdev, le32_to_cpu(src_desc->addr),
RX_PKT_BUF_SZ,
DMA_FROM_DEVICE);
}
static int b44_rx(struct b44 *bp, int budget)
@ -772,7 +772,7 @@ static int b44_rx(struct b44 *bp, int budget)
struct rx_header *rh;
u16 len;
dma_sync_single_for_cpu(bp->sdev->dma_dev, map,
ssb_dma_sync_single_for_cpu(bp->sdev, map,
RX_PKT_BUF_SZ,
DMA_FROM_DEVICE);
rh = (struct rx_header *) skb->data;
@ -806,8 +806,8 @@ static int b44_rx(struct b44 *bp, int budget)
skb_size = b44_alloc_rx_skb(bp, cons, bp->rx_prod);
if (skb_size < 0)
goto drop_it;
dma_unmap_single(bp->sdev->dma_dev, map,
skb_size, DMA_FROM_DEVICE);
ssb_dma_unmap_single(bp->sdev, map,
skb_size, DMA_FROM_DEVICE);
/* Leave out rx_header */
skb_put(skb, len + RX_PKT_OFFSET);
skb_pull(skb, RX_PKT_OFFSET);
@ -966,25 +966,25 @@ static int b44_start_xmit(struct sk_buff *skb, struct net_device *dev)
goto err_out;
}
mapping = dma_map_single(bp->sdev->dma_dev, skb->data, len, DMA_TO_DEVICE);
if (dma_mapping_error(mapping) || mapping + len > DMA_30BIT_MASK) {
mapping = ssb_dma_map_single(bp->sdev, skb->data, len, DMA_TO_DEVICE);
if (ssb_dma_mapping_error(bp->sdev, mapping) || mapping + len > DMA_30BIT_MASK) {
struct sk_buff *bounce_skb;
/* Chip can't handle DMA to/from >1GB, use bounce buffer */
if (!dma_mapping_error(mapping))
dma_unmap_single(bp->sdev->dma_dev, mapping, len,
DMA_TO_DEVICE);
if (!ssb_dma_mapping_error(bp->sdev, mapping))
ssb_dma_unmap_single(bp->sdev, mapping, len,
DMA_TO_DEVICE);
bounce_skb = __dev_alloc_skb(len, GFP_ATOMIC | GFP_DMA);
if (!bounce_skb)
goto err_out;
mapping = dma_map_single(bp->sdev->dma_dev, bounce_skb->data,
len, DMA_TO_DEVICE);
if (dma_mapping_error(mapping) || mapping + len > DMA_30BIT_MASK) {
if (!dma_mapping_error(mapping))
dma_unmap_single(bp->sdev->dma_dev, mapping,
len, DMA_TO_DEVICE);
mapping = ssb_dma_map_single(bp->sdev, bounce_skb->data,
len, DMA_TO_DEVICE);
if (ssb_dma_mapping_error(bp->sdev, mapping) || mapping + len > DMA_30BIT_MASK) {
if (!ssb_dma_mapping_error(bp->sdev, mapping))
ssb_dma_unmap_single(bp->sdev, mapping,
len, DMA_TO_DEVICE);
dev_kfree_skb_any(bounce_skb);
goto err_out;
}
@ -1082,8 +1082,8 @@ static void b44_free_rings(struct b44 *bp)
if (rp->skb == NULL)
continue;
dma_unmap_single(bp->sdev->dma_dev, rp->mapping, RX_PKT_BUF_SZ,
DMA_FROM_DEVICE);
ssb_dma_unmap_single(bp->sdev, rp->mapping, RX_PKT_BUF_SZ,
DMA_FROM_DEVICE);
dev_kfree_skb_any(rp->skb);
rp->skb = NULL;
}
@ -1094,8 +1094,8 @@ static void b44_free_rings(struct b44 *bp)
if (rp->skb == NULL)
continue;
dma_unmap_single(bp->sdev->dma_dev, rp->mapping, rp->skb->len,
DMA_TO_DEVICE);
ssb_dma_unmap_single(bp->sdev, rp->mapping, rp->skb->len,
DMA_TO_DEVICE);
dev_kfree_skb_any(rp->skb);
rp->skb = NULL;
}
@ -1117,14 +1117,14 @@ static void b44_init_rings(struct b44 *bp)
memset(bp->tx_ring, 0, B44_TX_RING_BYTES);
if (bp->flags & B44_FLAG_RX_RING_HACK)
dma_sync_single_for_device(bp->sdev->dma_dev, bp->rx_ring_dma,
DMA_TABLE_BYTES,
DMA_BIDIRECTIONAL);
ssb_dma_sync_single_for_device(bp->sdev, bp->rx_ring_dma,
DMA_TABLE_BYTES,
DMA_BIDIRECTIONAL);
if (bp->flags & B44_FLAG_TX_RING_HACK)
dma_sync_single_for_device(bp->sdev->dma_dev, bp->tx_ring_dma,
DMA_TABLE_BYTES,
DMA_TO_DEVICE);
ssb_dma_sync_single_for_device(bp->sdev, bp->tx_ring_dma,
DMA_TABLE_BYTES,
DMA_TO_DEVICE);
for (i = 0; i < bp->rx_pending; i++) {
if (b44_alloc_rx_skb(bp, -1, i) < 0)
@ -1144,25 +1144,27 @@ static void b44_free_consistent(struct b44 *bp)
bp->tx_buffers = NULL;
if (bp->rx_ring) {
if (bp->flags & B44_FLAG_RX_RING_HACK) {
dma_unmap_single(bp->sdev->dma_dev, bp->rx_ring_dma,
DMA_TABLE_BYTES,
DMA_BIDIRECTIONAL);
ssb_dma_unmap_single(bp->sdev, bp->rx_ring_dma,
DMA_TABLE_BYTES,
DMA_BIDIRECTIONAL);
kfree(bp->rx_ring);
} else
dma_free_coherent(bp->sdev->dma_dev, DMA_TABLE_BYTES,
bp->rx_ring, bp->rx_ring_dma);
ssb_dma_free_consistent(bp->sdev, DMA_TABLE_BYTES,
bp->rx_ring, bp->rx_ring_dma,
GFP_KERNEL);
bp->rx_ring = NULL;
bp->flags &= ~B44_FLAG_RX_RING_HACK;
}
if (bp->tx_ring) {
if (bp->flags & B44_FLAG_TX_RING_HACK) {
dma_unmap_single(bp->sdev->dma_dev, bp->tx_ring_dma,
DMA_TABLE_BYTES,
DMA_TO_DEVICE);
ssb_dma_unmap_single(bp->sdev, bp->tx_ring_dma,
DMA_TABLE_BYTES,
DMA_TO_DEVICE);
kfree(bp->tx_ring);
} else
dma_free_coherent(bp->sdev->dma_dev, DMA_TABLE_BYTES,
bp->tx_ring, bp->tx_ring_dma);
ssb_dma_free_consistent(bp->sdev, DMA_TABLE_BYTES,
bp->tx_ring, bp->tx_ring_dma,
GFP_KERNEL);
bp->tx_ring = NULL;
bp->flags &= ~B44_FLAG_TX_RING_HACK;
}
@ -1187,7 +1189,7 @@ static int b44_alloc_consistent(struct b44 *bp, gfp_t gfp)
goto out_err;
size = DMA_TABLE_BYTES;
bp->rx_ring = dma_alloc_coherent(bp->sdev->dma_dev, size, &bp->rx_ring_dma, gfp);
bp->rx_ring = ssb_dma_alloc_consistent(bp->sdev, size, &bp->rx_ring_dma, gfp);
if (!bp->rx_ring) {
/* Allocation may have failed due to pci_alloc_consistent
insisting on use of GFP_DMA, which is more restrictive
@ -1199,11 +1201,11 @@ static int b44_alloc_consistent(struct b44 *bp, gfp_t gfp)
if (!rx_ring)
goto out_err;
rx_ring_dma = dma_map_single(bp->sdev->dma_dev, rx_ring,
DMA_TABLE_BYTES,
DMA_BIDIRECTIONAL);
rx_ring_dma = ssb_dma_map_single(bp->sdev, rx_ring,
DMA_TABLE_BYTES,
DMA_BIDIRECTIONAL);
if (dma_mapping_error(rx_ring_dma) ||
if (ssb_dma_mapping_error(bp->sdev, rx_ring_dma) ||
rx_ring_dma + size > DMA_30BIT_MASK) {
kfree(rx_ring);
goto out_err;
@ -1214,9 +1216,9 @@ static int b44_alloc_consistent(struct b44 *bp, gfp_t gfp)
bp->flags |= B44_FLAG_RX_RING_HACK;
}
bp->tx_ring = dma_alloc_coherent(bp->sdev->dma_dev, size, &bp->tx_ring_dma, gfp);
bp->tx_ring = ssb_dma_alloc_consistent(bp->sdev, size, &bp->tx_ring_dma, gfp);
if (!bp->tx_ring) {
/* Allocation may have failed due to dma_alloc_coherent
/* Allocation may have failed due to ssb_dma_alloc_consistent
insisting on use of GFP_DMA, which is more restrictive
than necessary... */
struct dma_desc *tx_ring;
@ -1226,11 +1228,11 @@ static int b44_alloc_consistent(struct b44 *bp, gfp_t gfp)
if (!tx_ring)
goto out_err;
tx_ring_dma = dma_map_single(bp->sdev->dma_dev, tx_ring,
tx_ring_dma = ssb_dma_map_single(bp->sdev, tx_ring,
DMA_TABLE_BYTES,
DMA_TO_DEVICE);
if (dma_mapping_error(tx_ring_dma) ||
if (ssb_dma_mapping_error(bp->sdev, tx_ring_dma) ||
tx_ring_dma + size > DMA_30BIT_MASK) {
kfree(tx_ring);
goto out_err;

2
drivers/net/bfin_mac.c
View File

@ -357,7 +357,7 @@ static void bfin_mac_adjust_link(struct net_device *dev)
if (!lp->old_link) {
new_state = 1;
lp->old_link = 1;
netif_schedule(dev);
netif_tx_schedule_all(dev);
}
} else if (lp->old_link) {
new_state = 1;

1345
drivers/net/bnx2.c
View File

File diff suppressed because it is too large Load Diff

115
drivers/net/bnx2.h
View File

@ -309,6 +309,7 @@ struct l2_fhdr {
#endif
};
#define BNX2_RX_OFFSET (sizeof(struct l2_fhdr) + 2)
/*
* l2_context definition
@ -4156,6 +4157,23 @@ struct l2_fhdr {
#define BNX2_RPM_ACPI_PATTERN_CRC7_PATTERN_CRC7 (0xffffffffL<<0)
/*
* rlup_reg definition
* offset: 0x2000
*/
#define BNX2_RLUP_RSS_CONFIG 0x0000201c
#define BNX2_RLUP_RSS_CONFIG_IPV4_RSS_TYPE_XI (0x3L<<0)
#define BNX2_RLUP_RSS_CONFIG_IPV4_RSS_TYPE_OFF_XI (0L<<0)
#define BNX2_RLUP_RSS_CONFIG_IPV4_RSS_TYPE_ALL_XI (1L<<0)
#define BNX2_RLUP_RSS_CONFIG_IPV4_RSS_TYPE_IP_ONLY_XI (2L<<0)
#define BNX2_RLUP_RSS_CONFIG_IPV4_RSS_TYPE_RES_XI (3L<<0)
#define BNX2_RLUP_RSS_CONFIG_IPV6_RSS_TYPE_XI (0x3L<<2)
#define BNX2_RLUP_RSS_CONFIG_IPV6_RSS_TYPE_OFF_XI (0L<<2)
#define BNX2_RLUP_RSS_CONFIG_IPV6_RSS_TYPE_ALL_XI (1L<<2)
#define BNX2_RLUP_RSS_CONFIG_IPV6_RSS_TYPE_IP_ONLY_XI (2L<<2)
#define BNX2_RLUP_RSS_CONFIG_IPV6_RSS_TYPE_RES_XI (3L<<2)
/*
* rbuf_reg definition
* offset: 0x200000
@ -5527,6 +5545,9 @@ struct l2_fhdr {
#define BNX2_HC_TX_QUICK_CONS_TRIP_OFF (BNX2_HC_TX_QUICK_CONS_TRIP_1 - \
BNX2_HC_SB_CONFIG_1)
#define BNX2_HC_TX_TICKS_OFF (BNX2_HC_TX_TICKS_1 - BNX2_HC_SB_CONFIG_1)
#define BNX2_HC_RX_QUICK_CONS_TRIP_OFF (BNX2_HC_RX_QUICK_CONS_TRIP_1 - \
BNX2_HC_SB_CONFIG_1)
#define BNX2_HC_RX_TICKS_OFF (BNX2_HC_RX_TICKS_1 - BNX2_HC_SB_CONFIG_1)
/*
@ -5855,6 +5876,9 @@ struct l2_fhdr {
#define BNX2_RXP_FTQ_CTL_CUR_DEPTH (0x3ffL<<22)
#define BNX2_RXP_SCRATCH 0x000e0000
#define BNX2_RXP_SCRATCH_RSS_TBL_SZ 0x000e0038
#define BNX2_RXP_SCRATCH_RSS_TBL 0x000e003c
#define BNX2_RXP_SCRATCH_RSS_TBL_MAX_ENTRIES 128
/*
@ -6412,10 +6436,15 @@ struct l2_fhdr {
#define MAX_ETHERNET_PACKET_SIZE 1514
#define MAX_ETHERNET_JUMBO_PACKET_SIZE 9014
#define RX_COPY_THRESH 128
#define BNX2_RX_COPY_THRESH 128
#define BNX2_MISC_ENABLE_DEFAULT 0x17ffffff
#define BNX2_START_UNICAST_ADDRESS_INDEX 4
#define BNX2_END_UNICAST_ADDRESS_INDEX 7
#define BNX2_MAX_UNICAST_ADDRESSES (BNX2_END_UNICAST_ADDRESS_INDEX - \
BNX2_START_UNICAST_ADDRESS_INDEX + 1)
#define DMA_READ_CHANS 5
#define DMA_WRITE_CHANS 3
@ -6478,6 +6507,11 @@ struct l2_fhdr {
#define TX_CID 16
#define TX_TSS_CID 32
#define RX_CID 0
#define RX_RSS_CID 4
#define RX_MAX_RSS_RINGS 7
#define RX_MAX_RINGS (RX_MAX_RSS_RINGS + 1)
#define TX_MAX_TSS_RINGS 7
#define TX_MAX_RINGS (TX_MAX_TSS_RINGS + 1)
#define MB_TX_CID_ADDR MB_GET_CID_ADDR(TX_CID)
#define MB_RX_CID_ADDR MB_GET_CID_ADDR(RX_CID)
@ -6556,7 +6590,7 @@ struct flash_spec {
};
#define BNX2_MAX_MSIX_HW_VEC 9
#define BNX2_MAX_MSIX_VEC 2
#define BNX2_MAX_MSIX_VEC 9
#define BNX2_BASE_VEC 0
#define BNX2_TX_VEC 1
#define BNX2_TX_INT_NUM (BNX2_TX_VEC << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT)
@ -6568,24 +6602,56 @@ struct bnx2_irq {
char name[16];
};
struct bnx2_napi {
struct napi_struct napi ____cacheline_aligned;
struct bnx2 *bp;
struct status_block *status_blk;
struct status_block_msix *status_blk_msix;
u32 last_status_idx;
u32 int_num;
struct bnx2_tx_ring_info {
u32 tx_prod_bseq;
u16 tx_prod;
u32 tx_bidx_addr;
u32 tx_bseq_addr;
struct tx_bd *tx_desc_ring;
struct sw_bd *tx_buf_ring;
u16 tx_cons;
u16 hw_tx_cons;
dma_addr_t tx_desc_mapping;
};
struct bnx2_rx_ring_info {
u32 rx_prod_bseq;
u16 rx_prod;
u16 rx_cons;
u32 rx_bidx_addr;
u32 rx_bseq_addr;
u32 rx_pg_bidx_addr;
u16 rx_pg_prod;
u16 rx_pg_cons;
struct sw_bd *rx_buf_ring;
struct rx_bd *rx_desc_ring[MAX_RX_RINGS];
struct sw_pg *rx_pg_ring;
struct rx_bd *rx_pg_desc_ring[MAX_RX_PG_RINGS];
dma_addr_t rx_desc_mapping[MAX_RX_RINGS];
dma_addr_t rx_pg_desc_mapping[MAX_RX_PG_RINGS];
};
struct bnx2_napi {
struct napi_struct napi ____cacheline_aligned;
struct bnx2 *bp;
union {
struct status_block *msi;
struct status_block_msix *msix;
} status_blk;
u16 *hw_tx_cons_ptr;
u16 *hw_rx_cons_ptr;
u32 last_status_idx;
u32 int_num;
struct bnx2_rx_ring_info rx_ring;
struct bnx2_tx_ring_info tx_ring;
};
struct bnx2 {
@ -6612,14 +6678,7 @@ struct bnx2 {
#define BNX2_FLAG_USING_MSI_OR_MSIX (BNX2_FLAG_USING_MSI | \
BNX2_FLAG_USING_MSIX)
#define BNX2_FLAG_JUMBO_BROKEN 0x00000800
/* Put tx producer and consumer fields in separate cache lines. */
u32 tx_prod_bseq __attribute__((aligned(L1_CACHE_BYTES)));
u16 tx_prod;
u8 tx_vec;
u32 tx_bidx_addr;
u32 tx_bseq_addr;
#define BNX2_FLAG_CAN_KEEP_VLAN 0x00001000
struct bnx2_napi bnx2_napi[BNX2_MAX_MSIX_VEC];
@ -6627,7 +6686,6 @@ struct bnx2 {
struct vlan_group *vlgrp;
#endif
u32 rx_offset;
u32 rx_buf_use_size; /* useable size */
u32 rx_buf_size; /* with alignment */
u32 rx_copy_thresh;
@ -6637,14 +6695,7 @@ struct bnx2 {
u32 rx_csum;
struct sw_bd *rx_buf_ring;
struct rx_bd *rx_desc_ring[MAX_RX_RINGS];
struct sw_pg *rx_pg_ring;
struct rx_bd *rx_pg_desc_ring[MAX_RX_PG_RINGS];
/* TX constants */
struct tx_bd *tx_desc_ring;
struct sw_bd *tx_buf_ring;
int tx_ring_size;
u32 tx_wake_thresh;
@ -6722,16 +6773,11 @@ struct bnx2 {
u16 fw_wr_seq;
u16 fw_drv_pulse_wr_seq;
dma_addr_t tx_desc_mapping;
int rx_max_ring;
int rx_ring_size;
dma_addr_t rx_desc_mapping[MAX_RX_RINGS];
int rx_max_pg_ring;
int rx_pg_ring_size;
dma_addr_t rx_pg_desc_mapping[MAX_RX_PG_RINGS];
u16 tx_quick_cons_trip;
u16 tx_quick_cons_trip_int;
@ -6750,7 +6796,6 @@ struct bnx2 {
u32 stats_ticks;
struct status_block *status_blk;
dma_addr_t status_blk_mapping;
struct statistics_block *stats_blk;
@ -6812,6 +6857,9 @@ struct bnx2 {
struct bnx2_irq irq_tbl[BNX2_MAX_MSIX_VEC];
int irq_nvecs;
u8 num_tx_rings;
u8 num_rx_rings;
};
#define REG_RD(bp, offset) \
@ -6912,6 +6960,7 @@ struct fw_info {
#define BNX2_DRV_MSG_CODE_DIAG 0x07000000
#define BNX2_DRV_MSG_CODE_SUSPEND_NO_WOL 0x09000000
#define BNX2_DRV_MSG_CODE_UNLOAD_LNK_DN 0x0b000000
#define BNX2_DRV_MSG_CODE_KEEP_VLAN_UPDATE 0x0d000000
#define BNX2_DRV_MSG_CODE_CMD_SET_LINK 0x10000000
#define BNX2_DRV_MSG_DATA 0x00ff0000
@ -7240,6 +7289,10 @@ struct fw_info {
#define BNX2_FW_CAP_SIGNATURE_MASK 0xffff0000
#define BNX2_FW_CAP_REMOTE_PHY_CAPABLE 0x00000001
#define BNX2_FW_CAP_REMOTE_PHY_PRESENT 0x00000002
#define BNX2_FW_CAP_MFW_CAN_KEEP_VLAN 0x00000008
#define BNX2_FW_CAP_BC_CAN_KEEP_VLAN 0x00000010
#define BNX2_FW_CAP_CAN_KEEP_VLAN (BNX2_FW_CAP_BC_CAN_KEEP_VLAN | \
BNX2_FW_CAP_MFW_CAN_KEEP_VLAN)
#define BNX2_RPHY_SIGNATURE 0x36c
#define BNX2_RPHY_LOAD_SIGNATURE 0x5a5a5a5a

80
drivers/net/bnx2_fw.h
View File

@ -886,6 +886,23 @@ static struct fw_info bnx2_com_fw_06 = {
.rodata = bnx2_COM_b06FwRodata,
};
/* Initialized Values for the Completion Processor. */
static const struct cpu_reg cpu_reg_com = {
.mode = BNX2_COM_CPU_MODE,
.mode_value_halt = BNX2_COM_CPU_MODE_SOFT_HALT,
.mode_value_sstep = BNX2_COM_CPU_MODE_STEP_ENA,
.state = BNX2_COM_CPU_STATE,
.state_value_clear = 0xffffff,
.gpr0 = BNX2_COM_CPU_REG_FILE,
.evmask = BNX2_COM_CPU_EVENT_MASK,
.pc = BNX2_COM_CPU_PROGRAM_COUNTER,
.inst = BNX2_COM_CPU_INSTRUCTION,
.bp = BNX2_COM_CPU_HW_BREAKPOINT,
.spad_base = BNX2_COM_SCRATCH,
.mips_view_base = 0x8000000,
};
static u8 bnx2_CP_b06FwText[] = {
0x9d, 0xbc, 0x0d, 0x78, 0x13, 0xe7, 0x99, 0x2e, 0x7c, 0xcf, 0x48, 0xb2,
0x65, 0x5b, 0xb6, 0xc7, 0xb6, 0x0c, 0x22, 0x65, 0x41, 0x83, 0x47, 0x20,
@ -2167,6 +2184,22 @@ static struct fw_info bnx2_cp_fw_06 = {
.rodata = bnx2_CP_b06FwRodata,
};
/* Initialized Values the Command Processor. */
static const struct cpu_reg cpu_reg_cp = {
.mode = BNX2_CP_CPU_MODE,
.mode_value_halt = BNX2_CP_CPU_MODE_SOFT_HALT,
.mode_value_sstep = BNX2_CP_CPU_MODE_STEP_ENA,
.state = BNX2_CP_CPU_STATE,
.state_value_clear = 0xffffff,
.gpr0 = BNX2_CP_CPU_REG_FILE,
.evmask = BNX2_CP_CPU_EVENT_MASK,
.pc = BNX2_CP_CPU_PROGRAM_COUNTER,
.inst = BNX2_CP_CPU_INSTRUCTION,
.bp = BNX2_CP_CPU_HW_BREAKPOINT,
.spad_base = BNX2_CP_SCRATCH,
.mips_view_base = 0x8000000,
};
static u8 bnx2_RXP_b06FwText[] = {
0xec, 0x5b, 0x5d, 0x70, 0x5c, 0xd7, 0x5d, 0xff, 0xdf, 0xb3, 0x2b, 0x69,
0x2d, 0x4b, 0xf2, 0x95, 0xbc, 0x71, 0x56, 0xa9, 0x92, 0xec, 0x5a, 0x57,
@ -2946,6 +2979,22 @@ static struct fw_info bnx2_rxp_fw_06 = {
.rodata = bnx2_RXP_b06FwRodata,
};
/* Initialized Values for the RX Processor. */
static const struct cpu_reg cpu_reg_rxp = {
.mode = BNX2_RXP_CPU_MODE,
.mode_value_halt = BNX2_RXP_CPU_MODE_SOFT_HALT,
.mode_value_sstep = BNX2_RXP_CPU_MODE_STEP_ENA,
.state = BNX2_RXP_CPU_STATE,
.state_value_clear = 0xffffff,
.gpr0 = BNX2_RXP_CPU_REG_FILE,
.evmask = BNX2_RXP_CPU_EVENT_MASK,
.pc = BNX2_RXP_CPU_PROGRAM_COUNTER,
.inst = BNX2_RXP_CPU_INSTRUCTION,
.bp = BNX2_RXP_CPU_HW_BREAKPOINT,
.spad_base = BNX2_RXP_SCRATCH,
.mips_view_base = 0x8000000,
};
static u8 bnx2_rv2p_proc1[] = {
/* Date: 12/07/2007 15:02 */
0xd5, 0x56, 0x41, 0x6b, 0x13, 0x51, 0x10, 0x9e, 0xdd, 0x6c, 0xbb, 0xdb,
@ -3651,6 +3700,22 @@ static struct fw_info bnx2_tpat_fw_06 = {
.rodata = bnx2_TPAT_b06FwRodata,
};
/* Initialized Values for the TX Patch-up Processor. */
static const struct cpu_reg cpu_reg_tpat = {
.mode = BNX2_TPAT_CPU_MODE,
.mode_value_halt = BNX2_TPAT_CPU_MODE_SOFT_HALT,
.mode_value_sstep = BNX2_TPAT_CPU_MODE_STEP_ENA,
.state = BNX2_TPAT_CPU_STATE,
.state_value_clear = 0xffffff,
.gpr0 = BNX2_TPAT_CPU_REG_FILE,
.evmask = BNX2_TPAT_CPU_EVENT_MASK,
.pc = BNX2_TPAT_CPU_PROGRAM_COUNTER,
.inst = BNX2_TPAT_CPU_INSTRUCTION,
.bp = BNX2_TPAT_CPU_HW_BREAKPOINT,
.spad_base = BNX2_TPAT_SCRATCH,
.mips_view_base = 0x8000000,
};
static u8 bnx2_TXP_b06FwText[] = {
0xad, 0x7b, 0x7f, 0x70, 0x9b, 0x75, 0x7a, 0xe7, 0xe7, 0xd5, 0x0f, 0x5b,
0xb2, 0x65, 0x59, 0x0e, 0x4a, 0x90, 0x77, 0xbd, 0x8d, 0x5e, 0xf4, 0xca,
@ -4531,3 +4596,18 @@ static struct fw_info bnx2_txp_fw_06 = {
.rodata = bnx2_TXP_b06FwRodata,
};
/* Initialized Values for the TX Processor. */
static const struct cpu_reg cpu_reg_txp = {
.mode = BNX2_TXP_CPU_MODE,
.mode_value_halt = BNX2_TXP_CPU_MODE_SOFT_HALT,
.mode_value_sstep = BNX2_TXP_CPU_MODE_STEP_ENA,
.state = BNX2_TXP_CPU_STATE,
.state_value_clear = 0xffffff,
.gpr0 = BNX2_TXP_CPU_REG_FILE,
.evmask = BNX2_TXP_CPU_EVENT_MASK,
.pc = BNX2_TXP_CPU_PROGRAM_COUNTER,
.inst = BNX2_TXP_CPU_INSTRUCTION,
.bp = BNX2_TXP_CPU_HW_BREAKPOINT,
.spad_base = BNX2_TXP_SCRATCH,
.mips_view_base = 0x8000000,
};

8858
drivers/net/bnx2_fw2.h
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File diff suppressed because it is too large Load Diff

9988
drivers/net/bnx2x.c
View File

File diff suppressed because it is too large Load Diff

1575
drivers/net/bnx2x.h
View File

File diff suppressed because it is too large Load Diff

477
drivers/net/bnx2x_fw_defs.h
View File

@ -8,191 +8,390 @@
*/
#define CSTORM_DEF_SB_HC_DISABLE_OFFSET(port, index)\
(0x1922 + (port * 0x40) + (index * 0x4))
#define CSTORM_DEF_SB_HOST_SB_ADDR_OFFSET(port)\
(0x1900 + (port * 0x40))
#define CSTORM_HC_BTR_OFFSET(port)\
(0x1984 + (port * 0xc0))
#define CSTORM_SB_HC_DISABLE_OFFSET(port, cpu_id, index)\
(0x141a + (port * 0x280) + (cpu_id * 0x28) + (index * 0x4))
#define CSTORM_SB_HC_TIMEOUT_OFFSET(port, cpu_id, index)\
(0x1418 + (port * 0x280) + (cpu_id * 0x28) + (index * 0x4))
#define CSTORM_SB_HOST_SB_ADDR_OFFSET(port, cpu_id)\
(0x1400 + (port * 0x280) + (cpu_id * 0x28))
#define CSTORM_STATS_FLAGS_OFFSET(port) (0x5108 + (port * 0x8))
#define TSTORM_CLIENT_CONFIG_OFFSET(port, client_id)\
(0x1510 + (port * 0x240) + (client_id * 0x20))
#define TSTORM_DEF_SB_HC_DISABLE_OFFSET(port, index)\
(0x138a + (port * 0x28) + (index * 0x4))
#define TSTORM_DEF_SB_HOST_SB_ADDR_OFFSET(port)\
(0x1370 + (port * 0x28))
#define TSTORM_ETH_STATS_QUERY_ADDR_OFFSET(port)\
(0x4b70 + (port * 0x8))
#define TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(function)\
(0x1418 + (function * 0x30))
#define TSTORM_HC_BTR_OFFSET(port)\
(0x13c4 + (port * 0x18))
#define TSTORM_INDIRECTION_TABLE_OFFSET(port)\
(0x22c8 + (port * 0x80))
#define TSTORM_INDIRECTION_TABLE_SIZE 0x80
#define TSTORM_MAC_FILTER_CONFIG_OFFSET(port)\
(0x1420 + (port * 0x30))
#define TSTORM_RCQ_PROD_OFFSET(port, client_id)\
(0x1508 + (port * 0x240) + (client_id * 0x20))
#define TSTORM_STATS_FLAGS_OFFSET(port) (0x4b90 + (port * 0x8))
#define USTORM_DEF_SB_HC_DISABLE_OFFSET(port, index)\
(0x191a + (port * 0x28) + (index * 0x4))
#define USTORM_DEF_SB_HOST_SB_ADDR_OFFSET(port)\
(0x1900 + (port * 0x28))
#define USTORM_HC_BTR_OFFSET(port)\
(0x1954 + (port * 0xb8))
#define USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(port)\
(0x5408 + (port * 0x8))
#define USTORM_SB_HC_DISABLE_OFFSET(port, cpu_id, index)\
(0x141a + (port * 0x280) + (cpu_id * 0x28) + (index * 0x4))
#define USTORM_SB_HC_TIMEOUT_OFFSET(port, cpu_id, index)\
(0x1418 + (port * 0x280) + (cpu_id * 0x28) + (index * 0x4))
#define USTORM_SB_HOST_SB_ADDR_OFFSET(port, cpu_id)\
(0x1400 + (port * 0x280) + (cpu_id * 0x28))
#define XSTORM_ASSERT_LIST_INDEX_OFFSET 0x1000
#define XSTORM_ASSERT_LIST_OFFSET(idx) (0x1020 + (idx * 0x10))
#define XSTORM_DEF_SB_HC_DISABLE_OFFSET(port, index)\
(0x141a + (port * 0x28) + (index * 0x4))
#define XSTORM_DEF_SB_HOST_SB_ADDR_OFFSET(port)\
(0x1400 + (port * 0x28))
#define XSTORM_ETH_STATS_QUERY_ADDR_OFFSET(port)\
(0x5408 + (port * 0x8))
#define XSTORM_HC_BTR_OFFSET(port)\
(0x1454 + (port * 0x18))
#define XSTORM_SPQ_PAGE_BASE_OFFSET(port)\
(0x5328 + (port * 0x18))
#define XSTORM_SPQ_PROD_OFFSET(port)\
(0x5330 + (port * 0x18))
#define XSTORM_STATS_FLAGS_OFFSET(port) (0x53f8 + (port * 0x8))
#define CSTORM_ASSERT_LIST_INDEX_OFFSET \
(IS_E1H_OFFSET? 0x7000 : 0x1000)
#define CSTORM_ASSERT_LIST_OFFSET(idx) \
(IS_E1H_OFFSET? (0x7020 + (idx * 0x10)) : (0x1020 + (idx * 0x10)))
#define CSTORM_DEF_SB_HC_DISABLE_OFFSET(function, index) \
(IS_E1H_OFFSET? (0x8522 + ((function>>1) * 0x40) + ((function&1) \
* 0x100) + (index * 0x4)) : (0x1922 + (function * 0x40) + (index \
* 0x4)))
#define CSTORM_DEF_SB_HOST_SB_ADDR_OFFSET(function) \
(IS_E1H_OFFSET? (0x8500 + ((function>>1) * 0x40) + ((function&1) \
* 0x100)) : (0x1900 + (function * 0x40)))
#define CSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(function) \
(IS_E1H_OFFSET? (0x8508 + ((function>>1) * 0x40) + ((function&1) \
* 0x100)) : (0x1908 + (function * 0x40)))
#define CSTORM_FUNCTION_MODE_OFFSET \
(IS_E1H_OFFSET? 0x11e8 : 0xffffffff)
#define CSTORM_HC_BTR_OFFSET(port) \
(IS_E1H_OFFSET? (0x8704 + (port * 0xf0)) : (0x1984 + (port * 0xc0)))
#define CSTORM_SB_HC_DISABLE_OFFSET(port, cpu_id, index) \
(IS_E1H_OFFSET? (0x801a + (port * 0x280) + (cpu_id * 0x28) + \
(index * 0x4)) : (0x141a + (port * 0x280) + (cpu_id * 0x28) + \
(index * 0x4)))
#define CSTORM_SB_HC_TIMEOUT_OFFSET(port, cpu_id, index) \
(IS_E1H_OFFSET? (0x8018 + (port * 0x280) + (cpu_id * 0x28) + \
(index * 0x4)) : (0x1418 + (port * 0x280) + (cpu_id * 0x28) + \
(index * 0x4)))
#define CSTORM_SB_HOST_SB_ADDR_OFFSET(port, cpu_id) \
(IS_E1H_OFFSET? (0x8000 + (port * 0x280) + (cpu_id * 0x28)) : \
(0x1400 + (port * 0x280) + (cpu_id * 0x28)))
#define CSTORM_SB_HOST_STATUS_BLOCK_OFFSET(port, cpu_id) \
(IS_E1H_OFFSET? (0x8008 + (port * 0x280) + (cpu_id * 0x28)) : \
(0x1408 + (port * 0x280) + (cpu_id * 0x28)))
#define CSTORM_STATS_FLAGS_OFFSET(function) \
(IS_E1H_OFFSET? (0x1108 + (function * 0x8)) : (0x5108 + \
(function * 0x8)))
#define TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(function) \
(IS_E1H_OFFSET? (0x31c0 + (function * 0x20)) : 0xffffffff)
#define TSTORM_ASSERT_LIST_INDEX_OFFSET \
(IS_E1H_OFFSET? 0xa000 : 0x1000)
#define TSTORM_ASSERT_LIST_OFFSET(idx) \
(IS_E1H_OFFSET? (0xa020 + (idx * 0x10)) : (0x1020 + (idx * 0x10)))
#define TSTORM_CLIENT_CONFIG_OFFSET(port, client_id) \
(IS_E1H_OFFSET? (0x3358 + (port * 0x3e8) + (client_id * 0x28)) : \
(0x9c8 + (port * 0x2f8) + (client_id * 0x28)))
#define TSTORM_DEF_SB_HC_DISABLE_OFFSET(function, index) \
(IS_E1H_OFFSET? (0xb01a + ((function>>1) * 0x28) + ((function&1) \
* 0xa0) + (index * 0x4)) : (0x141a + (function * 0x28) + (index * \
0x4)))
#define TSTORM_DEF_SB_HOST_SB_ADDR_OFFSET(function) \
(IS_E1H_OFFSET? (0xb000 + ((function>>1) * 0x28) + ((function&1) \
* 0xa0)) : (0x1400 + (function * 0x28)))
#define TSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(function) \
(IS_E1H_OFFSET? (0xb008 + ((function>>1) * 0x28) + ((function&1) \
* 0xa0)) : (0x1408 + (function * 0x28)))
#define TSTORM_ETH_STATS_QUERY_ADDR_OFFSET(function) \
(IS_E1H_OFFSET? (0x2b80 + (function * 0x8)) : (0x4b68 + \
(function * 0x8)))
#define TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(function) \
(IS_E1H_OFFSET? (0x3000 + (function * 0x38)) : (0x1500 + \
(function * 0x38)))
#define TSTORM_FUNCTION_MODE_OFFSET \
(IS_E1H_OFFSET? 0x1ad0 : 0xffffffff)
#define TSTORM_HC_BTR_OFFSET(port) \
(IS_E1H_OFFSET? (0xb144 + (port * 0x30)) : (0x1454 + (port * 0x18)))
#define TSTORM_INDIRECTION_TABLE_OFFSET(function) \
(IS_E1H_OFFSET? (0x12c8 + (function * 0x80)) : (0x22c8 + \
(function * 0x80)))
#define TSTORM_INDIRECTION_TABLE_SIZE 0x80
#define TSTORM_MAC_FILTER_CONFIG_OFFSET(function) \
(IS_E1H_OFFSET? (0x3008 + (function * 0x38)) : (0x1508 + \
(function * 0x38)))
#define TSTORM_RX_PRODS_OFFSET(port, client_id) \
(IS_E1H_OFFSET? (0x3350 + (port * 0x3e8) + (client_id * 0x28)) : \
(0x9c0 + (port * 0x2f8) + (client_id * 0x28)))
#define TSTORM_STATS_FLAGS_OFFSET(function) \
(IS_E1H_OFFSET? (0x2c00 + (function * 0x8)) : (0x4b88 + \
(function * 0x8)))
#define TSTORM_TPA_EXIST_OFFSET (IS_E1H_OFFSET? 0x3b30 : 0x1c20)
#define USTORM_AGG_DATA_OFFSET (IS_E1H_OFFSET? 0xa040 : 0x2c10)
#define USTORM_AGG_DATA_SIZE (IS_E1H_OFFSET? 0x2440 : 0x1200)
#define USTORM_ASSERT_LIST_INDEX_OFFSET \
(IS_E1H_OFFSET? 0x8000 : 0x1000)
#define USTORM_ASSERT_LIST_OFFSET(idx) \
(IS_E1H_OFFSET? (0x8020 + (idx * 0x10)) : (0x1020 + (idx * 0x10)))
#define USTORM_CQE_PAGE_BASE_OFFSET(port, clientId) \
(IS_E1H_OFFSET? (0x3298 + (port * 0x258) + (clientId * 0x18)) : \
(0x5450 + (port * 0x1c8) + (clientId * 0x18)))
#define USTORM_DEF_SB_HC_DISABLE_OFFSET(function, index) \
(IS_E1H_OFFSET? (0x951a + ((function>>1) * 0x28) + ((function&1) \
* 0xa0) + (index * 0x4)) : (0x191a + (function * 0x28) + (index * \
0x4)))
#define USTORM_DEF_SB_HOST_SB_ADDR_OFFSET(function) \
(IS_E1H_OFFSET? (0x9500 + ((function>>1) * 0x28) + ((function&1) \
* 0xa0)) : (0x1900 + (function * 0x28)))
#define USTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(function) \
(IS_E1H_OFFSET? (0x9508 + ((function>>1) * 0x28) + ((function&1) \
* 0xa0)) : (0x1908 + (function * 0x28)))
#define USTORM_FUNCTION_MODE_OFFSET \
(IS_E1H_OFFSET? 0x2448 : 0xffffffff)
#define USTORM_HC_BTR_OFFSET(port) \
(IS_E1H_OFFSET? (0x9644 + (port * 0xd0)) : (0x1954 + (port * 0xb8)))
#define USTORM_MAX_AGG_SIZE_OFFSET(port, clientId) \
(IS_E1H_OFFSET? (0x3290 + (port * 0x258) + (clientId * 0x18)) : \
(0x5448 + (port * 0x1c8) + (clientId * 0x18)))
#define USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(function) \
(IS_E1H_OFFSET? (0x2408 + (function * 0x8)) : (0x5408 + \
(function * 0x8)))
#define USTORM_SB_HC_DISABLE_OFFSET(port, cpu_id, index) \
(IS_E1H_OFFSET? (0x901a + (port * 0x280) + (cpu_id * 0x28) + \
(index * 0x4)) : (0x141a + (port * 0x280) + (cpu_id * 0x28) + \
(index * 0x4)))
#define USTORM_SB_HC_TIMEOUT_OFFSET(port, cpu_id, index) \
(IS_E1H_OFFSET? (0x9018 + (port * 0x280) + (cpu_id * 0x28) + \
(index * 0x4)) : (0x1418 + (port * 0x280) + (cpu_id * 0x28) + \
(index * 0x4)))
#define USTORM_SB_HOST_SB_ADDR_OFFSET(port, cpu_id) \
(IS_E1H_OFFSET? (0x9000 + (port * 0x280) + (cpu_id * 0x28)) : \
(0x1400 + (port * 0x280) + (cpu_id * 0x28)))
#define USTORM_SB_HOST_STATUS_BLOCK_OFFSET(port, cpu_id) \
(IS_E1H_OFFSET? (0x9008 + (port * 0x280) + (cpu_id * 0x28)) : \
(0x1408 + (port * 0x280) + (cpu_id * 0x28)))
#define XSTORM_ASSERT_LIST_INDEX_OFFSET \
(IS_E1H_OFFSET? 0x9000 : 0x1000)
#define XSTORM_ASSERT_LIST_OFFSET(idx) \
(IS_E1H_OFFSET? (0x9020 + (idx * 0x10)) : (0x1020 + (idx * 0x10)))
#define XSTORM_CMNG_PER_PORT_VARS_OFFSET(port) \
(IS_E1H_OFFSET? (0x24a8 + (port * 0x40)) : (0x3ba0 + (port * 0x40)))
#define XSTORM_DEF_SB_HC_DISABLE_OFFSET(function, index) \
(IS_E1H_OFFSET? (0xa01a + ((function>>1) * 0x28) + ((function&1) \
* 0xa0) + (index * 0x4)) : (0x141a + (function * 0x28) + (index * \
0x4)))
#define XSTORM_DEF_SB_HOST_SB_ADDR_OFFSET(function) \
(IS_E1H_OFFSET? (0xa000 + ((function>>1) * 0x28) + ((function&1) \
* 0xa0)) : (0x1400 + (function * 0x28)))
#define XSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(function) \
(IS_E1H_OFFSET? (0xa008 + ((function>>1) * 0x28) + ((function&1) \
* 0xa0)) : (0x1408 + (function * 0x28)))
#define XSTORM_E1HOV_OFFSET(function) \
(IS_E1H_OFFSET? (0x2ab8 + (function * 0x2)) : 0xffffffff)
#define XSTORM_ETH_STATS_QUERY_ADDR_OFFSET(function) \
(IS_E1H_OFFSET? (0x2418 + (function * 0x8)) : (0x3b70 + \
(function * 0x8)))
#define XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(function) \
(IS_E1H_OFFSET? (0x2568 + (function * 0x70)) : (0x3c60 + \
(function * 0x70)))
#define XSTORM_FUNCTION_MODE_OFFSET \
(IS_E1H_OFFSET? 0x2ac8 : 0xffffffff)
#define XSTORM_HC_BTR_OFFSET(port) \
(IS_E1H_OFFSET? (0xa144 + (port * 0x30)) : (0x1454 + (port * 0x18)))
#define XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(function) \
(IS_E1H_OFFSET? (0x2528 + (function * 0x70)) : (0x3c20 + \
(function * 0x70)))
#define XSTORM_SPQ_PAGE_BASE_OFFSET(function) \
(IS_E1H_OFFSET? (0x2000 + (function * 0x10)) : (0x3328 + \
(function * 0x10)))
#define XSTORM_SPQ_PROD_OFFSET(function) \
(IS_E1H_OFFSET? (0x2008 + (function * 0x10)) : (0x3330 + \
(function * 0x10)))
#define XSTORM_STATS_FLAGS_OFFSET(function) \
(IS_E1H_OFFSET? (0x23d8 + (function * 0x8)) : (0x3b60 + \
(function * 0x8)))
#define COMMON_ASM_INVALID_ASSERT_OPCODE 0x0
/**
* This file defines HSI constatnts for the ETH flow
*/
#ifdef _EVEREST_MICROCODE
#include "microcode_constants.h"
#include "eth_rx_bd.h"
#include "eth_tx_bd.h"
#include "eth_rx_cqe.h"
#include "eth_rx_sge.h"
#include "eth_rx_cqe_next_page.h"
#endif
/* hash types */
#define DEFAULT_HASH_TYPE 0
#define IPV4_HASH_TYPE 1
#define TCP_IPV4_HASH_TYPE 2
#define IPV6_HASH_TYPE 3
#define TCP_IPV6_HASH_TYPE 4
/* RSS hash types */
#define DEFAULT_HASH_TYPE 0
#define IPV4_HASH_TYPE 1
#define TCP_IPV4_HASH_TYPE 2
#define IPV6_HASH_TYPE 3
#define TCP_IPV6_HASH_TYPE 4
/* Ethernet Ring parmaters */
#define X_ETH_LOCAL_RING_SIZE 13
#define FIRST_BD_IN_PKT 0
#define PARSE_BD_INDEX 1
#define NUM_OF_ETH_BDS_IN_PAGE \
((PAGE_SIZE) / (STRUCT_SIZE(eth_tx_bd)/8))
/* Rx ring params */
#define U_ETH_LOCAL_BD_RING_SIZE (16)
#define U_ETH_LOCAL_SGE_RING_SIZE (12)
#define U_ETH_SGL_SIZE (8)
#define U_ETH_BDS_PER_PAGE_MASK \
((PAGE_SIZE/(STRUCT_SIZE(eth_rx_bd)/8))-1)
#define U_ETH_CQE_PER_PAGE_MASK \
((PAGE_SIZE/(STRUCT_SIZE(eth_rx_cqe)/8))-1)
#define U_ETH_SGES_PER_PAGE_MASK \
((PAGE_SIZE/(STRUCT_SIZE(eth_rx_sge)/8))-1)
#define U_ETH_SGES_PER_PAGE_INVERSE_MASK \
(0xFFFF - ((PAGE_SIZE/((STRUCT_SIZE(eth_rx_sge))/8))-1))
#define TU_ETH_CQES_PER_PAGE \
(PAGE_SIZE/(STRUCT_SIZE(eth_rx_cqe_next_page)/8))
#define U_ETH_BDS_PER_PAGE (PAGE_SIZE/(STRUCT_SIZE(eth_rx_bd)/8))
#define U_ETH_SGES_PER_PAGE (PAGE_SIZE/(STRUCT_SIZE(eth_rx_sge)/8))
#define U_ETH_UNDEFINED_Q 0xFF
/* values of command IDs in the ramrod message */
#define RAMROD_CMD_ID_ETH_PORT_SETUP (80)
#define RAMROD_CMD_ID_ETH_CLIENT_SETUP (85)
#define RAMROD_CMD_ID_ETH_STAT_QUERY (90)
#define RAMROD_CMD_ID_ETH_UPDATE (100)
#define RAMROD_CMD_ID_ETH_HALT (105)
#define RAMROD_CMD_ID_ETH_SET_MAC (110)
#define RAMROD_CMD_ID_ETH_CFC_DEL (115)
#define RAMROD_CMD_ID_ETH_PORT_DEL (120)
#define RAMROD_CMD_ID_ETH_FORWARD_SETUP (125)
#define RAMROD_CMD_ID_ETH_PORT_SETUP (80)
#define RAMROD_CMD_ID_ETH_CLIENT_SETUP (85)
#define RAMROD_CMD_ID_ETH_STAT_QUERY (90)
#define RAMROD_CMD_ID_ETH_UPDATE (100)
#define RAMROD_CMD_ID_ETH_HALT (105)
#define RAMROD_CMD_ID_ETH_SET_MAC (110)
#define RAMROD_CMD_ID_ETH_CFC_DEL (115)
#define RAMROD_CMD_ID_ETH_PORT_DEL (120)
#define RAMROD_CMD_ID_ETH_FORWARD_SETUP (125)
/* command values for set mac command */
#define T_ETH_MAC_COMMAND_SET 0
#define T_ETH_MAC_COMMAND_INVALIDATE 1
#define T_ETH_MAC_COMMAND_SET 0
#define T_ETH_MAC_COMMAND_INVALIDATE 1
#define T_ETH_INDIRECTION_TABLE_SIZE 128
#define T_ETH_INDIRECTION_TABLE_SIZE 128
/*The CRC32 seed, that is used for the hash(reduction) multicast address */
#define T_ETH_CRC32_HASH_SEED 0x00000000
/* Maximal L2 clients supported */
#define ETH_MAX_RX_CLIENTS (18)
#define ETH_MAX_RX_CLIENTS_E1 19
#define ETH_MAX_RX_CLIENTS_E1H 25
/* Maximal aggregation queues supported */
#define ETH_MAX_AGGREGATION_QUEUES_E1 (32)
#define ETH_MAX_AGGREGATION_QUEUES_E1H (64)
/**
* This file defines HSI constatnts common to all microcode flows
*/
/* Connection types */
#define ETH_CONNECTION_TYPE 0
#define ETH_CONNECTION_TYPE 0
#define TOE_CONNECTION_TYPE 1
#define RDMA_CONNECTION_TYPE 2
#define ISCSI_CONNECTION_TYPE 3
#define FCOE_CONNECTION_TYPE 4
#define RESERVED_CONNECTION_TYPE_0 5
#define RESERVED_CONNECTION_TYPE_1 6
#define RESERVED_CONNECTION_TYPE_2 7
#define PROTOCOL_STATE_BIT_OFFSET 6
#define ETH_STATE (ETH_CONNECTION_TYPE << PROTOCOL_STATE_BIT_OFFSET)
#define PROTOCOL_STATE_BIT_OFFSET 6
#define ETH_STATE (ETH_CONNECTION_TYPE << PROTOCOL_STATE_BIT_OFFSET)
#define TOE_STATE (TOE_CONNECTION_TYPE << PROTOCOL_STATE_BIT_OFFSET)
#define RDMA_STATE (RDMA_CONNECTION_TYPE << PROTOCOL_STATE_BIT_OFFSET)
#define ISCSI_STATE \
(ISCSI_CONNECTION_TYPE << PROTOCOL_STATE_BIT_OFFSET)
#define FCOE_STATE (FCOE_CONNECTION_TYPE << PROTOCOL_STATE_BIT_OFFSET)
/* microcode fixed page page size 4K (chains and ring segments) */
#define MC_PAGE_SIZE (4096)
#define MC_PAGE_SIZE (4096)
/* Host coalescing constants */
/* IGU constants */
#define IGU_PORT_BASE 0x0400
#define IGU_ADDR_MSIX 0x0000
#define IGU_ADDR_INT_ACK 0x0200
#define IGU_ADDR_PROD_UPD 0x0201
#define IGU_ADDR_ATTN_BITS_UPD 0x0202
#define IGU_ADDR_ATTN_BITS_SET 0x0203
#define IGU_ADDR_ATTN_BITS_CLR 0x0204
#define IGU_ADDR_COALESCE_NOW 0x0205
#define IGU_ADDR_SIMD_MASK 0x0206
#define IGU_ADDR_SIMD_NOMASK 0x0207
#define IGU_ADDR_MSI_CTL 0x0210
#define IGU_ADDR_MSI_ADDR_LO 0x0211
#define IGU_ADDR_MSI_ADDR_HI 0x0212
#define IGU_ADDR_MSI_DATA 0x0213
#define IGU_INT_ENABLE 0
#define IGU_INT_DISABLE 1
#define IGU_INT_NOP 2
#define IGU_INT_NOP2 3
/* index numbers */
#define HC_USTORM_DEF_SB_NUM_INDICES 4
#define HC_CSTORM_DEF_SB_NUM_INDICES 8
#define HC_XSTORM_DEF_SB_NUM_INDICES 4
#define HC_TSTORM_DEF_SB_NUM_INDICES 4
#define HC_USTORM_SB_NUM_INDICES 4
#define HC_CSTORM_SB_NUM_INDICES 4
#define HC_USTORM_DEF_SB_NUM_INDICES 4
#define HC_CSTORM_DEF_SB_NUM_INDICES 8
#define HC_XSTORM_DEF_SB_NUM_INDICES 4
#define HC_TSTORM_DEF_SB_NUM_INDICES 4
#define HC_USTORM_SB_NUM_INDICES 4
#define HC_CSTORM_SB_NUM_INDICES 4
/* index values - which counterto update */
#define HC_INDEX_U_ETH_RX_CQ_CONS 1
#define HC_INDEX_U_TOE_RX_CQ_CONS 0
#define HC_INDEX_U_ETH_RX_CQ_CONS 1
#define HC_INDEX_U_ETH_RX_BD_CONS 2
#define HC_INDEX_U_FCOE_EQ_CONS 3
#define HC_INDEX_C_ETH_TX_CQ_CONS 1
#define HC_INDEX_C_TOE_TX_CQ_CONS 0
#define HC_INDEX_C_ETH_TX_CQ_CONS 1
#define HC_INDEX_C_ISCSI_EQ_CONS 2
#define HC_INDEX_DEF_X_SPQ_CONS 0
#define HC_INDEX_DEF_X_SPQ_CONS 0
#define HC_INDEX_DEF_C_RDMA_EQ_CONS 0
#define HC_INDEX_DEF_C_RDMA_NAL_PROD 1
#define HC_INDEX_DEF_C_ETH_FW_TX_CQ_CONS 2
#define HC_INDEX_DEF_C_ETH_SLOW_PATH 3
#define HC_INDEX_DEF_C_ETH_RDMA_CQ_CONS 4
#define HC_INDEX_DEF_C_ETH_ISCSI_CQ_CONS 5
#define HC_INDEX_DEF_U_ETH_RDMA_RX_CQ_CONS 0
#define HC_INDEX_DEF_U_ETH_ISCSI_RX_CQ_CONS 1
#define HC_INDEX_DEF_U_ETH_RDMA_RX_BD_CONS 2
#define HC_INDEX_DEF_U_ETH_ISCSI_RX_BD_CONS 3
#define HC_INDEX_DEF_C_ETH_FW_TX_CQ_CONS 2
#define HC_INDEX_DEF_C_ETH_SLOW_PATH 3
/* used by the driver to get the SB offset */
#define USTORM_ID 0
#define CSTORM_ID 1
#define XSTORM_ID 2
#define TSTORM_ID 3
#define ATTENTION_ID 4
#define USTORM_ID 0
#define CSTORM_ID 1
#define XSTORM_ID 2
#define TSTORM_ID 3
#define ATTENTION_ID 4
/* max number of slow path commands per port */
#define MAX_RAMRODS_PER_PORT (8)
#define MAX_RAMRODS_PER_PORT (8)
/* values for RX ETH CQE type field */
#define RX_ETH_CQE_TYPE_ETH_FASTPATH (0)
#define RX_ETH_CQE_TYPE_ETH_RAMROD (1)
#define RX_ETH_CQE_TYPE_ETH_FASTPATH (0)
#define RX_ETH_CQE_TYPE_ETH_RAMROD (1)
/* MAC address list size */
#define T_MAC_ADDRESS_LIST_SIZE (96)
/**** DEFINES FOR TIMERS/CLOCKS RESOLUTIONS ****/
#define EMULATION_FREQUENCY_FACTOR (1600)
#define FPGA_FREQUENCY_FACTOR (100)
#define TIMERS_TICK_SIZE_CHIP (1e-3)
#define TIMERS_TICK_SIZE_EMUL \
((TIMERS_TICK_SIZE_CHIP)/((EMULATION_FREQUENCY_FACTOR)))
#define TIMERS_TICK_SIZE_FPGA \
((TIMERS_TICK_SIZE_CHIP)/((FPGA_FREQUENCY_FACTOR)))
#define TSEMI_CLK1_RESUL_CHIP (1e-3)
#define TSEMI_CLK1_RESUL_EMUL \
((TSEMI_CLK1_RESUL_CHIP)/(EMULATION_FREQUENCY_FACTOR))
#define TSEMI_CLK1_RESUL_FPGA \
((TSEMI_CLK1_RESUL_CHIP)/(FPGA_FREQUENCY_FACTOR))
#define USEMI_CLK1_RESUL_CHIP \
(TIMERS_TICK_SIZE_CHIP)
#define USEMI_CLK1_RESUL_EMUL \
(TIMERS_TICK_SIZE_EMUL)
#define USEMI_CLK1_RESUL_FPGA \
(TIMERS_TICK_SIZE_FPGA)
#define XSEMI_CLK1_RESUL_CHIP (1e-3)
#define XSEMI_CLK1_RESUL_EMUL \
((XSEMI_CLK1_RESUL_CHIP)/(EMULATION_FREQUENCY_FACTOR))
#define XSEMI_CLK1_RESUL_FPGA \
((XSEMI_CLK1_RESUL_CHIP)/(FPGA_FREQUENCY_FACTOR))
#define XSEMI_CLK2_RESUL_CHIP (1e-6)
#define XSEMI_CLK2_RESUL_EMUL \
((XSEMI_CLK2_RESUL_CHIP)/(EMULATION_FREQUENCY_FACTOR))
#define XSEMI_CLK2_RESUL_FPGA \
((XSEMI_CLK2_RESUL_CHIP)/(FPGA_FREQUENCY_FACTOR))
#define SDM_TIMER_TICK_RESUL_CHIP (4*(1e-6))
#define SDM_TIMER_TICK_RESUL_EMUL \
((SDM_TIMER_TICK_RESUL_CHIP)/(EMULATION_FREQUENCY_FACTOR))
#define SDM_TIMER_TICK_RESUL_FPGA \
((SDM_TIMER_TICK_RESUL_CHIP)/(FPGA_FREQUENCY_FACTOR))
/**** END DEFINES FOR TIMERS/CLOCKS RESOLUTIONS ****/
#define XSTORM_IP_ID_ROLL_HALF 0x8000
#define XSTORM_IP_ID_ROLL_ALL 0
#define FW_LOG_LIST_SIZE (50)
#define FW_LOG_LIST_SIZE (50)
#define NUM_OF_PROTOCOLS 4
#define MAX_COS_NUMBER 16
#define MAX_T_STAT_COUNTER_ID 18
#define NUM_OF_PROTOCOLS 4
#define MAX_COS_NUMBER 16
#define MAX_T_STAT_COUNTER_ID 18
#define MAX_X_STAT_COUNTER_ID 18
#define T_FAIR 1
#define FAIR_MEM 2
#define RS_PERIODIC_TIMEOUT_IN_SDM_TICS 25
#define UNKNOWN_ADDRESS 0
#define UNICAST_ADDRESS 1
#define MULTICAST_ADDRESS 2
#define BROADCAST_ADDRESS 3
#define UNKNOWN_ADDRESS 0
#define UNICAST_ADDRESS 1
#define MULTICAST_ADDRESS 2
#define BROADCAST_ADDRESS 3
#define SINGLE_FUNCTION 0
#define MULTI_FUNCTION 1
#define IP_V4 0
#define IP_V6 1

1169
drivers/net/bnx2x_hsi.h
View File

File diff suppressed because it is too large Load Diff

352
drivers/net/bnx2x_init.h
View File

@ -22,7 +22,8 @@
#define INIT_ASIC 0x4
#define INIT_HARDWARE 0x7
#define STORM_INTMEM_SIZE (0x5800 / 4)
#define STORM_INTMEM_SIZE_E1 (0x5800 / 4)
#define STORM_INTMEM_SIZE_E1H (0x10000 / 4)
#define TSTORM_INTMEM_ADDR 0x1a0000
#define CSTORM_INTMEM_ADDR 0x220000
#define XSTORM_INTMEM_ADDR 0x2a0000
@ -30,7 +31,7 @@
/* Init operation types and structures */
/* Common for both E1 and E1H */
#define OP_RD 0x1 /* read single register */
#define OP_WR 0x2 /* write single register */
#define OP_IW 0x3 /* write single register using mailbox */
@ -38,7 +39,37 @@
#define OP_SI 0x5 /* copy a string using mailbox */
#define OP_ZR 0x6 /* clear memory */
#define OP_ZP 0x7 /* unzip then copy with DMAE */
#define OP_WB 0x8 /* copy a string using DMAE */
#define OP_WR_64 0x8 /* write 64 bit pattern */
#define OP_WB 0x9 /* copy a string using DMAE */
/* Operation specific for E1 */
#define OP_RD_E1 0xa /* read single register */
#define OP_WR_E1 0xb /* write single register */
#define OP_IW_E1 0xc /* write single register using mailbox */
#define OP_SW_E1 0xd /* copy a string to the device */
#define OP_SI_E1 0xe /* copy a string using mailbox */
#define OP_ZR_E1 0xf /* clear memory */
#define OP_ZP_E1 0x10 /* unzip then copy with DMAE */
#define OP_WR_64_E1 0x11 /* write 64 bit pattern on E1 */
#define OP_WB_E1 0x12 /* copy a string using DMAE */
/* Operation specific for E1H */
#define OP_RD_E1H 0x13 /* read single register */
#define OP_WR_E1H 0x14 /* write single register */
#define OP_IW_E1H 0x15 /* write single register using mailbox */
#define OP_SW_E1H 0x16 /* copy a string to the device */
#define OP_SI_E1H 0x17 /* copy a string using mailbox */
#define OP_ZR_E1H 0x18 /* clear memory */
#define OP_ZP_E1H 0x19 /* unzip then copy with DMAE */
#define OP_WR_64_E1H 0x1a /* write 64 bit pattern on E1H */
#define OP_WB_E1H 0x1b /* copy a string using DMAE */
/* FPGA and EMUL specific operations */
#define OP_WR_EMUL_E1H 0x1c /* write single register on E1H Emul */
#define OP_WR_EMUL 0x1d /* write single register on Emulation */
#define OP_WR_FPGA 0x1e /* write single register on FPGA */
#define OP_WR_ASIC 0x1f /* write single register on ASIC */
struct raw_op {
u32 op :8;
@ -87,10 +118,6 @@ union init_op {
#include "bnx2x_init_values.h"
static void bnx2x_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val);
static void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr,
u32 dst_addr, u32 len32);
static int bnx2x_gunzip(struct bnx2x *bp, u8 *zbuf, int len);
static void bnx2x_init_str_wr(struct bnx2x *bp, u32 addr, const u32 *data,
@ -107,9 +134,6 @@ static void bnx2x_init_str_wr(struct bnx2x *bp, u32 addr, const u32 *data,
}
}
#define INIT_MEM_WR(reg, data, reg_off, len) \
bnx2x_init_str_wr(bp, reg + reg_off*4, data, len)
static void bnx2x_init_ind_wr(struct bnx2x *bp, u32 addr, const u32 *data,
u16 len)
{
@ -124,11 +148,117 @@ static void bnx2x_init_ind_wr(struct bnx2x *bp, u32 addr, const u32 *data,
}
}
static void bnx2x_write_big_buf(struct bnx2x *bp, u32 addr, u32 len)
{
#ifdef USE_DMAE
int offset = 0;
if (bp->dmae_ready) {
while (len > DMAE_LEN32_WR_MAX) {
bnx2x_write_dmae(bp, bp->gunzip_mapping + offset,
addr + offset, DMAE_LEN32_WR_MAX);
offset += DMAE_LEN32_WR_MAX * 4;
len -= DMAE_LEN32_WR_MAX;
}
bnx2x_write_dmae(bp, bp->gunzip_mapping + offset,
addr + offset, len);
} else
bnx2x_init_str_wr(bp, addr, bp->gunzip_buf, len);
#else
bnx2x_init_str_wr(bp, addr, bp->gunzip_buf, len);
#endif
}
static void bnx2x_init_fill(struct bnx2x *bp, u32 addr, int fill, u32 len)
{
if ((len * 4) > FW_BUF_SIZE) {
BNX2X_ERR("LARGE DMAE OPERATION ! addr 0x%x len 0x%x\n",
addr, len*4);
return;
}
memset(bp->gunzip_buf, fill, len * 4);
bnx2x_write_big_buf(bp, addr, len);
}
static void bnx2x_init_wr_64(struct bnx2x *bp, u32 addr, const u32 *data,
u32 len64)
{
u32 buf_len32 = FW_BUF_SIZE/4;
u32 len = len64*2;
u64 data64 = 0;
int i;
/* 64 bit value is in a blob: first low DWORD, then high DWORD */
data64 = HILO_U64((*(data + 1)), (*data));
len64 = min((u32)(FW_BUF_SIZE/8), len64);
for (i = 0; i < len64; i++) {
u64 *pdata = ((u64 *)(bp->gunzip_buf)) + i;
*pdata = data64;
}
for (i = 0; i < len; i += buf_len32) {
u32 cur_len = min(buf_len32, len - i);
bnx2x_write_big_buf(bp, addr + i * 4, cur_len);
}
}
/*********************************************************
There are different blobs for each PRAM section.
In addition, each blob write operation is divided into a few operations
in order to decrease the amount of phys. contigious buffer needed.
Thus, when we select a blob the address may be with some offset
from the beginning of PRAM section.
The same holds for the INT_TABLE sections.
**********************************************************/
#define IF_IS_INT_TABLE_ADDR(base, addr) \
if (((base) <= (addr)) && ((base) + 0x400 >= (addr)))
#define IF_IS_PRAM_ADDR(base, addr) \
if (((base) <= (addr)) && ((base) + 0x40000 >= (addr)))
static const u32 *bnx2x_sel_blob(u32 addr, const u32 *data, int is_e1)
{
IF_IS_INT_TABLE_ADDR(TSEM_REG_INT_TABLE, addr)
data = is_e1 ? tsem_int_table_data_e1 :
tsem_int_table_data_e1h;
else
IF_IS_INT_TABLE_ADDR(CSEM_REG_INT_TABLE, addr)
data = is_e1 ? csem_int_table_data_e1 :
csem_int_table_data_e1h;
else
IF_IS_INT_TABLE_ADDR(USEM_REG_INT_TABLE, addr)
data = is_e1 ? usem_int_table_data_e1 :
usem_int_table_data_e1h;
else
IF_IS_INT_TABLE_ADDR(XSEM_REG_INT_TABLE, addr)
data = is_e1 ? xsem_int_table_data_e1 :
xsem_int_table_data_e1h;
else
IF_IS_PRAM_ADDR(TSEM_REG_PRAM, addr)
data = is_e1 ? tsem_pram_data_e1 : tsem_pram_data_e1h;
else
IF_IS_PRAM_ADDR(CSEM_REG_PRAM, addr)
data = is_e1 ? csem_pram_data_e1 : csem_pram_data_e1h;
else
IF_IS_PRAM_ADDR(USEM_REG_PRAM, addr)
data = is_e1 ? usem_pram_data_e1 : usem_pram_data_e1h;
else
IF_IS_PRAM_ADDR(XSEM_REG_PRAM, addr)
data = is_e1 ? xsem_pram_data_e1 : xsem_pram_data_e1h;
return data;
}
static void bnx2x_init_wr_wb(struct bnx2x *bp, u32 addr, const u32 *data,
u32 len, int gunzip)
u32 len, int gunzip, int is_e1, u32 blob_off)
{
int offset = 0;
data = bnx2x_sel_blob(addr, data, is_e1) + blob_off;
if (gunzip) {
int rc;
#ifdef __BIG_ENDIAN
@ -143,64 +273,59 @@ static void bnx2x_init_wr_wb(struct bnx2x *bp, u32 addr, const u32 *data,
#endif
rc = bnx2x_gunzip(bp, (u8 *)data, len);
if (rc) {
DP(NETIF_MSG_HW, "gunzip failed ! rc %d\n", rc);
BNX2X_ERR("gunzip failed ! rc %d\n", rc);
return;
}
len = bp->gunzip_outlen;
#ifdef __BIG_ENDIAN
kfree(temp);
for (i = 0; i < len; i++)
((u32 *)bp->gunzip_buf)[i] =
((u32 *)bp->gunzip_buf)[i] =
swab32(((u32 *)bp->gunzip_buf)[i]);
#endif
} else {
if ((len * 4) > FW_BUF_SIZE) {
BNX2X_ERR("LARGE DMAE OPERATION ! len 0x%x\n", len*4);
BNX2X_ERR("LARGE DMAE OPERATION ! "
"addr 0x%x len 0x%x\n", addr, len*4);
return;
}
memcpy(bp->gunzip_buf, data, len * 4);
}
while (len > DMAE_LEN32_MAX) {
if (bp->dmae_ready) {
while (len > DMAE_LEN32_WR_MAX) {
bnx2x_write_dmae(bp, bp->gunzip_mapping + offset,
addr + offset, DMAE_LEN32_WR_MAX);
offset += DMAE_LEN32_WR_MAX * 4;
len -= DMAE_LEN32_WR_MAX;
}
bnx2x_write_dmae(bp, bp->gunzip_mapping + offset,
addr + offset, DMAE_LEN32_MAX);
offset += DMAE_LEN32_MAX * 4;
len -= DMAE_LEN32_MAX;
}
bnx2x_write_dmae(bp, bp->gunzip_mapping + offset, addr + offset, len);
}
#define INIT_MEM_WB(reg, data, reg_off, len) \
bnx2x_init_wr_wb(bp, reg + reg_off*4, data, len, 0)
#define INIT_GUNZIP_DMAE(reg, data, reg_off, len) \
bnx2x_init_wr_wb(bp, reg + reg_off*4, data, len, 1)
static void bnx2x_init_fill(struct bnx2x *bp, u32 addr, int fill, u32 len)
{
int offset = 0;
if ((len * 4) > FW_BUF_SIZE) {
BNX2X_ERR("LARGE DMAE OPERATION ! len 0x%x\n", len * 4);
return;
}
memset(bp->gunzip_buf, fill, len * 4);
while (len > DMAE_LEN32_MAX) {
bnx2x_write_dmae(bp, bp->gunzip_mapping + offset,
addr + offset, DMAE_LEN32_MAX);
offset += DMAE_LEN32_MAX * 4;
len -= DMAE_LEN32_MAX;
}
bnx2x_write_dmae(bp, bp->gunzip_mapping + offset, addr + offset, len);
addr + offset, len);
} else
bnx2x_init_ind_wr(bp, addr, bp->gunzip_buf, len);
}
static void bnx2x_init_block(struct bnx2x *bp, u32 op_start, u32 op_end)
{
int i;
int is_e1 = CHIP_IS_E1(bp);
int is_e1h = CHIP_IS_E1H(bp);
int is_emul_e1h = (CHIP_REV_IS_EMUL(bp) && is_e1h);
int hw_wr, i;
union init_op *op;
u32 op_type, addr, len;
const u32 *data;
const u32 *data, *data_base;
if (CHIP_REV_IS_FPGA(bp))
hw_wr = OP_WR_FPGA;
else if (CHIP_REV_IS_EMUL(bp))
hw_wr = OP_WR_EMUL;
else
hw_wr = OP_WR_ASIC;
if (is_e1)
data_base = init_data_e1;
else /* CHIP_IS_E1H(bp) */
data_base = init_data_e1h;
for (i = op_start; i < op_end; i++) {
@ -209,7 +334,30 @@ static void bnx2x_init_block(struct bnx2x *bp, u32 op_start, u32 op_end)
op_type = op->str_wr.op;
addr = op->str_wr.offset;
len = op->str_wr.data_len;
data = init_data + op->str_wr.data_off;
data = data_base + op->str_wr.data_off;
/* carefull! it must be in order */
if (unlikely(op_type > OP_WB)) {
/* If E1 only */
if (op_type <= OP_WB_E1) {
if (is_e1)
op_type -= (OP_RD_E1 - OP_RD);
/* If E1H only */
} else if (op_type <= OP_WB_E1H) {
if (is_e1h)
op_type -= (OP_RD_E1H - OP_RD);
}
/* HW/EMUL specific */
if (op_type == hw_wr)
op_type = OP_WR;
/* EMUL on E1H is special */
if ((op_type == OP_WR_EMUL_E1H) && is_emul_e1h)
op_type = OP_WR;
}
switch (op_type) {
case OP_RD:
@ -222,7 +370,7 @@ static void bnx2x_init_block(struct bnx2x *bp, u32 op_start, u32 op_end)
bnx2x_init_str_wr(bp, addr, data, len);
break;
case OP_WB:
bnx2x_init_wr_wb(bp, addr, data, len, 0);
bnx2x_init_wr_wb(bp, addr, data, len, 0, is_e1, 0);
break;
case OP_SI:
bnx2x_init_ind_wr(bp, addr, data, len);
@ -231,10 +379,21 @@ static void bnx2x_init_block(struct bnx2x *bp, u32 op_start, u32 op_end)
bnx2x_init_fill(bp, addr, 0, op->zero.len);
break;
case OP_ZP:
bnx2x_init_wr_wb(bp, addr, data, len, 1);
bnx2x_init_wr_wb(bp, addr, data, len, 1, is_e1,
op->str_wr.data_off);
break;
case OP_WR_64:
bnx2x_init_wr_64(bp, addr, data, len);
break;
default:
BNX2X_ERR("BAD init operation!\n");
/* happens whenever an op is of a diff HW */
#if 0
DP(NETIF_MSG_HW, "skipping init operation "
"index %d[%d:%d]: type %d addr 0x%x "
"len %d(0x%x)\n",
i, op_start, op_end, op_type, addr, len, len);
#endif
break;
}
}
}
@ -245,7 +404,7 @@ static void bnx2x_init_block(struct bnx2x *bp, u32 op_start, u32 op_end)
****************************************************************************/
/*
* This code configures the PCI read/write arbiter
* which implements a wighted round robin
* which implements a weighted round robin
* between the virtual queues in the chip.
*
* The values were derived for each PCI max payload and max request size.
@ -315,7 +474,7 @@ static const struct arb_line write_arb_data[NUM_WR_Q][MAX_WR_ORD + 1] = {
{{8 , 64 , 25}, {16 , 64 , 41}, {32 , 64 , 81} }
};
/* register adresses for read queues */
/* register addresses for read queues */
static const struct arb_line read_arb_addr[NUM_RD_Q-1] = {
{PXP2_REG_RQ_BW_RD_L0, PXP2_REG_RQ_BW_RD_ADD0,
PXP2_REG_RQ_BW_RD_UBOUND0},
@ -375,7 +534,7 @@ static const struct arb_line read_arb_addr[NUM_RD_Q-1] = {
PXP2_REG_PSWRQ_BW_UB28}
};
/* register adresses for wrtie queues */
/* register addresses for write queues */
static const struct arb_line write_arb_addr[NUM_WR_Q-1] = {
{PXP2_REG_PSWRQ_BW_L1, PXP2_REG_PSWRQ_BW_ADD1,
PXP2_REG_PSWRQ_BW_UB1},
@ -424,6 +583,10 @@ static void bnx2x_init_pxp(struct bnx2x *bp)
w_order, MAX_WR_ORD);
w_order = MAX_WR_ORD;
}
if (CHIP_REV_IS_FPGA(bp)) {
DP(NETIF_MSG_HW, "write order adjusted to 1 for FPGA\n");
w_order = 0;
}
DP(NETIF_MSG_HW, "read order %d write order %d\n", r_order, w_order);
for (i = 0; i < NUM_RD_Q-1; i++) {
@ -481,7 +644,20 @@ static void bnx2x_init_pxp(struct bnx2x *bp)
REG_WR(bp, PXP2_REG_RQ_PDR_LIMIT, 0xe00);
REG_WR(bp, PXP2_REG_WR_USDMDP_TH, (0x18 << w_order));
REG_WR(bp, PXP2_REG_WR_DMAE_TH, (128 << w_order)/16);
if (CHIP_IS_E1H(bp)) {
REG_WR(bp, PXP2_REG_WR_HC_MPS, w_order+1);
REG_WR(bp, PXP2_REG_WR_USDM_MPS, w_order+1);
REG_WR(bp, PXP2_REG_WR_CSDM_MPS, w_order+1);
REG_WR(bp, PXP2_REG_WR_TSDM_MPS, w_order+1);
REG_WR(bp, PXP2_REG_WR_XSDM_MPS, w_order+1);
REG_WR(bp, PXP2_REG_WR_QM_MPS, w_order+1);
REG_WR(bp, PXP2_REG_WR_TM_MPS, w_order+1);
REG_WR(bp, PXP2_REG_WR_SRC_MPS, w_order+1);
REG_WR(bp, PXP2_REG_WR_DBG_MPS, w_order+1);
REG_WR(bp, PXP2_REG_WR_DMAE_MPS, 2); /* DMAE is special */
REG_WR(bp, PXP2_REG_WR_CDU_MPS, w_order+1);
}
}
@ -564,6 +740,72 @@ static u8 calc_crc8(u32 data, u8 crc)
return crc_res;
}
/* regiesers addresses are not in order
so these arrays help simplify the code */
static const int cm_start[E1H_FUNC_MAX][9] = {
{MISC_FUNC0_START, TCM_FUNC0_START, UCM_FUNC0_START, CCM_FUNC0_START,
XCM_FUNC0_START, TSEM_FUNC0_START, USEM_FUNC0_START, CSEM_FUNC0_START,
XSEM_FUNC0_START},
{MISC_FUNC1_START, TCM_FUNC1_START, UCM_FUNC1_START, CCM_FUNC1_START,
XCM_FUNC1_START, TSEM_FUNC1_START, USEM_FUNC1_START, CSEM_FUNC1_START,
XSEM_FUNC1_START},
{MISC_FUNC2_START, TCM_FUNC2_START, UCM_FUNC2_START, CCM_FUNC2_START,
XCM_FUNC2_START, TSEM_FUNC2_START, USEM_FUNC2_START, CSEM_FUNC2_START,
XSEM_FUNC2_START},
{MISC_FUNC3_START, TCM_FUNC3_START, UCM_FUNC3_START, CCM_FUNC3_START,
XCM_FUNC3_START, TSEM_FUNC3_START, USEM_FUNC3_START, CSEM_FUNC3_START,
XSEM_FUNC3_START},
{MISC_FUNC4_START, TCM_FUNC4_START, UCM_FUNC4_START, CCM_FUNC4_START,
XCM_FUNC4_START, TSEM_FUNC4_START, USEM_FUNC4_START, CSEM_FUNC4_START,
XSEM_FUNC4_START},
{MISC_FUNC5_START, TCM_FUNC5_START, UCM_FUNC5_START, CCM_FUNC5_START,
XCM_FUNC5_START, TSEM_FUNC5_START, USEM_FUNC5_START, CSEM_FUNC5_START,
XSEM_FUNC5_START},
{MISC_FUNC6_START, TCM_FUNC6_START, UCM_FUNC6_START, CCM_FUNC6_START,
XCM_FUNC6_START, TSEM_FUNC6_START, USEM_FUNC6_START, CSEM_FUNC6_START,
XSEM_FUNC6_START},
{MISC_FUNC7_START, TCM_FUNC7_START, UCM_FUNC7_START, CCM_FUNC7_START,
XCM_FUNC7_START, TSEM_FUNC7_START, USEM_FUNC7_START, CSEM_FUNC7_START,
XSEM_FUNC7_START}
};
static const int cm_end[E1H_FUNC_MAX][9] = {
{MISC_FUNC0_END, TCM_FUNC0_END, UCM_FUNC0_END, CCM_FUNC0_END,
XCM_FUNC0_END, TSEM_FUNC0_END, USEM_FUNC0_END, CSEM_FUNC0_END,
XSEM_FUNC0_END},
{MISC_FUNC1_END, TCM_FUNC1_END, UCM_FUNC1_END, CCM_FUNC1_END,
XCM_FUNC1_END, TSEM_FUNC1_END, USEM_FUNC1_END, CSEM_FUNC1_END,
XSEM_FUNC1_END},
{MISC_FUNC2_END, TCM_FUNC2_END, UCM_FUNC2_END, CCM_FUNC2_END,
XCM_FUNC2_END, TSEM_FUNC2_END, USEM_FUNC2_END, CSEM_FUNC2_END,
XSEM_FUNC2_END},
{MISC_FUNC3_END, TCM_FUNC3_END, UCM_FUNC3_END, CCM_FUNC3_END,
XCM_FUNC3_END, TSEM_FUNC3_END, USEM_FUNC3_END, CSEM_FUNC3_END,
XSEM_FUNC3_END},
{MISC_FUNC4_END, TCM_FUNC4_END, UCM_FUNC4_END, CCM_FUNC4_END,
XCM_FUNC4_END, TSEM_FUNC4_END, USEM_FUNC4_END, CSEM_FUNC4_END,
XSEM_FUNC4_END},
{MISC_FUNC5_END, TCM_FUNC5_END, UCM_FUNC5_END, CCM_FUNC5_END,
XCM_FUNC5_END, TSEM_FUNC5_END, USEM_FUNC5_END, CSEM_FUNC5_END,
XSEM_FUNC5_END},
{MISC_FUNC6_END, TCM_FUNC6_END, UCM_FUNC6_END, CCM_FUNC6_END,
XCM_FUNC6_END, TSEM_FUNC6_END, USEM_FUNC6_END, CSEM_FUNC6_END,
XSEM_FUNC6_END},
{MISC_FUNC7_END, TCM_FUNC7_END, UCM_FUNC7_END, CCM_FUNC7_END,
XCM_FUNC7_END, TSEM_FUNC7_END, USEM_FUNC7_END, CSEM_FUNC7_END,
XSEM_FUNC7_END},
};
static const int hc_limits[E1H_FUNC_MAX][2] = {
{HC_FUNC0_START, HC_FUNC0_END},
{HC_FUNC1_START, HC_FUNC1_END},
{HC_FUNC2_START, HC_FUNC2_END},
{HC_FUNC3_START, HC_FUNC3_END},
{HC_FUNC4_START, HC_FUNC4_END},
{HC_FUNC5_START, HC_FUNC5_END},
{HC_FUNC6_START, HC_FUNC6_END},
{HC_FUNC7_START, HC_FUNC7_END}
};
#endif /* BNX2X_INIT_H */

19216
drivers/net/bnx2x_init_values.h
View File

File diff suppressed because it is too large Load Diff

4527
drivers/net/bnx2x_link.c Normal file
View File

File diff suppressed because it is too large Load Diff

168
drivers/net/bnx2x_link.h Normal file
View File

@ -0,0 +1,168 @@
/* Copyright 2008 Broadcom Corporation
*
* Unless you and Broadcom execute a separate written software license
* agreement governing use of this software, this software is licensed to you
* under the terms of the GNU General Public License version 2, available
* at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
*
* Notwithstanding the above, under no circumstances may you combine this
* software in any way with any other Broadcom software provided under a
* license other than the GPL, without Broadcom's express prior written
* consent.
*
* Written by Yaniv Rosner
*
*/
#ifndef BNX2X_LINK_H
#define BNX2X_LINK_H
/***********************************************************/
/* Defines */
/***********************************************************/
#define DEFAULT_PHY_DEV_ADDR 3
#define FLOW_CTRL_AUTO PORT_FEATURE_FLOW_CONTROL_AUTO
#define FLOW_CTRL_TX PORT_FEATURE_FLOW_CONTROL_TX
#define FLOW_CTRL_RX PORT_FEATURE_FLOW_CONTROL_RX
#define FLOW_CTRL_BOTH PORT_FEATURE_FLOW_CONTROL_BOTH
#define FLOW_CTRL_NONE PORT_FEATURE_FLOW_CONTROL_NONE
#define SPEED_AUTO_NEG 0
#define SPEED_12000 12000
#define SPEED_12500 12500
#define SPEED_13000 13000
#define SPEED_15000 15000
#define SPEED_16000 16000
/***********************************************************/
/* Structs */
/***********************************************************/
/* Inputs parameters to the CLC */
struct link_params {
u8 port;
/* Default / User Configuration */
u8 loopback_mode;
#define LOOPBACK_NONE 0
#define LOOPBACK_EMAC 1
#define LOOPBACK_BMAC 2
#define LOOPBACK_XGXS_10 3
#define LOOPBACK_EXT_PHY 4
u16 req_duplex;
u16 req_flow_ctrl;
u16 req_line_speed; /* Also determine AutoNeg */
/* Device parameters */
u8 mac_addr[6];
u16 mtu;
/* shmem parameters */
u32 shmem_base;
u32 speed_cap_mask;
u32 switch_cfg;
#define SWITCH_CFG_1G PORT_FEATURE_CON_SWITCH_1G_SWITCH
#define SWITCH_CFG_10G PORT_FEATURE_CON_SWITCH_10G_SWITCH
#define SWITCH_CFG_AUTO_DETECT PORT_FEATURE_CON_SWITCH_AUTO_DETECT
u16 hw_led_mode; /* part of the hw_config read from the shmem */
u32 serdes_config;
u32 lane_config;
u32 ext_phy_config;
#define XGXS_EXT_PHY_TYPE(ext_phy_config) (ext_phy_config & \
PORT_HW_CFG_XGXS_EXT_PHY_TYPE_MASK)
#define SERDES_EXT_PHY_TYPE(ext_phy_config) (ext_phy_config & \
PORT_HW_CFG_SERDES_EXT_PHY_TYPE_MASK)
/* Phy register parameter */
u32 chip_id;
/* phy_addr populated by the CLC */
u8 phy_addr;
/* Device pointer passed to all callback functions */
struct bnx2x *bp;
};
/* Output parameters */
struct link_vars {
u8 phy_link_up; /* internal phy link indication */
u8 link_up;
u16 duplex;
u16 flow_ctrl;
u32 ieee_fc;
u8 mac_type;
#define MAC_TYPE_NONE 0
#define MAC_TYPE_EMAC 1
#define MAC_TYPE_BMAC 2
u16 line_speed;
u32 autoneg;
#define AUTO_NEG_DISABLED 0x0
#define AUTO_NEG_ENABLED 0x1
#define AUTO_NEG_COMPLETE 0x2
#define AUTO_NEG_PARALLEL_DETECTION_USED 0x3
u8 phy_flags;
/* The same definitions as the shmem parameter */
u32 link_status;
};
/***********************************************************/
/* Functions */
/***********************************************************/
/* Initialize the phy */
u8 bnx2x_phy_init(struct link_params *input, struct link_vars *output);
/* Reset the link. Should be called when driver or interface goes down */
u8 bnx2x_link_reset(struct link_params *params, struct link_vars *vars);
/* bnx2x_link_update should be called upon link interrupt */
u8 bnx2x_link_update(struct link_params *input, struct link_vars *output);
/* use the following cl45 functions to read/write from external_phy
In order to use it to read/write internal phy registers, use
DEFAULT_PHY_DEV_ADDR as devad, and (_bank + (_addr & 0xf)) as
Use ext_phy_type of 0 in case of cl22 over cl45
the register */
u8 bnx2x_cl45_read(struct bnx2x *bp, u8 port, u32 ext_phy_type,
u8 phy_addr, u8 devad, u16 reg, u16 *ret_val);
u8 bnx2x_cl45_write(struct bnx2x *bp, u8 port, u32 ext_phy_type,
u8 phy_addr, u8 devad, u16 reg, u16 val);
/* Reads the link_status from the shmem,
and update the link vars accordinaly */
void bnx2x_link_status_update(struct link_params *input,
struct link_vars *output);
/* returns string representing the fw_version of the external phy */
u8 bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 driver_loaded,
u8 *version, u16 len);
/* Set/Unset the led
Basically, the CLC takes care of the led for the link, but in case one needs
to set/unset the led unnatually, set the "mode" to LED_MODE_OPER to
blink the led, and LED_MODE_OFF to set the led off.*/
u8 bnx2x_set_led(struct bnx2x *bp, u8 port, u8 mode, u32 speed,
u16 hw_led_mode, u32 chip_id);
#define LED_MODE_OFF 0
#define LED_MODE_OPER 2
u8 bnx2x_override_led_value(struct bnx2x *bp, u8 port, u32 led_idx, u32 value);
u8 bnx2x_flash_download(struct bnx2x *bp, u8 port, u32 ext_phy_config,
u8 driver_loaded, char data[], u32 size);
/* Get the actual link status. In case it returns 0, link is up,
otherwise link is down*/
u8 bnx2x_test_link(struct link_params *input, struct link_vars *vars);
#endif /* BNX2X_LINK_H */

10294
drivers/net/bnx2x_main.c Normal file
View File

File diff suppressed because it is too large Load Diff

1969
drivers/net/bnx2x_reg.h
View File

File diff suppressed because it is too large Load Diff

6
drivers/net/bonding/bond_alb.c
View File

@ -419,8 +419,10 @@ static void rlb_teach_disabled_mac_on_primary(struct bonding *bond, u8 addr[])
}
if (!bond->alb_info.primary_is_promisc) {
bond->alb_info.primary_is_promisc = 1;
dev_set_promiscuity(bond->curr_active_slave->dev, 1);
if (!dev_set_promiscuity(bond->curr_active_slave->dev, 1))
bond->alb_info.primary_is_promisc = 1;
else
bond->alb_info.primary_is_promisc = 0;
}
bond->alb_info.rlb_promisc_timeout_counter = 0;

860
drivers/net/bonding/bond_main.c
View File

File diff suppressed because it is too large Load Diff

103
drivers/net/bonding/bond_sysfs.c
View File

@ -50,9 +50,9 @@ extern struct bond_parm_tbl bond_mode_tbl[];
extern struct bond_parm_tbl bond_lacp_tbl[];
extern struct bond_parm_tbl xmit_hashtype_tbl[];
extern struct bond_parm_tbl arp_validate_tbl[];
extern struct bond_parm_tbl fail_over_mac_tbl[];
static int expected_refcount = -1;
static struct class *netdev_class;
/*--------------------------- Data Structures -----------------------------*/
/* Bonding sysfs lock. Why can't we just use the subsystem lock?
@ -111,7 +111,6 @@ static ssize_t bonding_store_bonds(struct class *cls, const char *buffer, size_t
char *ifname;
int rv, res = count;
struct bonding *bond;
struct bonding *nxt;
sscanf(buffer, "%16s", command); /* IFNAMSIZ*/
ifname = command + 1;
@ -122,7 +121,7 @@ static ssize_t bonding_store_bonds(struct class *cls, const char *buffer, size_t
if (command[0] == '+') {
printk(KERN_INFO DRV_NAME
": %s is being created...\n", ifname);
rv = bond_create(ifname, &bonding_defaults, &bond);
rv = bond_create(ifname, &bonding_defaults);
if (rv) {
printk(KERN_INFO DRV_NAME ": Bond creation failed.\n");
res = rv;
@ -134,7 +133,7 @@ static ssize_t bonding_store_bonds(struct class *cls, const char *buffer, size_t
rtnl_lock();
down_write(&bonding_rwsem);
list_for_each_entry_safe(bond, nxt, &bond_dev_list, bond_list)
list_for_each_entry(bond, &bond_dev_list, bond_list)
if (strnicmp(bond->dev->name, ifname, IFNAMSIZ) == 0) {
/* check the ref count on the bond's kobject.
* If it's > expected, then there's a file open,
@ -548,42 +547,37 @@ static ssize_t bonding_show_fail_over_mac(struct device *d, struct device_attrib
{
struct bonding *bond = to_bond(d);
return sprintf(buf, "%d\n", bond->params.fail_over_mac) + 1;
return sprintf(buf, "%s %d\n",
fail_over_mac_tbl[bond->params.fail_over_mac].modename,
bond->params.fail_over_mac);
}
static ssize_t bonding_store_fail_over_mac(struct device *d, struct device_attribute *attr, const char *buf, size_t count)
{
int new_value;
int ret = count;
struct bonding *bond = to_bond(d);
if (bond->slave_cnt != 0) {
printk(KERN_ERR DRV_NAME
": %s: Can't alter fail_over_mac with slaves in bond.\n",
bond->dev->name);
ret = -EPERM;
goto out;
return -EPERM;
}
if (sscanf(buf, "%d", &new_value) != 1) {
new_value = bond_parse_parm(buf, fail_over_mac_tbl);
if (new_value < 0) {
printk(KERN_ERR DRV_NAME
": %s: no fail_over_mac value specified.\n",
bond->dev->name);
ret = -EINVAL;
goto out;
": %s: Ignoring invalid fail_over_mac value %s.\n",
bond->dev->name, buf);
return -EINVAL;
}
if ((new_value == 0) || (new_value == 1)) {
bond->params.fail_over_mac = new_value;
printk(KERN_INFO DRV_NAME ": %s: Setting fail_over_mac to %d.\n",
bond->dev->name, new_value);
} else {
printk(KERN_INFO DRV_NAME
": %s: Ignoring invalid fail_over_mac value %d.\n",
bond->dev->name, new_value);
}
out:
return ret;
bond->params.fail_over_mac = new_value;
printk(KERN_INFO DRV_NAME ": %s: Setting fail_over_mac to %s (%d).\n",
bond->dev->name, fail_over_mac_tbl[new_value].modename,
new_value);
return count;
}
static DEVICE_ATTR(fail_over_mac, S_IRUGO | S_IWUSR, bonding_show_fail_over_mac, bonding_store_fail_over_mac);
@ -951,6 +945,45 @@ out:
}
static DEVICE_ATTR(lacp_rate, S_IRUGO | S_IWUSR, bonding_show_lacp, bonding_store_lacp);
/*
* Show and set the number of grat ARP to send after a failover event.
*/
static ssize_t bonding_show_n_grat_arp(struct device *d,
struct device_attribute *attr,
char *buf)
{
struct bonding *bond = to_bond(d);
return sprintf(buf, "%d\n", bond->params.num_grat_arp);
}
static ssize_t bonding_store_n_grat_arp(struct device *d,
struct device_attribute *attr,
const char *buf, size_t count)
{
int new_value, ret = count;
struct bonding *bond = to_bond(d);
if (sscanf(buf, "%d", &new_value) != 1) {
printk(KERN_ERR DRV_NAME
": %s: no num_grat_arp value specified.\n",
bond->dev->name);
ret = -EINVAL;
goto out;
}
if (new_value < 0 || new_value > 255) {
printk(KERN_ERR DRV_NAME
": %s: Invalid num_grat_arp value %d not in range 0-255; rejected.\n",
bond->dev->name, new_value);
ret = -EINVAL;
goto out;
} else {
bond->params.num_grat_arp = new_value;
}
out:
return ret;
}
static DEVICE_ATTR(num_grat_arp, S_IRUGO | S_IWUSR, bonding_show_n_grat_arp, bonding_store_n_grat_arp);
/*
* Show and set the MII monitor interval. There are two tricky bits
* here. First, if MII monitoring is activated, then we must disable
@ -1388,6 +1421,7 @@ static struct attribute *per_bond_attrs[] = {
&dev_attr_updelay.attr,
&dev_attr_lacp_rate.attr,
&dev_attr_xmit_hash_policy.attr,
&dev_attr_num_grat_arp.attr,
&dev_attr_miimon.attr,
&dev_attr_primary.attr,
&dev_attr_use_carrier.attr,
@ -1412,19 +1446,9 @@ static struct attribute_group bonding_group = {
*/
int bond_create_sysfs(void)
{
int ret = 0;
struct bonding *firstbond;
int ret;
/* get the netdev class pointer */
firstbond = container_of(bond_dev_list.next, struct bonding, bond_list);
if (!firstbond)
return -ENODEV;
netdev_class = firstbond->dev->dev.class;
if (!netdev_class)
return -ENODEV;
ret = class_create_file(netdev_class, &class_attr_bonding_masters);
ret = netdev_class_create_file(&class_attr_bonding_masters);
/*
* Permit multiple loads of the module by ignoring failures to
* create the bonding_masters sysfs file. Bonding devices
@ -1443,10 +1467,6 @@ int bond_create_sysfs(void)
printk(KERN_ERR
"network device named %s already exists in sysfs",
class_attr_bonding_masters.attr.name);
else {
netdev_class = NULL;
return 0;
}
}
return ret;
@ -1458,8 +1478,7 @@ int bond_create_sysfs(void)
*/
void bond_destroy_sysfs(void)
{
if (netdev_class)
class_remove_file(netdev_class, &class_attr_bonding_masters);
netdev_class_remove_file(&class_attr_bonding_masters);
}
/*

17
drivers/net/bonding/bonding.h
View File

@ -22,8 +22,8 @@
#include "bond_3ad.h"
#include "bond_alb.h"
#define DRV_VERSION "3.2.5"
#define DRV_RELDATE "March 21, 2008"
#define DRV_VERSION "3.3.0"
#define DRV_RELDATE "June 10, 2008"
#define DRV_NAME "bonding"
#define DRV_DESCRIPTION "Ethernet Channel Bonding Driver"
@ -125,6 +125,7 @@ struct bond_params {
int mode;
int xmit_policy;
int miimon;
int num_grat_arp;
int arp_interval;
int arp_validate;
int use_carrier;
@ -157,6 +158,7 @@ struct slave {
unsigned long jiffies;
unsigned long last_arp_rx;
s8 link; /* one of BOND_LINK_XXXX */
s8 new_link;
s8 state; /* one of BOND_STATE_XXXX */
u32 original_flags;
u32 original_mtu;
@ -168,6 +170,11 @@ struct slave {
struct tlb_slave_info tlb_info;
};
/*
* Link pseudo-state only used internally by monitors
*/
#define BOND_LINK_NOCHANGE -1
/*
* Here are the locking policies for the two bonding locks:
*
@ -241,6 +248,10 @@ static inline struct bonding *bond_get_bond_by_slave(struct slave *slave)
return (struct bonding *)slave->dev->master->priv;
}
#define BOND_FOM_NONE 0
#define BOND_FOM_ACTIVE 1
#define BOND_FOM_FOLLOW 2
#define BOND_ARP_VALIDATE_NONE 0
#define BOND_ARP_VALIDATE_ACTIVE (1 << BOND_STATE_ACTIVE)
#define BOND_ARP_VALIDATE_BACKUP (1 << BOND_STATE_BACKUP)
@ -301,7 +312,7 @@ static inline void bond_unset_master_alb_flags(struct bonding *bond)
struct vlan_entry *bond_next_vlan(struct bonding *bond, struct vlan_entry *curr);
int bond_dev_queue_xmit(struct bonding *bond, struct sk_buff *skb, struct net_device *slave_dev);
int bond_create(char *name, struct bond_params *params, struct bonding **newbond);
int bond_create(char *name, struct bond_params *params);
void bond_destroy(struct bonding *bond);
int bond_release_and_destroy(struct net_device *bond_dev, struct net_device *slave_dev);
int bond_create_sysfs(void);

2
drivers/net/chelsio/cxgb2.c
View File

@ -1153,9 +1153,7 @@ static int __devinit init_one(struct pci_dev *pdev,
#ifdef CONFIG_NET_POLL_CONTROLLER
netdev->poll_controller = t1_netpoll;
#endif
#ifdef CONFIG_CHELSIO_T1_NAPI
netif_napi_add(netdev, &adapter->napi, t1_poll, 64);
#endif
SET_ETHTOOL_OPS(netdev, &t1_ethtool_ops);
}

70
drivers/net/chelsio/sge.c
View File

@ -1396,20 +1396,10 @@ static void sge_rx(struct sge *sge, struct freelQ *fl, unsigned int len)
if (unlikely(adapter->vlan_grp && p->vlan_valid)) {
st->vlan_xtract++;
#ifdef CONFIG_CHELSIO_T1_NAPI
vlan_hwaccel_receive_skb(skb, adapter->vlan_grp,
ntohs(p->vlan));
#else
vlan_hwaccel_rx(skb, adapter->vlan_grp,
ntohs(p->vlan));
#endif
} else {
#ifdef CONFIG_CHELSIO_T1_NAPI
vlan_hwaccel_receive_skb(skb, adapter->vlan_grp,
ntohs(p->vlan));
} else
netif_receive_skb(skb);
#else
netif_rx(skb);
#endif
}
}
/*
@ -1568,7 +1558,6 @@ static inline int responses_pending(const struct adapter *adapter)
return (e->GenerationBit == Q->genbit);
}
#ifdef CONFIG_CHELSIO_T1_NAPI
/*
* A simpler version of process_responses() that handles only pure (i.e.,
* non data-carrying) responses. Such respones are too light-weight to justify
@ -1636,9 +1625,6 @@ int t1_poll(struct napi_struct *napi, int budget)
return work_done;
}
/*
* NAPI version of the main interrupt handler.
*/
irqreturn_t t1_interrupt(int irq, void *data)
{
struct adapter *adapter = data;
@ -1656,7 +1642,8 @@ irqreturn_t t1_interrupt(int irq, void *data)
else {
/* no data, no NAPI needed */
writel(sge->respQ.cidx, adapter->regs + A_SG_SLEEPING);
napi_enable(&adapter->napi); /* undo schedule_prep */
/* undo schedule_prep */
napi_enable(&adapter->napi);
}
}
return IRQ_HANDLED;
@ -1672,53 +1659,6 @@ irqreturn_t t1_interrupt(int irq, void *data)
return IRQ_RETVAL(handled != 0);
}
#else
/*
* Main interrupt handler, optimized assuming that we took a 'DATA'
* interrupt.
*
* 1. Clear the interrupt
* 2. Loop while we find valid descriptors and process them; accumulate
* information that can be processed after the loop
* 3. Tell the SGE at which index we stopped processing descriptors
* 4. Bookkeeping; free TX buffers, ring doorbell if there are any
* outstanding TX buffers waiting, replenish RX buffers, potentially
* reenable upper layers if they were turned off due to lack of TX
* resources which are available again.
* 5. If we took an interrupt, but no valid respQ descriptors was found we
* let the slow_intr_handler run and do error handling.
*/
irqreturn_t t1_interrupt(int irq, void *cookie)
{
int work_done;
struct adapter *adapter = cookie;
struct respQ *Q = &adapter->sge->respQ;
spin_lock(&adapter->async_lock);
writel(F_PL_INTR_SGE_DATA, adapter->regs + A_PL_CAUSE);
if (likely(responses_pending(adapter)))
work_done = process_responses(adapter, -1);
else
work_done = t1_slow_intr_handler(adapter);
/*
* The unconditional clearing of the PL_CAUSE above may have raced
* with DMA completion and the corresponding generation of a response
* to cause us to miss the resulting data interrupt. The next write
* is also unconditional to recover the missed interrupt and render
* this race harmless.
*/
writel(Q->cidx, adapter->regs + A_SG_SLEEPING);
if (!work_done)
adapter->sge->stats.unhandled_irqs++;
spin_unlock(&adapter->async_lock);
return IRQ_RETVAL(work_done != 0);
}
#endif
/*
* Enqueues the sk_buff onto the cmdQ[qid] and has hardware fetch it.
*

35
drivers/net/cpmac.c
View File

@ -544,7 +544,7 @@ fatal_error:
spin_unlock(&priv->rx_lock);
netif_rx_complete(priv->dev, napi);
netif_stop_queue(priv->dev);
netif_tx_stop_all_queues(priv->dev);
napi_disable(&priv->napi);
atomic_inc(&priv->reset_pending);
@ -569,11 +569,7 @@ static int cpmac_start_xmit(struct sk_buff *skb, struct net_device *dev)
len = max(skb->len, ETH_ZLEN);
queue = skb_get_queue_mapping(skb);
#ifdef CONFIG_NETDEVICES_MULTIQUEUE
netif_stop_subqueue(dev, queue);
#else
netif_stop_queue(dev);
#endif
desc = &priv->desc_ring[queue];
if (unlikely(desc->dataflags & CPMAC_OWN)) {
@ -626,24 +622,14 @@ static void cpmac_end_xmit(struct net_device *dev, int queue)
dev_kfree_skb_irq(desc->skb);
desc->skb = NULL;
#ifdef CONFIG_NETDEVICES_MULTIQUEUE
if (netif_subqueue_stopped(dev, queue))
netif_wake_subqueue(dev, queue);
#else
if (netif_queue_stopped(dev))
netif_wake_queue(dev);
#endif
} else {
if (netif_msg_tx_err(priv) && net_ratelimit())
printk(KERN_WARNING
"%s: end_xmit: spurious interrupt\n", dev->name);
#ifdef CONFIG_NETDEVICES_MULTIQUEUE
if (netif_subqueue_stopped(dev, queue))
netif_wake_subqueue(dev, queue);
#else
if (netif_queue_stopped(dev))
netif_wake_queue(dev);
#endif
}
}
@ -764,9 +750,7 @@ static void cpmac_hw_error(struct work_struct *work)
barrier();
atomic_dec(&priv->reset_pending);
for (i = 0; i < CPMAC_QUEUES; i++)
netif_wake_subqueue(priv->dev, i);
netif_wake_queue(priv->dev);
netif_tx_wake_all_queues(priv->dev);
cpmac_write(priv->regs, CPMAC_MAC_INT_ENABLE, 3);
}
@ -795,7 +779,7 @@ static void cpmac_check_status(struct net_device *dev)
dev->name, tx_code, tx_channel, macstatus);
}
netif_stop_queue(dev);
netif_tx_stop_all_queues(dev);
cpmac_hw_stop(dev);
if (schedule_work(&priv->reset_work))
atomic_inc(&priv->reset_pending);
@ -856,9 +840,7 @@ static void cpmac_tx_timeout(struct net_device *dev)
barrier();
atomic_dec(&priv->reset_pending);
netif_wake_queue(priv->dev);
for (i = 0; i < CPMAC_QUEUES; i++)
netif_wake_subqueue(dev, i);
netif_tx_wake_all_queues(priv->dev);
}
static int cpmac_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
@ -949,7 +931,7 @@ static void cpmac_adjust_link(struct net_device *dev)
spin_lock(&priv->lock);
if (priv->phy->link) {
netif_start_queue(dev);
netif_tx_start_all_queues(dev);
if (priv->phy->duplex != priv->oldduplex) {
new_state = 1;
priv->oldduplex = priv->phy->duplex;
@ -963,10 +945,10 @@ static void cpmac_adjust_link(struct net_device *dev)
if (!priv->oldlink) {
new_state = 1;
priv->oldlink = 1;
netif_schedule(dev);
netif_tx_schedule_all(dev);
}
} else if (priv->oldlink) {
netif_stop_queue(dev);
netif_tx_stop_all_queues(dev);
new_state = 1;
priv->oldlink = 0;
priv->oldspeed = 0;
@ -1086,7 +1068,7 @@ static int cpmac_stop(struct net_device *dev)
struct cpmac_priv *priv = netdev_priv(dev);
struct resource *mem;
netif_stop_queue(dev);
netif_tx_stop_all_queues(dev);
cancel_work_sync(&priv->reset_work);
napi_disable(&priv->napi);
@ -1179,7 +1161,6 @@ static int __devinit cpmac_probe(struct platform_device *pdev)
dev->set_multicast_list = cpmac_set_multicast_list;
dev->tx_timeout = cpmac_tx_timeout;
dev->ethtool_ops = &cpmac_ethtool_ops;
dev->features |= NETIF_F_MULTI_QUEUE;
netif_napi_add(dev, &priv->napi, cpmac_poll, 64);

18
drivers/net/cxgb3/adapter.h
View File

@ -42,6 +42,7 @@
#include <linux/cache.h>
#include <linux/mutex.h>
#include <linux/bitops.h>
#include <linux/inet_lro.h>
#include "t3cdev.h"
#include <asm/io.h>
@ -92,6 +93,7 @@ struct sge_fl { /* SGE per free-buffer list state */
unsigned int gen; /* free list generation */
struct fl_pg_chunk pg_chunk;/* page chunk cache */
unsigned int use_pages; /* whether FL uses pages or sk_buffs */
unsigned int order; /* order of page allocations */
struct rx_desc *desc; /* address of HW Rx descriptor ring */
struct rx_sw_desc *sdesc; /* address of SW Rx descriptor ring */
dma_addr_t phys_addr; /* physical address of HW ring start */
@ -116,12 +118,15 @@ struct sge_rspq { /* state for an SGE response queue */
unsigned int polling; /* is the queue serviced through NAPI? */
unsigned int holdoff_tmr; /* interrupt holdoff timer in 100ns */
unsigned int next_holdoff; /* holdoff time for next interrupt */
unsigned int rx_recycle_buf; /* whether recycling occurred
within current sop-eop */
struct rsp_desc *desc; /* address of HW response ring */
dma_addr_t phys_addr; /* physical address of the ring */
unsigned int cntxt_id; /* SGE context id for the response q */
spinlock_t lock; /* guards response processing */
struct sk_buff *rx_head; /* offload packet receive queue head */
struct sk_buff *rx_tail; /* offload packet receive queue tail */
struct sk_buff *pg_skb; /* used to build frag list in napi handler */
unsigned long offload_pkts;
unsigned long offload_bundles;
@ -169,16 +174,29 @@ enum { /* per port SGE statistics */
SGE_PSTAT_TX_CSUM, /* # of TX checksum offloads */
SGE_PSTAT_VLANEX, /* # of VLAN tag extractions */
SGE_PSTAT_VLANINS, /* # of VLAN tag insertions */
SGE_PSTAT_LRO_AGGR, /* # of page chunks added to LRO sessions */
SGE_PSTAT_LRO_FLUSHED, /* # of flushed LRO sessions */
SGE_PSTAT_LRO_NO_DESC, /* # of overflown LRO sessions */
SGE_PSTAT_MAX /* must be last */
};
#define T3_MAX_LRO_SES 8
#define T3_MAX_LRO_MAX_PKTS 64
struct sge_qset { /* an SGE queue set */
struct adapter *adap;
struct napi_struct napi;
struct sge_rspq rspq;
struct sge_fl fl[SGE_RXQ_PER_SET];
struct sge_txq txq[SGE_TXQ_PER_SET];
struct net_lro_mgr lro_mgr;
struct net_lro_desc lro_desc[T3_MAX_LRO_SES];
struct skb_frag_struct *lro_frag_tbl;
int lro_nfrags;
int lro_enabled;
int lro_frag_len;
void *lro_va;
struct net_device *netdev;
unsigned long txq_stopped; /* which Tx queues are stopped */
struct timer_list tx_reclaim_timer; /* reclaims TX buffers */

1
drivers/net/cxgb3/common.h
View File

@ -351,6 +351,7 @@ struct tp_params {
struct qset_params { /* SGE queue set parameters */
unsigned int polling; /* polling/interrupt service for rspq */
unsigned int lro; /* large receive offload */
unsigned int coalesce_usecs; /* irq coalescing timer */
unsigned int rspq_size; /* # of entries in response queue */
unsigned int fl_size; /* # of entries in regular free list */

5
drivers/net/cxgb3/cxgb3_ctl_defs.h
View File

@ -111,10 +111,7 @@ struct ulp_iscsi_info {
unsigned int llimit;
unsigned int ulimit;
unsigned int tagmask;
unsigned int pgsz3;
unsigned int pgsz2;
unsigned int pgsz1;
unsigned int pgsz0;
u8 pgsz_factor[4];
unsigned int max_rxsz;
unsigned int max_txsz;
struct pci_dev *pdev;

1
drivers/net/cxgb3/cxgb3_ioctl.h
View File

@ -90,6 +90,7 @@ struct ch_qset_params {
int32_t fl_size[2];
int32_t intr_lat;
int32_t polling;
int32_t lro;
int32_t cong_thres;
};

19
drivers/net/cxgb3/cxgb3_main.c
View File

@ -1212,6 +1212,9 @@ static char stats_strings[][ETH_GSTRING_LEN] = {
"VLANinsertions ",
"TxCsumOffload ",
"RxCsumGood ",
"LroAggregated ",
"LroFlushed ",
"LroNoDesc ",
"RxDrops ",
"CheckTXEnToggled ",
@ -1340,6 +1343,9 @@ static void get_stats(struct net_device *dev, struct ethtool_stats *stats,
*data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_VLANINS);
*data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_TX_CSUM);
*data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_RX_CSUM_GOOD);
*data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_LRO_AGGR);
*data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_LRO_FLUSHED);
*data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_LRO_NO_DESC);
*data++ = s->rx_cong_drops;
*data++ = s->num_toggled;
@ -1558,6 +1564,13 @@ static int set_rx_csum(struct net_device *dev, u32 data)
struct port_info *p = netdev_priv(dev);
p->rx_csum_offload = data;
if (!data) {
struct adapter *adap = p->adapter;
int i;
for (i = p->first_qset; i < p->first_qset + p->nqsets; i++)
adap->sge.qs[i].lro_enabled = 0;
}
return 0;
}
@ -1830,6 +1843,11 @@ static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr)
}
}
}
if (t.lro >= 0) {
struct sge_qset *qs = &adapter->sge.qs[t.qset_idx];
q->lro = t.lro;
qs->lro_enabled = t.lro;
}
break;
}
case CHELSIO_GET_QSET_PARAMS:{
@ -1849,6 +1867,7 @@ static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr)
t.fl_size[0] = q->fl_size;
t.fl_size[1] = q->jumbo_size;
t.polling = q->polling;
t.lro = q->lro;
t.intr_lat = q->coalesce_usecs;
t.cong_thres = q->cong_thres;

32
drivers/net/cxgb3/cxgb3_offload.c
View File

@ -207,6 +207,17 @@ static int cxgb_ulp_iscsi_ctl(struct adapter *adapter, unsigned int req,
break;
case ULP_ISCSI_SET_PARAMS:
t3_write_reg(adapter, A_ULPRX_ISCSI_TAGMASK, uiip->tagmask);
/* set MaxRxData and MaxCoalesceSize to 16224 */
t3_write_reg(adapter, A_TP_PARA_REG2, 0x3f603f60);
/* program the ddp page sizes */
{
int i;
unsigned int val = 0;
for (i = 0; i < 4; i++)
val |= (uiip->pgsz_factor[i] & 0xF) << (8 * i);
if (val)
t3_write_reg(adapter, A_ULPRX_ISCSI_PSZ, val);
}
break;
default:
ret = -EOPNOTSUPP;
@ -1255,6 +1266,25 @@ static inline void unregister_tdev(struct t3cdev *tdev)
mutex_unlock(&cxgb3_db_lock);
}
static inline int adap2type(struct adapter *adapter)
{
int type = 0;
switch (adapter->params.rev) {
case T3_REV_A:
type = T3A;
break;
case T3_REV_B:
case T3_REV_B2:
type = T3B;
break;
case T3_REV_C:
type = T3C;
break;
}
return type;
}
void __devinit cxgb3_adapter_ofld(struct adapter *adapter)
{
struct t3cdev *tdev = &adapter->tdev;
@ -1264,7 +1294,7 @@ void __devinit cxgb3_adapter_ofld(struct adapter *adapter)
cxgb3_set_dummy_ops(tdev);
tdev->send = t3_offload_tx;
tdev->ctl = cxgb_offload_ctl;
tdev->type = adapter->params.rev == 0 ? T3A : T3B;
tdev->type = adap2type(adapter);
register_tdev(tdev);
}

2
drivers/net/cxgb3/l2t.c
View File

@ -337,7 +337,7 @@ struct l2t_entry *t3_l2t_get(struct t3cdev *cdev, struct neighbour *neigh,
atomic_set(&e->refcnt, 1);
neigh_replace(e, neigh);
if (neigh->dev->priv_flags & IFF_802_1Q_VLAN)
e->vlan = vlan_dev_info(neigh->dev)->vlan_id;
e->vlan = vlan_dev_vlan_id(neigh->dev);
else
e->vlan = VLAN_NONE;
spin_unlock(&e->lock);

10
drivers/net/cxgb3/regs.h
View File

@ -1517,16 +1517,18 @@
#define A_ULPRX_ISCSI_TAGMASK 0x514
#define S_HPZ0 0
#define M_HPZ0 0xf
#define V_HPZ0(x) ((x) << S_HPZ0)
#define G_HPZ0(x) (((x) >> S_HPZ0) & M_HPZ0)
#define A_ULPRX_ISCSI_PSZ 0x518
#define A_ULPRX_TDDP_LLIMIT 0x51c
#define A_ULPRX_TDDP_ULIMIT 0x520
#define A_ULPRX_TDDP_PSZ 0x528
#define S_HPZ0 0
#define M_HPZ0 0xf
#define V_HPZ0(x) ((x) << S_HPZ0)
#define G_HPZ0(x) (((x) >> S_HPZ0) & M_HPZ0)
#define A_ULPRX_STAG_LLIMIT 0x52c
#define A_ULPRX_STAG_ULIMIT 0x530

391
drivers/net/cxgb3/sge.c
View File

@ -55,6 +55,9 @@
* directly.
*/
#define FL0_PG_CHUNK_SIZE 2048
#define FL0_PG_ORDER 0
#define FL1_PG_CHUNK_SIZE (PAGE_SIZE > 8192 ? 16384 : 8192)
#define FL1_PG_ORDER (PAGE_SIZE > 8192 ? 0 : 1)
#define SGE_RX_DROP_THRES 16
@ -359,7 +362,7 @@ static void free_rx_bufs(struct pci_dev *pdev, struct sge_fl *q)
}
if (q->pg_chunk.page) {
__free_page(q->pg_chunk.page);
__free_pages(q->pg_chunk.page, q->order);
q->pg_chunk.page = NULL;
}
}
@ -376,13 +379,16 @@ static void free_rx_bufs(struct pci_dev *pdev, struct sge_fl *q)
* Add a buffer of the given length to the supplied HW and SW Rx
* descriptors.
*/
static inline void add_one_rx_buf(void *va, unsigned int len,
struct rx_desc *d, struct rx_sw_desc *sd,
unsigned int gen, struct pci_dev *pdev)
static inline int add_one_rx_buf(void *va, unsigned int len,
struct rx_desc *d, struct rx_sw_desc *sd,
unsigned int gen, struct pci_dev *pdev)
{
dma_addr_t mapping;
mapping = pci_map_single(pdev, va, len, PCI_DMA_FROMDEVICE);
if (unlikely(pci_dma_mapping_error(mapping)))
return -ENOMEM;
pci_unmap_addr_set(sd, dma_addr, mapping);
d->addr_lo = cpu_to_be32(mapping);
@ -390,12 +396,14 @@ static inline void add_one_rx_buf(void *va, unsigned int len,
wmb();
d->len_gen = cpu_to_be32(V_FLD_GEN1(gen));
d->gen2 = cpu_to_be32(V_FLD_GEN2(gen));
return 0;
}
static int alloc_pg_chunk(struct sge_fl *q, struct rx_sw_desc *sd, gfp_t gfp)
static int alloc_pg_chunk(struct sge_fl *q, struct rx_sw_desc *sd, gfp_t gfp,
unsigned int order)
{
if (!q->pg_chunk.page) {
q->pg_chunk.page = alloc_page(gfp);
q->pg_chunk.page = alloc_pages(gfp, order);
if (unlikely(!q->pg_chunk.page))
return -ENOMEM;
q->pg_chunk.va = page_address(q->pg_chunk.page);
@ -404,7 +412,7 @@ static int alloc_pg_chunk(struct sge_fl *q, struct rx_sw_desc *sd, gfp_t gfp)
sd->pg_chunk = q->pg_chunk;
q->pg_chunk.offset += q->buf_size;
if (q->pg_chunk.offset == PAGE_SIZE)
if (q->pg_chunk.offset == (PAGE_SIZE << order))
q->pg_chunk.page = NULL;
else {
q->pg_chunk.va += q->buf_size;
@ -424,15 +432,18 @@ static int alloc_pg_chunk(struct sge_fl *q, struct rx_sw_desc *sd, gfp_t gfp)
* allocated with the supplied gfp flags. The caller must assure that
* @n does not exceed the queue's capacity.
*/
static void refill_fl(struct adapter *adap, struct sge_fl *q, int n, gfp_t gfp)
static int refill_fl(struct adapter *adap, struct sge_fl *q, int n, gfp_t gfp)
{
void *buf_start;
struct rx_sw_desc *sd = &q->sdesc[q->pidx];
struct rx_desc *d = &q->desc[q->pidx];
unsigned int count = 0;
while (n--) {
int err;
if (q->use_pages) {
if (unlikely(alloc_pg_chunk(q, sd, gfp))) {
if (unlikely(alloc_pg_chunk(q, sd, gfp, q->order))) {
nomem: q->alloc_failed++;
break;
}
@ -447,8 +458,16 @@ nomem: q->alloc_failed++;
buf_start = skb->data;
}
add_one_rx_buf(buf_start, q->buf_size, d, sd, q->gen,
adap->pdev);
err = add_one_rx_buf(buf_start, q->buf_size, d, sd, q->gen,
adap->pdev);
if (unlikely(err)) {
if (!q->use_pages) {
kfree_skb(sd->skb);
sd->skb = NULL;
}
break;
}
d++;
sd++;
if (++q->pidx == q->size) {
@ -458,14 +477,19 @@ nomem: q->alloc_failed++;
d = q->desc;
}
q->credits++;
count++;
}
wmb();
t3_write_reg(adap, A_SG_KDOORBELL, V_EGRCNTX(q->cntxt_id));
if (likely(count))
t3_write_reg(adap, A_SG_KDOORBELL, V_EGRCNTX(q->cntxt_id));
return count;
}
static inline void __refill_fl(struct adapter *adap, struct sge_fl *fl)
{
refill_fl(adap, fl, min(16U, fl->size - fl->credits), GFP_ATOMIC);
refill_fl(adap, fl, min(16U, fl->size - fl->credits),
GFP_ATOMIC | __GFP_COMP);
}
/**
@ -560,6 +584,8 @@ static void t3_reset_qset(struct sge_qset *q)
memset(q->txq, 0, sizeof(struct sge_txq) * SGE_TXQ_PER_SET);
q->txq_stopped = 0;
memset(&q->tx_reclaim_timer, 0, sizeof(q->tx_reclaim_timer));
kfree(q->lro_frag_tbl);
q->lro_nfrags = q->lro_frag_len = 0;
}
@ -740,19 +766,22 @@ use_orig_buf:
* that are page chunks rather than sk_buffs.
*/
static struct sk_buff *get_packet_pg(struct adapter *adap, struct sge_fl *fl,
unsigned int len, unsigned int drop_thres)
struct sge_rspq *q, unsigned int len,
unsigned int drop_thres)
{
struct sk_buff *skb = NULL;
struct sk_buff *newskb, *skb;
struct rx_sw_desc *sd = &fl->sdesc[fl->cidx];
if (len <= SGE_RX_COPY_THRES) {
skb = alloc_skb(len, GFP_ATOMIC);
if (likely(skb != NULL)) {
__skb_put(skb, len);
newskb = skb = q->pg_skb;
if (!skb && (len <= SGE_RX_COPY_THRES)) {
newskb = alloc_skb(len, GFP_ATOMIC);
if (likely(newskb != NULL)) {
__skb_put(newskb, len);
pci_dma_sync_single_for_cpu(adap->pdev,
pci_unmap_addr(sd, dma_addr), len,
PCI_DMA_FROMDEVICE);
memcpy(skb->data, sd->pg_chunk.va, len);
memcpy(newskb->data, sd->pg_chunk.va, len);
pci_dma_sync_single_for_device(adap->pdev,
pci_unmap_addr(sd, dma_addr), len,
PCI_DMA_FROMDEVICE);
@ -761,14 +790,16 @@ static struct sk_buff *get_packet_pg(struct adapter *adap, struct sge_fl *fl,
recycle:
fl->credits--;
recycle_rx_buf(adap, fl, fl->cidx);
return skb;
q->rx_recycle_buf++;
return newskb;
}
if (unlikely(fl->credits <= drop_thres))
if (unlikely(q->rx_recycle_buf || (!skb && fl->credits <= drop_thres)))
goto recycle;
skb = alloc_skb(SGE_RX_PULL_LEN, GFP_ATOMIC);
if (unlikely(!skb)) {
if (!skb)
newskb = alloc_skb(SGE_RX_PULL_LEN, GFP_ATOMIC);
if (unlikely(!newskb)) {
if (!drop_thres)
return NULL;
goto recycle;
@ -776,21 +807,29 @@ recycle:
pci_unmap_single(adap->pdev, pci_unmap_addr(sd, dma_addr),
fl->buf_size, PCI_DMA_FROMDEVICE);
__skb_put(skb, SGE_RX_PULL_LEN);
memcpy(skb->data, sd->pg_chunk.va, SGE_RX_PULL_LEN);
skb_fill_page_desc(skb, 0, sd->pg_chunk.page,
sd->pg_chunk.offset + SGE_RX_PULL_LEN,
len - SGE_RX_PULL_LEN);
skb->len = len;
skb->data_len = len - SGE_RX_PULL_LEN;
skb->truesize += skb->data_len;
if (!skb) {
__skb_put(newskb, SGE_RX_PULL_LEN);
memcpy(newskb->data, sd->pg_chunk.va, SGE_RX_PULL_LEN);
skb_fill_page_desc(newskb, 0, sd->pg_chunk.page,
sd->pg_chunk.offset + SGE_RX_PULL_LEN,
len - SGE_RX_PULL_LEN);
newskb->len = len;
newskb->data_len = len - SGE_RX_PULL_LEN;
} else {
skb_fill_page_desc(newskb, skb_shinfo(newskb)->nr_frags,
sd->pg_chunk.page,
sd->pg_chunk.offset, len);
newskb->len += len;
newskb->data_len += len;
}
newskb->truesize += newskb->data_len;
fl->credits--;
/*
* We do not refill FLs here, we let the caller do it to overlap a
* prefetch.
*/
return skb;
return newskb;
}
/**
@ -1831,9 +1870,10 @@ static void restart_tx(struct sge_qset *qs)
* if it was immediate data in a response.
*/
static void rx_eth(struct adapter *adap, struct sge_rspq *rq,
struct sk_buff *skb, int pad)
struct sk_buff *skb, int pad, int lro)
{
struct cpl_rx_pkt *p = (struct cpl_rx_pkt *)(skb->data + pad);
struct sge_qset *qs = rspq_to_qset(rq);
struct port_info *pi;
skb_pull(skb, sizeof(*p) + pad);
@ -1850,18 +1890,202 @@ static void rx_eth(struct adapter *adap, struct sge_rspq *rq,
if (unlikely(p->vlan_valid)) {
struct vlan_group *grp = pi->vlan_grp;
rspq_to_qset(rq)->port_stats[SGE_PSTAT_VLANEX]++;
qs->port_stats[SGE_PSTAT_VLANEX]++;
if (likely(grp))
__vlan_hwaccel_rx(skb, grp, ntohs(p->vlan),
rq->polling);
if (lro)
lro_vlan_hwaccel_receive_skb(&qs->lro_mgr, skb,
grp,
ntohs(p->vlan),
p);
else
__vlan_hwaccel_rx(skb, grp, ntohs(p->vlan),
rq->polling);
else
dev_kfree_skb_any(skb);
} else if (rq->polling)
netif_receive_skb(skb);
else
} else if (rq->polling) {
if (lro)
lro_receive_skb(&qs->lro_mgr, skb, p);
else
netif_receive_skb(skb);
} else
netif_rx(skb);
}
static inline int is_eth_tcp(u32 rss)
{
return G_HASHTYPE(ntohl(rss)) == RSS_HASH_4_TUPLE;
}
/**
* lro_frame_ok - check if an ingress packet is eligible for LRO
* @p: the CPL header of the packet
*
* Returns true if a received packet is eligible for LRO.
* The following conditions must be true:
* - packet is TCP/IP Ethernet II (checked elsewhere)
* - not an IP fragment
* - no IP options
* - TCP/IP checksums are correct
* - the packet is for this host
*/
static inline int lro_frame_ok(const struct cpl_rx_pkt *p)
{
const struct ethhdr *eh = (struct ethhdr *)(p + 1);
const struct iphdr *ih = (struct iphdr *)(eh + 1);
return (*((u8 *)p + 1) & 0x90) == 0x10 && p->csum == htons(0xffff) &&
eh->h_proto == htons(ETH_P_IP) && ih->ihl == (sizeof(*ih) >> 2);
}
#define TCP_FLAG_MASK (TCP_FLAG_CWR | TCP_FLAG_ECE | TCP_FLAG_URG |\
TCP_FLAG_ACK | TCP_FLAG_PSH | TCP_FLAG_RST |\
TCP_FLAG_SYN | TCP_FLAG_FIN)
#define TSTAMP_WORD ((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) |\
(TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)
/**
* lro_segment_ok - check if a TCP segment is eligible for LRO
* @tcph: the TCP header of the packet
*
* Returns true if a TCP packet is eligible for LRO. This requires that
* the packet have only the ACK flag set and no TCP options besides
* time stamps.
*/
static inline int lro_segment_ok(const struct tcphdr *tcph)
{
int optlen;
if (unlikely((tcp_flag_word(tcph) & TCP_FLAG_MASK) != TCP_FLAG_ACK))
return 0;
optlen = (tcph->doff << 2) - sizeof(*tcph);
if (optlen) {
const u32 *opt = (const u32 *)(tcph + 1);
if (optlen != TCPOLEN_TSTAMP_ALIGNED ||
*opt != htonl(TSTAMP_WORD) || !opt[2])
return 0;
}
return 1;
}
static int t3_get_lro_header(void **eh, void **iph, void **tcph,
u64 *hdr_flags, void *priv)
{
const struct cpl_rx_pkt *cpl = priv;
if (!lro_frame_ok(cpl))
return -1;
*eh = (struct ethhdr *)(cpl + 1);
*iph = (struct iphdr *)((struct ethhdr *)*eh + 1);
*tcph = (struct tcphdr *)((struct iphdr *)*iph + 1);
if (!lro_segment_ok(*tcph))
return -1;
*hdr_flags = LRO_IPV4 | LRO_TCP;
return 0;
}
static int t3_get_skb_header(struct sk_buff *skb,
void **iph, void **tcph, u64 *hdr_flags,
void *priv)
{
void *eh;
return t3_get_lro_header(&eh, iph, tcph, hdr_flags, priv);
}
static int t3_get_frag_header(struct skb_frag_struct *frag, void **eh,
void **iph, void **tcph, u64 *hdr_flags,
void *priv)
{
return t3_get_lro_header(eh, iph, tcph, hdr_flags, priv);
}
/**
* lro_add_page - add a page chunk to an LRO session
* @adap: the adapter
* @qs: the associated queue set
* @fl: the free list containing the page chunk to add
* @len: packet length
* @complete: Indicates the last fragment of a frame
*
* Add a received packet contained in a page chunk to an existing LRO
* session.
*/
static void lro_add_page(struct adapter *adap, struct sge_qset *qs,
struct sge_fl *fl, int len, int complete)
{
struct rx_sw_desc *sd = &fl->sdesc[fl->cidx];
struct cpl_rx_pkt *cpl;
struct skb_frag_struct *rx_frag = qs->lro_frag_tbl;
int nr_frags = qs->lro_nfrags, frag_len = qs->lro_frag_len;
int offset = 0;
if (!nr_frags) {
offset = 2 + sizeof(struct cpl_rx_pkt);
qs->lro_va = cpl = sd->pg_chunk.va + 2;
}
fl->credits--;
len -= offset;
pci_unmap_single(adap->pdev, pci_unmap_addr(sd, dma_addr),
fl->buf_size, PCI_DMA_FROMDEVICE);
rx_frag += nr_frags;
rx_frag->page = sd->pg_chunk.page;
rx_frag->page_offset = sd->pg_chunk.offset + offset;
rx_frag->size = len;
frag_len += len;
qs->lro_nfrags++;
qs->lro_frag_len = frag_len;
if (!complete)
return;
qs->lro_nfrags = qs->lro_frag_len = 0;
cpl = qs->lro_va;
if (unlikely(cpl->vlan_valid)) {
struct net_device *dev = qs->netdev;
struct port_info *pi = netdev_priv(dev);
struct vlan_group *grp = pi->vlan_grp;
if (likely(grp != NULL)) {
lro_vlan_hwaccel_receive_frags(&qs->lro_mgr,
qs->lro_frag_tbl,
frag_len, frag_len,
grp, ntohs(cpl->vlan),
cpl, 0);
return;
}
}
lro_receive_frags(&qs->lro_mgr, qs->lro_frag_tbl,
frag_len, frag_len, cpl, 0);
}
/**
* init_lro_mgr - initialize a LRO manager object
* @lro_mgr: the LRO manager object
*/
static void init_lro_mgr(struct sge_qset *qs, struct net_lro_mgr *lro_mgr)
{
lro_mgr->dev = qs->netdev;
lro_mgr->features = LRO_F_NAPI;
lro_mgr->ip_summed = CHECKSUM_UNNECESSARY;
lro_mgr->ip_summed_aggr = CHECKSUM_UNNECESSARY;
lro_mgr->max_desc = T3_MAX_LRO_SES;
lro_mgr->lro_arr = qs->lro_desc;
lro_mgr->get_frag_header = t3_get_frag_header;
lro_mgr->get_skb_header = t3_get_skb_header;
lro_mgr->max_aggr = T3_MAX_LRO_MAX_PKTS;
if (lro_mgr->max_aggr > MAX_SKB_FRAGS)
lro_mgr->max_aggr = MAX_SKB_FRAGS;
}
/**
* handle_rsp_cntrl_info - handles control information in a response
* @qs: the queue set corresponding to the response
@ -1947,6 +2171,12 @@ static inline int is_new_response(const struct rsp_desc *r,
return (r->intr_gen & F_RSPD_GEN2) == q->gen;
}
static inline void clear_rspq_bufstate(struct sge_rspq * const q)
{
q->pg_skb = NULL;
q->rx_recycle_buf = 0;
}
#define RSPD_GTS_MASK (F_RSPD_TXQ0_GTS | F_RSPD_TXQ1_GTS)
#define RSPD_CTRL_MASK (RSPD_GTS_MASK | \
V_RSPD_TXQ0_CR(M_RSPD_TXQ0_CR) | \
@ -1984,10 +2214,11 @@ static int process_responses(struct adapter *adap, struct sge_qset *qs,
q->next_holdoff = q->holdoff_tmr;
while (likely(budget_left && is_new_response(r, q))) {
int eth, ethpad = 2;
int packet_complete, eth, ethpad = 2, lro = qs->lro_enabled;
struct sk_buff *skb = NULL;
u32 len, flags = ntohl(r->flags);
__be32 rss_hi = *(const __be32 *)r, rss_lo = r->rss_hdr.rss_hash_val;
__be32 rss_hi = *(const __be32 *)r,
rss_lo = r->rss_hdr.rss_hash_val;
eth = r->rss_hdr.opcode == CPL_RX_PKT;
@ -2015,6 +2246,9 @@ no_mem:
} else if ((len = ntohl(r->len_cq)) != 0) {
struct sge_fl *fl;
if (eth)
lro = qs->lro_enabled && is_eth_tcp(rss_hi);
fl = (len & F_RSPD_FLQ) ? &qs->fl[1] : &qs->fl[0];
if (fl->use_pages) {
void *addr = fl->sdesc[fl->cidx].pg_chunk.va;
@ -2024,9 +2258,18 @@ no_mem:
prefetch(addr + L1_CACHE_BYTES);
#endif
__refill_fl(adap, fl);
if (lro > 0) {
lro_add_page(adap, qs, fl,
G_RSPD_LEN(len),
flags & F_RSPD_EOP);
goto next_fl;
}
skb = get_packet_pg(adap, fl, G_RSPD_LEN(len),
eth ? SGE_RX_DROP_THRES : 0);
skb = get_packet_pg(adap, fl, q,
G_RSPD_LEN(len),
eth ?
SGE_RX_DROP_THRES : 0);
q->pg_skb = skb;
} else
skb = get_packet(adap, fl, G_RSPD_LEN(len),
eth ? SGE_RX_DROP_THRES : 0);
@ -2036,7 +2279,7 @@ no_mem:
q->rx_drops++;
} else if (unlikely(r->rss_hdr.opcode == CPL_TRACE_PKT))
__skb_pull(skb, 2);
next_fl:
if (++fl->cidx == fl->size)
fl->cidx = 0;
} else
@ -2060,9 +2303,13 @@ no_mem:
q->credits = 0;
}
if (likely(skb != NULL)) {
packet_complete = flags &
(F_RSPD_EOP | F_RSPD_IMM_DATA_VALID |
F_RSPD_ASYNC_NOTIF);
if (skb != NULL && packet_complete) {
if (eth)
rx_eth(adap, q, skb, ethpad);
rx_eth(adap, q, skb, ethpad, lro);
else {
q->offload_pkts++;
/* Preserve the RSS info in csum & priority */
@ -2072,11 +2319,19 @@ no_mem:
offload_skbs,
ngathered);
}
if (flags & F_RSPD_EOP)
clear_rspq_bufstate(q);
}
--budget_left;
}
deliver_partial_bundle(&adap->tdev, q, offload_skbs, ngathered);
lro_flush_all(&qs->lro_mgr);
qs->port_stats[SGE_PSTAT_LRO_AGGR] = qs->lro_mgr.stats.aggregated;
qs->port_stats[SGE_PSTAT_LRO_FLUSHED] = qs->lro_mgr.stats.flushed;
qs->port_stats[SGE_PSTAT_LRO_NO_DESC] = qs->lro_mgr.stats.no_desc;
if (sleeping)
check_ring_db(adap, qs, sleeping);
@ -2618,8 +2873,9 @@ int t3_sge_alloc_qset(struct adapter *adapter, unsigned int id, int nports,
int irq_vec_idx, const struct qset_params *p,
int ntxq, struct net_device *dev)
{
int i, ret = -ENOMEM;
int i, avail, ret = -ENOMEM;
struct sge_qset *q = &adapter->sge.qs[id];
struct net_lro_mgr *lro_mgr = &q->lro_mgr;
init_qset_cntxt(q, id);
init_timer(&q->tx_reclaim_timer);
@ -2687,11 +2943,23 @@ int t3_sge_alloc_qset(struct adapter *adapter, unsigned int id, int nports,
#else
q->fl[0].buf_size = SGE_RX_SM_BUF_SIZE + sizeof(struct cpl_rx_data);
#endif
q->fl[0].use_pages = FL0_PG_CHUNK_SIZE > 0;
#if FL1_PG_CHUNK_SIZE > 0
q->fl[1].buf_size = FL1_PG_CHUNK_SIZE;
#else
q->fl[1].buf_size = is_offload(adapter) ?
(16 * 1024) - SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
MAX_FRAME_SIZE + 2 + sizeof(struct cpl_rx_pkt);
#endif
q->fl[0].use_pages = FL0_PG_CHUNK_SIZE > 0;
q->fl[1].use_pages = FL1_PG_CHUNK_SIZE > 0;
q->fl[0].order = FL0_PG_ORDER;
q->fl[1].order = FL1_PG_ORDER;
q->lro_frag_tbl = kcalloc(MAX_FRAME_SIZE / FL1_PG_CHUNK_SIZE + 1,
sizeof(struct skb_frag_struct),
GFP_KERNEL);
q->lro_nfrags = q->lro_frag_len = 0;
spin_lock_irq(&adapter->sge.reg_lock);
/* FL threshold comparison uses < */
@ -2742,8 +3010,23 @@ int t3_sge_alloc_qset(struct adapter *adapter, unsigned int id, int nports,
q->netdev = dev;
t3_update_qset_coalesce(q, p);
refill_fl(adapter, &q->fl[0], q->fl[0].size, GFP_KERNEL);
refill_fl(adapter, &q->fl[1], q->fl[1].size, GFP_KERNEL);
init_lro_mgr(q, lro_mgr);
avail = refill_fl(adapter, &q->fl[0], q->fl[0].size,
GFP_KERNEL | __GFP_COMP);
if (!avail) {
CH_ALERT(adapter, "free list queue 0 initialization failed\n");
goto err;
}
if (avail < q->fl[0].size)
CH_WARN(adapter, "free list queue 0 enabled with %d credits\n",
avail);
avail = refill_fl(adapter, &q->fl[1], q->fl[1].size,
GFP_KERNEL | __GFP_COMP);
if (avail < q->fl[1].size)
CH_WARN(adapter, "free list queue 1 enabled with %d credits\n",
avail);
refill_rspq(adapter, &q->rspq, q->rspq.size - 1);
t3_write_reg(adapter, A_SG_GTS, V_RSPQ(q->rspq.cntxt_id) |
@ -2752,9 +3035,9 @@ int t3_sge_alloc_qset(struct adapter *adapter, unsigned int id, int nports,
mod_timer(&q->tx_reclaim_timer, jiffies + TX_RECLAIM_PERIOD);
return 0;
err_unlock:
err_unlock:
spin_unlock_irq(&adapter->sge.reg_lock);
err:
err:
t3_free_qset(adapter, q);
return ret;
}
@ -2876,7 +3159,7 @@ void t3_sge_prep(struct adapter *adap, struct sge_params *p)
q->coalesce_usecs = 5;
q->rspq_size = 1024;
q->fl_size = 1024;
q->jumbo_size = 512;
q->jumbo_size = 512;
q->txq_size[TXQ_ETH] = 1024;
q->txq_size[TXQ_OFLD] = 1024;
q->txq_size[TXQ_CTRL] = 256;

51
drivers/net/cxgb3/t3_cpl.h
View File

@ -174,6 +174,13 @@ enum { /* TCP congestion control algorithms */
CONG_ALG_HIGHSPEED
};
enum { /* RSS hash type */
RSS_HASH_NONE = 0,
RSS_HASH_2_TUPLE = 1,
RSS_HASH_4_TUPLE = 2,
RSS_HASH_TCPV6 = 3
};
union opcode_tid {
__be32 opcode_tid;
__u8 opcode;
@ -184,6 +191,13 @@ union opcode_tid {
#define G_OPCODE(x) (((x) >> S_OPCODE) & 0xFF)
#define G_TID(x) ((x) & 0xFFFFFF)
#define S_QNUM 0
#define G_QNUM(x) (((x) >> S_QNUM) & 0xFFFF)
#define S_HASHTYPE 22
#define M_HASHTYPE 0x3
#define G_HASHTYPE(x) (((x) >> S_HASHTYPE) & M_HASHTYPE)
/* tid is assumed to be 24-bits */
#define MK_OPCODE_TID(opcode, tid) (V_OPCODE(opcode) | (tid))
@ -768,6 +782,12 @@ struct tx_data_wr {
__be32 param;
};
/* tx_data_wr.flags fields */
#define S_TX_ACK_PAGES 21
#define M_TX_ACK_PAGES 0x7
#define V_TX_ACK_PAGES(x) ((x) << S_TX_ACK_PAGES)
#define G_TX_ACK_PAGES(x) (((x) >> S_TX_ACK_PAGES) & M_TX_ACK_PAGES)
/* tx_data_wr.param fields */
#define S_TX_PORT 0
#define M_TX_PORT 0x7
@ -1441,4 +1461,35 @@ struct cpl_rdma_terminate {
#define M_TERM_TID 0xFFFFF
#define V_TERM_TID(x) ((x) << S_TERM_TID)
#define G_TERM_TID(x) (((x) >> S_TERM_TID) & M_TERM_TID)
/* ULP_TX opcodes */
enum { ULP_MEM_READ = 2, ULP_MEM_WRITE = 3, ULP_TXPKT = 4 };
#define S_ULPTX_CMD 28
#define M_ULPTX_CMD 0xF
#define V_ULPTX_CMD(x) ((x) << S_ULPTX_CMD)
#define S_ULPTX_NFLITS 0
#define M_ULPTX_NFLITS 0xFF
#define V_ULPTX_NFLITS(x) ((x) << S_ULPTX_NFLITS)
struct ulp_mem_io {
WR_HDR;
__be32 cmd_lock_addr;
__be32 len;
};
/* ulp_mem_io.cmd_lock_addr fields */
#define S_ULP_MEMIO_ADDR 0
#define M_ULP_MEMIO_ADDR 0x7FFFFFF
#define V_ULP_MEMIO_ADDR(x) ((x) << S_ULP_MEMIO_ADDR)
#define S_ULP_MEMIO_LOCK 27
#define V_ULP_MEMIO_LOCK(x) ((x) << S_ULP_MEMIO_LOCK)
#define F_ULP_MEMIO_LOCK V_ULP_MEMIO_LOCK(1U)
/* ulp_mem_io.len fields */
#define S_ULP_MEMIO_DATA_LEN 28
#define M_ULP_MEMIO_DATA_LEN 0xF
#define V_ULP_MEMIO_DATA_LEN(x) ((x) << S_ULP_MEMIO_DATA_LEN)
#endif /* T3_CPL_H */

4
drivers/net/cxgb3/t3cdev.h
View File

@ -45,7 +45,8 @@ struct cxgb3_client;
enum t3ctype {
T3A = 0,
T3B
T3B,
T3C,
};
struct t3cdev {
@ -63,6 +64,7 @@ struct t3cdev {
void *l3opt; /* optional layer 3 data */
void *l4opt; /* optional layer 4 data */
void *ulp; /* ulp stuff */
void *ulp_iscsi; /* ulp iscsi */
};
#endif /* _T3CDEV_H_ */

4
drivers/net/declance.c
View File

@ -773,8 +773,6 @@ static irqreturn_t lance_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
struct net_device *last_dev = 0;
static int lance_open(struct net_device *dev)
{
volatile u16 *ib = (volatile u16 *)dev->mem_start;
@ -782,8 +780,6 @@ static int lance_open(struct net_device *dev)
volatile struct lance_regs *ll = lp->ll;
int status = 0;
last_dev = dev;
/* Stop the Lance */
writereg(&ll->rap, LE_CSR0);
writereg(&ll->rdp, LE_C0_STOP);

10
drivers/net/dl2k.c
View File

@ -499,7 +499,7 @@ rio_timer (unsigned long data)
entry = np->old_rx % RX_RING_SIZE;
/* Dropped packets don't need to re-allocate */
if (np->rx_skbuff[entry] == NULL) {
skb = dev_alloc_skb (np->rx_buf_sz);
skb = netdev_alloc_skb (dev, np->rx_buf_sz);
if (skb == NULL) {
np->rx_ring[entry].fraginfo = 0;
printk (KERN_INFO
@ -570,7 +570,7 @@ alloc_list (struct net_device *dev)
/* Allocate the rx buffers */
for (i = 0; i < RX_RING_SIZE; i++) {
/* Allocated fixed size of skbuff */
struct sk_buff *skb = dev_alloc_skb (np->rx_buf_sz);
struct sk_buff *skb = netdev_alloc_skb (dev, np->rx_buf_sz);
np->rx_skbuff[i] = skb;
if (skb == NULL) {
printk (KERN_ERR
@ -867,7 +867,7 @@ receive_packet (struct net_device *dev)
PCI_DMA_FROMDEVICE);
skb_put (skb = np->rx_skbuff[entry], pkt_len);
np->rx_skbuff[entry] = NULL;
} else if ((skb = dev_alloc_skb (pkt_len + 2)) != NULL) {
} else if ((skb = netdev_alloc_skb(dev, pkt_len + 2))) {
pci_dma_sync_single_for_cpu(np->pdev,
desc_to_dma(desc),
np->rx_buf_sz,
@ -904,7 +904,7 @@ receive_packet (struct net_device *dev)
struct sk_buff *skb;
/* Dropped packets don't need to re-allocate */
if (np->rx_skbuff[entry] == NULL) {
skb = dev_alloc_skb (np->rx_buf_sz);
skb = netdev_alloc_skb(dev, np->rx_buf_sz);
if (skb == NULL) {
np->rx_ring[entry].fraginfo = 0;
printk (KERN_INFO
@ -1753,7 +1753,7 @@ rio_close (struct net_device *dev)
/* Stop Tx and Rx logics */
writel (TxDisable | RxDisable | StatsDisable, ioaddr + MACCtrl);
synchronize_irq (dev->irq);
free_irq (dev->irq, dev);
del_timer_sync (&np->timer);

1225
drivers/net/dm9000.c
View File

File diff suppressed because it is too large Load Diff

11
drivers/net/dm9000.h
View File

@ -45,6 +45,9 @@
#define DM9000_CHIPR 0x2C
#define DM9000_SMCR 0x2F
#define CHIPR_DM9000A 0x19
#define CHIPR_DM9000B 0x1B
#define DM9000_MRCMDX 0xF0
#define DM9000_MRCMD 0xF2
#define DM9000_MRRL 0xF4
@ -131,5 +134,13 @@
#define DM9000_PKT_RDY 0x01 /* Packet ready to receive */
#define DM9000_PKT_MAX 1536 /* Received packet max size */
/* DM9000A / DM9000B definitions */
#define IMR_LNKCHNG (1<<5)
#define IMR_UNDERRUN (1<<4)
#define ISR_LNKCHNG (1<<5)
#define ISR_UNDERRUN (1<<4)
#endif /* _DM9000X_H_ */

64
drivers/net/e1000/e1000_main.c
View File

@ -47,12 +47,6 @@ static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation
* Macro expands to...
* {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
*/
#ifdef CONFIG_E1000E_ENABLED
#define PCIE(x)
#else
#define PCIE(x) x,
#endif
static struct pci_device_id e1000_pci_tbl[] = {
INTEL_E1000_ETHERNET_DEVICE(0x1000),
INTEL_E1000_ETHERNET_DEVICE(0x1001),
@ -79,14 +73,6 @@ static struct pci_device_id e1000_pci_tbl[] = {
INTEL_E1000_ETHERNET_DEVICE(0x1026),
INTEL_E1000_ETHERNET_DEVICE(0x1027),
INTEL_E1000_ETHERNET_DEVICE(0x1028),
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x1049))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x104A))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x104B))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x104C))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x104D))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x105E))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x105F))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x1060))
INTEL_E1000_ETHERNET_DEVICE(0x1075),
INTEL_E1000_ETHERNET_DEVICE(0x1076),
INTEL_E1000_ETHERNET_DEVICE(0x1077),
@ -95,28 +81,9 @@ PCIE( INTEL_E1000_ETHERNET_DEVICE(0x1060))
INTEL_E1000_ETHERNET_DEVICE(0x107A),
INTEL_E1000_ETHERNET_DEVICE(0x107B),
INTEL_E1000_ETHERNET_DEVICE(0x107C),
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x107D))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x107E))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x107F))
INTEL_E1000_ETHERNET_DEVICE(0x108A),
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x108B))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x108C))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x1096))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x1098))
INTEL_E1000_ETHERNET_DEVICE(0x1099),
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x109A))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10A4))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10A5))
INTEL_E1000_ETHERNET_DEVICE(0x10B5),
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10B9))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10BA))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10BB))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10BC))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10C4))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10C5))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10D5))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10D9))
PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10DA))
/* required last entry */
{0,}
};
@ -1505,6 +1472,8 @@ e1000_open(struct net_device *netdev)
e1000_irq_enable(adapter);
netif_start_queue(netdev);
/* fire a link status change interrupt to start the watchdog */
E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
@ -2510,10 +2479,15 @@ e1000_set_rx_mode(struct net_device *netdev)
if (netdev->flags & IFF_PROMISC) {
rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
} else if (netdev->flags & IFF_ALLMULTI) {
rctl |= E1000_RCTL_MPE;
rctl &= ~E1000_RCTL_VFE;
} else {
rctl &= ~E1000_RCTL_MPE;
if (netdev->flags & IFF_ALLMULTI) {
rctl |= E1000_RCTL_MPE;
} else {
rctl &= ~E1000_RCTL_MPE;
}
if (adapter->hw.mac_type != e1000_ich8lan)
rctl |= E1000_RCTL_VFE;
}
uc_ptr = NULL;
@ -4310,8 +4284,7 @@ e1000_clean_rx_irq(struct e1000_adapter *adapter,
if (unlikely(adapter->vlgrp &&
(status & E1000_RXD_STAT_VP))) {
vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
le16_to_cpu(rx_desc->special) &
E1000_RXD_SPC_VLAN_MASK);
le16_to_cpu(rx_desc->special));
} else {
netif_receive_skb(skb);
}
@ -4319,8 +4292,7 @@ e1000_clean_rx_irq(struct e1000_adapter *adapter,
if (unlikely(adapter->vlgrp &&
(status & E1000_RXD_STAT_VP))) {
vlan_hwaccel_rx(skb, adapter->vlgrp,
le16_to_cpu(rx_desc->special) &
E1000_RXD_SPC_VLAN_MASK);
le16_to_cpu(rx_desc->special));
} else {
netif_rx(skb);
}
@ -4497,16 +4469,14 @@ copydone:
#ifdef CONFIG_E1000_NAPI
if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
le16_to_cpu(rx_desc->wb.middle.vlan) &
E1000_RXD_SPC_VLAN_MASK);
le16_to_cpu(rx_desc->wb.middle.vlan));
} else {
netif_receive_skb(skb);
}
#else /* CONFIG_E1000_NAPI */
if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
vlan_hwaccel_rx(skb, adapter->vlgrp,
le16_to_cpu(rx_desc->wb.middle.vlan) &
E1000_RXD_SPC_VLAN_MASK);
le16_to_cpu(rx_desc->wb.middle.vlan));
} else {
netif_rx(skb);
}
@ -4999,7 +4969,6 @@ e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
if (adapter->hw.mac_type != e1000_ich8lan) {
/* enable VLAN receive filtering */
rctl = E1000_READ_REG(&adapter->hw, RCTL);
rctl |= E1000_RCTL_VFE;
rctl &= ~E1000_RCTL_CFIEN;
E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
e1000_update_mng_vlan(adapter);
@ -5011,10 +4980,6 @@ e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
if (adapter->hw.mac_type != e1000_ich8lan) {
/* disable VLAN filtering */
rctl = E1000_READ_REG(&adapter->hw, RCTL);
rctl &= ~E1000_RCTL_VFE;
E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
if (adapter->mng_vlan_id !=
(u16)E1000_MNG_VLAN_NONE) {
e1000_vlan_rx_kill_vid(netdev,
@ -5284,7 +5249,6 @@ e1000_netpoll(struct net_device *netdev)
disable_irq(adapter->pdev->irq);
e1000_intr(adapter->pdev->irq, netdev);
e1000_clean_tx_irq(adapter, adapter->tx_ring);
#ifndef CONFIG_E1000_NAPI
adapter->clean_rx(adapter, adapter->rx_ring);
#endif

4
drivers/net/e1000e/e1000.h
View File

@ -283,6 +283,10 @@ struct e1000_adapter {
unsigned long led_status;
unsigned int flags;
/* for ioport free */
int bars;
int need_ioport;
};
struct e1000_info {

84
drivers/net/e1000e/netdev.c
View File

@ -98,8 +98,7 @@ static void e1000_receive_skb(struct e1000_adapter *adapter,
if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
le16_to_cpu(vlan) &
E1000_RXD_SPC_VLAN_MASK);
le16_to_cpu(vlan));
else
netif_receive_skb(skb);
@ -1793,7 +1792,6 @@ static void e1000_vlan_rx_register(struct net_device *netdev,
if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
/* enable VLAN receive filtering */
rctl = er32(RCTL);
rctl |= E1000_RCTL_VFE;
rctl &= ~E1000_RCTL_CFIEN;
ew32(RCTL, rctl);
e1000_update_mng_vlan(adapter);
@ -1805,10 +1803,6 @@ static void e1000_vlan_rx_register(struct net_device *netdev,
ew32(CTRL, ctrl);
if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
/* disable VLAN filtering */
rctl = er32(RCTL);
rctl &= ~E1000_RCTL_VFE;
ew32(RCTL, rctl);
if (adapter->mng_vlan_id !=
(u16)E1000_MNG_VLAN_NONE) {
e1000_vlan_rx_kill_vid(netdev,
@ -2231,11 +2225,16 @@ static void e1000_set_multi(struct net_device *netdev)
if (netdev->flags & IFF_PROMISC) {
rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
} else if (netdev->flags & IFF_ALLMULTI) {
rctl |= E1000_RCTL_MPE;
rctl &= ~E1000_RCTL_UPE;
rctl &= ~E1000_RCTL_VFE;
} else {
rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
if (netdev->flags & IFF_ALLMULTI) {
rctl |= E1000_RCTL_MPE;
rctl &= ~E1000_RCTL_UPE;
} else {
rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
}
if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
rctl |= E1000_RCTL_VFE;
}
ew32(RCTL, rctl);
@ -2514,7 +2513,7 @@ void e1000e_down(struct e1000_adapter *adapter)
ew32(RCTL, rctl & ~E1000_RCTL_EN);
/* flush and sleep below */
netif_stop_queue(netdev);
netif_tx_stop_all_queues(netdev);
/* disable transmits in the hardware */
tctl = er32(TCTL);
@ -2664,6 +2663,8 @@ static int e1000_open(struct net_device *netdev)
e1000_irq_enable(adapter);
netif_tx_start_all_queues(netdev);
/* fire a link status change interrupt to start the watchdog */
ew32(ICS, E1000_ICS_LSC);
@ -3119,7 +3120,7 @@ static void e1000_watchdog_task(struct work_struct *work)
ew32(TCTL, tctl);
netif_carrier_on(netdev);
netif_wake_queue(netdev);
netif_tx_wake_all_queues(netdev);
if (!test_bit(__E1000_DOWN, &adapter->state))
mod_timer(&adapter->phy_info_timer,
@ -3131,7 +3132,7 @@ static void e1000_watchdog_task(struct work_struct *work)
adapter->link_duplex = 0;
ndev_info(netdev, "Link is Down\n");
netif_carrier_off(netdev);
netif_stop_queue(netdev);
netif_tx_stop_all_queues(netdev);
if (!test_bit(__E1000_DOWN, &adapter->state))
mod_timer(&adapter->phy_info_timer,
round_jiffies(jiffies + 2 * HZ));
@ -4003,7 +4004,11 @@ static int e1000_resume(struct pci_dev *pdev)
pci_set_power_state(pdev, PCI_D0);
pci_restore_state(pdev);
e1000e_disable_l1aspm(pdev);
err = pci_enable_device(pdev);
if (adapter->need_ioport)
err = pci_enable_device(pdev);
else
err = pci_enable_device_mem(pdev);
if (err) {
dev_err(&pdev->dev,
"Cannot enable PCI device from suspend\n");
@ -4104,9 +4109,14 @@ static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
struct net_device *netdev = pci_get_drvdata(pdev);
struct e1000_adapter *adapter = netdev_priv(netdev);
struct e1000_hw *hw = &adapter->hw;
int err;
e1000e_disable_l1aspm(pdev);
if (pci_enable_device(pdev)) {
if (adapter->need_ioport)
err = pci_enable_device(pdev);
else
err = pci_enable_device_mem(pdev);
if (err) {
dev_err(&pdev->dev,
"Cannot re-enable PCI device after reset.\n");
return PCI_ERS_RESULT_DISCONNECT;
@ -4184,6 +4194,21 @@ static void e1000_print_device_info(struct e1000_adapter *adapter)
(pba_num >> 8), (pba_num & 0xff));
}
/**
* e1000e_is_need_ioport - determine if an adapter needs ioport resources or not
* @pdev: PCI device information struct
*
* Returns true if an adapters needs ioport resources
**/
static int e1000e_is_need_ioport(struct pci_dev *pdev)
{
switch (pdev->device) {
/* Currently there are no adapters that need ioport resources */
default:
return false;
}
}
/**
* e1000_probe - Device Initialization Routine
* @pdev: PCI device information struct
@ -4209,9 +4234,19 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
int i, err, pci_using_dac;
u16 eeprom_data = 0;
u16 eeprom_apme_mask = E1000_EEPROM_APME;
int bars, need_ioport;
e1000e_disable_l1aspm(pdev);
err = pci_enable_device(pdev);
/* do not allocate ioport bars when not needed */
need_ioport = e1000e_is_need_ioport(pdev);
if (need_ioport) {
bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
err = pci_enable_device(pdev);
} else {
bars = pci_select_bars(pdev, IORESOURCE_MEM);
err = pci_enable_device_mem(pdev);
}
if (err)
return err;
@ -4234,7 +4269,7 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
}
}
err = pci_request_regions(pdev, e1000e_driver_name);
err = pci_request_selected_regions(pdev, bars, e1000e_driver_name);
if (err)
goto err_pci_reg;
@ -4259,6 +4294,8 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
adapter->hw.adapter = adapter;
adapter->hw.mac.type = ei->mac;
adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
adapter->bars = bars;
adapter->need_ioport = need_ioport;
mmio_start = pci_resource_start(pdev, 0);
mmio_len = pci_resource_len(pdev, 0);
@ -4344,6 +4381,11 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
netdev->features |= NETIF_F_TSO;
netdev->features |= NETIF_F_TSO6;
netdev->vlan_features |= NETIF_F_TSO;
netdev->vlan_features |= NETIF_F_TSO6;
netdev->vlan_features |= NETIF_F_HW_CSUM;
netdev->vlan_features |= NETIF_F_SG;
if (pci_using_dac)
netdev->features |= NETIF_F_HIGHDMA;
@ -4464,7 +4506,7 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
/* tell the stack to leave us alone until e1000_open() is called */
netif_carrier_off(netdev);
netif_stop_queue(netdev);
netif_tx_stop_all_queues(netdev);
strcpy(netdev->name, "eth%d");
err = register_netdev(netdev);
@ -4493,7 +4535,7 @@ err_sw_init:
err_ioremap:
free_netdev(netdev);
err_alloc_etherdev:
pci_release_regions(pdev);
pci_release_selected_regions(pdev, bars);
err_pci_reg:
err_dma:
pci_disable_device(pdev);
@ -4541,7 +4583,7 @@ static void __devexit e1000_remove(struct pci_dev *pdev)
iounmap(adapter->hw.hw_addr);
if (adapter->hw.flash_address)
iounmap(adapter->hw.flash_address);
pci_release_regions(pdev);
pci_release_selected_regions(pdev, adapter->bars);
free_netdev(netdev);

43
drivers/net/fealnx.c
View File

@ -90,6 +90,7 @@ static int full_duplex[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
#include <asm/processor.h> /* Processor type for cache alignment. */
#include <asm/io.h>
#include <asm/uaccess.h>
#include <asm/byteorder.h>
/* These identify the driver base version and may not be removed. */
static char version[] =
@ -861,40 +862,20 @@ static int netdev_open(struct net_device *dev)
Wait the specified 50 PCI cycles after a reset by initializing
Tx and Rx queues and the address filter list.
FIXME (Ueimor): optimistic for alpha + posted writes ? */
#if defined(__powerpc__) || defined(__sparc__)
// 89/9/1 modify,
// np->bcrvalue=0x04 | 0x0x38; /* big-endian, 256 burst length */
np->bcrvalue = 0x04 | 0x10; /* big-endian, tx 8 burst length */
np->crvalue = 0xe00; /* rx 128 burst length */
#elif defined(__alpha__) || defined(__x86_64__)
// 89/9/1 modify,
// np->bcrvalue=0x38; /* little-endian, 256 burst length */
np->bcrvalue = 0x10; /* little-endian, 8 burst length */
np->crvalue = 0xe00; /* rx 128 burst length */
#elif defined(__i386__)
#if defined(MODULE)
// 89/9/1 modify,
// np->bcrvalue=0x38; /* little-endian, 256 burst length */
np->bcrvalue = 0x10; /* little-endian, 8 burst length */
np->crvalue = 0xe00; /* rx 128 burst length */
#else
/* When not a module we can work around broken '486 PCI boards. */
#define x86 boot_cpu_data.x86
// 89/9/1 modify,
// np->bcrvalue=(x86 <= 4 ? 0x10 : 0x38);
np->bcrvalue = 0x10;
np->crvalue = (x86 <= 4 ? 0xa00 : 0xe00);
if (x86 <= 4)
printk(KERN_INFO "%s: This is a 386/486 PCI system, setting burst "
"length to %x.\n", dev->name, (x86 <= 4 ? 0x10 : 0x38));
#ifdef __BIG_ENDIAN
np->bcrvalue |= 0x04; /* big-endian */
#endif
#else
// 89/9/1 modify,
// np->bcrvalue=0x38;
np->bcrvalue = 0x10;
np->crvalue = 0xe00; /* rx 128 burst length */
#warning Processor architecture undefined!
#if defined(__i386__) && !defined(MODULE)
if (boot_cpu_data.x86 <= 4)
np->crvalue = 0xa00;
else
#endif
np->crvalue = 0xe00; /* rx 128 burst length */
// 89/12/29 add,
// 90/1/16 modify,
// np->imrvalue=FBE|TUNF|CNTOVF|RBU|TI|RI;

2
drivers/net/fec_mpc52xx.c
View File

@ -197,7 +197,7 @@ static void mpc52xx_fec_adjust_link(struct net_device *dev)
if (priv->link == PHY_DOWN) {
new_state = 1;
priv->link = phydev->link;
netif_schedule(dev);
netif_tx_schedule_all(dev);
netif_carrier_on(dev);
netif_start_queue(dev);
}

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