powerpc/mm/book3s: Update pmd_present to look at _PAGE_PRESENT bit
With this patch we use 0x8000000000000000UL (_PAGE_PRESENT) to indicate a valid pgd/pud/pmd entry. We also switch the p**_present() to look at this bit. With pmd_present, we have a special case. We need to make sure we consider a pmd marked invalid during THP split as present. Right now we clear the _PAGE_PRESENT bit during a pmdp_invalidate. Inorder to consider this special case we add a new pte bit _PAGE_INVALID (mapped to _RPAGE_SW0). This bit is only used with _PAGE_PRESENT cleared. Hence we are not really losing a pte bit for this special case. pmd_present is also updated to look at _PAGE_INVALID. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -18,6 +18,11 @@
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#include <asm/book3s/64/hash-4k.h>
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#endif
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/* Bits to set in a PMD/PUD/PGD entry valid bit*/
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#define HASH_PMD_VAL_BITS (0x8000000000000000UL)
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#define HASH_PUD_VAL_BITS (0x8000000000000000UL)
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#define HASH_PGD_VAL_BITS (0x8000000000000000UL)
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/*
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* Size of EA range mapped by our pagetables.
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*/
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@ -875,8 +875,16 @@ static inline int pmd_none(pmd_t pmd)
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static inline int pmd_present(pmd_t pmd)
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{
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/*
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* A pmd is considerent present if _PAGE_PRESENT is set.
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* We also need to consider the pmd present which is marked
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* invalid during a split. Hence we look for _PAGE_INVALID
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* if we find _PAGE_PRESENT cleared.
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*/
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if (pmd_raw(pmd) & cpu_to_be64(_PAGE_PRESENT | _PAGE_INVALID))
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return true;
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return !pmd_none(pmd);
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return false;
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}
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static inline int pmd_bad(pmd_t pmd)
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@ -903,7 +911,7 @@ static inline int pud_none(pud_t pud)
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static inline int pud_present(pud_t pud)
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{
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return !pud_none(pud);
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return (pud_raw(pud) & cpu_to_be64(_PAGE_PRESENT));
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}
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extern struct page *pud_page(pud_t pud);
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@ -950,7 +958,7 @@ static inline int pgd_none(pgd_t pgd)
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static inline int pgd_present(pgd_t pgd)
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{
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return !pgd_none(pgd);
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return (pgd_raw(pgd) & cpu_to_be64(_PAGE_PRESENT));
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}
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static inline pte_t pgd_pte(pgd_t pgd)
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@ -1001,9 +1001,9 @@ void __init hash__early_init_mmu(void)
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* 4k use hugepd format, so for hash set then to
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* zero
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*/
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__pmd_val_bits = 0;
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__pud_val_bits = 0;
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__pgd_val_bits = 0;
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__pmd_val_bits = HASH_PMD_VAL_BITS;
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__pud_val_bits = HASH_PUD_VAL_BITS;
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__pgd_val_bits = HASH_PGD_VAL_BITS;
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__kernel_virt_start = H_KERN_VIRT_START;
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__kernel_virt_size = H_KERN_VIRT_SIZE;
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@ -69,7 +69,11 @@ void set_pmd_at(struct mm_struct *mm, unsigned long addr,
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pmd_t *pmdp, pmd_t pmd)
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{
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#ifdef CONFIG_DEBUG_VM
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WARN_ON(pte_present(pmd_pte(*pmdp)) && !pte_protnone(pmd_pte(*pmdp)));
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/*
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* Make sure hardware valid bit is not set. We don't do
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* tlb flush for this update.
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*/
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WARN_ON(pte_val(pmd_pte(*pmdp)) & _PAGE_PRESENT);
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assert_spin_locked(pmd_lockptr(mm, pmdp));
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WARN_ON(!(pmd_trans_huge(pmd) || pmd_devmap(pmd)));
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#endif
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@ -106,7 +110,7 @@ pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
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{
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unsigned long old_pmd;
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old_pmd = pmd_hugepage_update(vma->vm_mm, address, pmdp, _PAGE_PRESENT, 0);
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old_pmd = pmd_hugepage_update(vma->vm_mm, address, pmdp, _PAGE_PRESENT, _PAGE_INVALID);
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flush_pmd_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
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/*
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* This ensures that generic code that rely on IRQ disabling
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@ -188,11 +188,10 @@ void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
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pte_t pte)
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{
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/*
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* When handling numa faults, we already have the pte marked
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* _PAGE_PRESENT, but we can be sure that it is not in hpte.
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* Hence we can use set_pte_at for them.
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* Make sure hardware valid bit is not set. We don't do
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* tlb flush for this update.
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*/
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VM_WARN_ON(pte_present(*ptep) && !pte_protnone(*ptep));
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VM_WARN_ON(pte_val(*ptep) & _PAGE_PRESENT);
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/* Add the pte bit when trying to set a pte */
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pte = __pte(pte_val(pte) | _PAGE_PTE);
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