From ce65037fb2a3c4f98f304833bb0ef7037ca494b2 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Tue, 3 Feb 2015 19:17:35 +0100 Subject: [PATCH 01/35] ARM: dts: sun4i: Add USB Dual Role Controller Add a node for the otg/drc usb controller to sun4i-a10.dtsi. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 61c03d1fe530..5ce2e8e3e114 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -611,6 +611,19 @@ #size-cells = <0>; }; + usb_otg: usb@01c13000 { + compatible = "allwinner,sun4i-a10-musb"; + reg = <0x01c13000 0x0400>; + clocks = <&ahb_gates 0>; + interrupts = <38>; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + extcon = <&usbphy 0>; + allwinner,sram = <&otg_sram 1>; + status = "disabled"; + }; + usbphy: phy@01c13400 { #phy-cells = <1>; compatible = "allwinner,sun4i-a10-usb-phy"; From 482f178cc1e4de0768372cbf7fba206fec2179ac Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 16 Feb 2015 19:35:36 +0100 Subject: [PATCH 02/35] ARM: dts: sun5i: Add USB Dual Role Controller Add a node for the otg/drc usb controller to sun5i-a1*.dtsi. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index 54b097830434..550506fed13b 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -416,6 +416,19 @@ #size-cells = <0>; }; + usb_otg: usb@01c13000 { + compatible = "allwinner,sun4i-a10-musb"; + reg = <0x01c13000 0x0400>; + clocks = <&ahb_gates 0>; + interrupts = <38>; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + extcon = <&usbphy 0>; + allwinner,sram = <&otg_sram 1>; + status = "disabled"; + }; + usbphy: phy@01c13400 { #phy-cells = <1>; compatible = "allwinner,sun5i-a13-usb-phy"; From d208eaf23217548e08fe31a797cdb654e0ccc94b Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 1 Jun 2015 13:29:49 +0200 Subject: [PATCH 03/35] ARM: dts: sun6i: Add USB Dual Role Controller Add a node for the otg/drc usb controller to sun6i-a31.dtsi. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun6i-a31.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index 008047a018cf..c9b5bfd7b3b4 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -512,6 +512,19 @@ #size-cells = <0>; }; + usb_otg: usb@01c19000 { + compatible = "allwinner,sun6i-a31-musb"; + reg = <0x01c19000 0x0400>; + clocks = <&ahb1_gates 24>; + resets = <&ahb1_rst 24>; + interrupts = ; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + extcon = <&usbphy 0>; + status = "disabled"; + }; + usbphy: phy@01c19400 { compatible = "allwinner,sun6i-a31-usb-phy"; reg = <0x01c19400 0x10>, From cbb3ff1d9ce35731ea51c9118e94c7ab14025437 Mon Sep 17 00:00:00 2001 From: Roman Byshko Date: Wed, 22 Oct 2014 00:14:03 +0200 Subject: [PATCH 04/35] ARM: dts: sun7i: Add USB Dual Role Controller Add a node for the otg/drc usb controller to sun7i-a20.dtsi Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun7i-a20.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 6a63f30c9a69..067f2b00f5e5 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -699,6 +699,19 @@ #size-cells = <0>; }; + usb_otg: usb@01c13000 { + compatible = "allwinner,sun4i-a10-musb"; + reg = <0x01c13000 0x0400>; + clocks = <&ahb_gates 0>; + interrupts = ; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + extcon = <&usbphy 0>; + allwinner,sram = <&otg_sram 1>; + status = "disabled"; + }; + usbphy: phy@01c13400 { #phy-cells = <1>; compatible = "allwinner,sun7i-a20-usb-phy"; From 5c4f81c1b436ade8dfcec82a47a15310c9456415 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 1 Jun 2015 19:27:34 +0200 Subject: [PATCH 05/35] ARM: dts: sun8i: Add A23 usb-phy and otg nodes Note these are added to the sun8i-a23.dtsi file rather then to the shared sun8i-a23-a33.dtsi file as both the phy and the otg controller on the a33 are slightly different. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a23.dtsi | 33 ++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi index 8698f7aa31c7..2cc27c7a59dc 100644 --- a/arch/arm/boot/dts/sun8i-a23.dtsi +++ b/arch/arm/boot/dts/sun8i-a23.dtsi @@ -58,6 +58,39 @@ clock-output-names = "mbus"; }; }; + + soc@01c00000 { + usb_otg: usb@01c19000 { + compatible = "allwinner,sun6i-a31-musb"; + reg = <0x01c19000 0x0400>; + clocks = <&ahb1_gates 24>; + resets = <&ahb1_rst 24>; + interrupts = ; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + extcon = <&usbphy 0>; + status = "disabled"; + }; + + usbphy: phy@01c19400 { + compatible = "allwinner,sun8i-a23-usb-phy"; + reg = <0x01c19400 0x10>, + <0x01c1a800 0x4>; + reg-names = "phy_ctrl", + "pmu1"; + clocks = <&usb_clk 8>, + <&usb_clk 9>; + clock-names = "usb0_phy", + "usb1_phy"; + resets = <&usb_clk 0>, + <&usb_clk 1>; + reset-names = "usb0_reset", + "usb1_reset"; + status = "disabled"; + #phy-cells = <1>; + }; + }; }; &pio { From 4f8449b1baed5c4f6c577f1f5ef6918886583fc5 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Tue, 2 Jun 2015 15:37:32 +0200 Subject: [PATCH 06/35] ARM: dts: sun8i: Add A33 usb-phy and otg nodes Note these are added to the sun8i-a33.dtsi file rather then to the shared sun8i-a23-a33.dtsi file as both the phy and the otg controller on the a33 are slightly different. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a33.dtsi | 33 ++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi index 85ee08098b7b..faa7d3c1fcea 100644 --- a/arch/arm/boot/dts/sun8i-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a33.dtsi @@ -80,6 +80,39 @@ clock-output-names = "mbus"; }; }; + + soc@01c00000 { + usb_otg: usb@01c19000 { + compatible = "allwinner,sun8i-a33-musb"; + reg = <0x01c19000 0x0400>; + clocks = <&ahb1_gates 24>; + resets = <&ahb1_rst 24>; + interrupts = ; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + extcon = <&usbphy 0>; + status = "disabled"; + }; + + usbphy: phy@01c19400 { + compatible = "allwinner,sun8i-a33-usb-phy"; + reg = <0x01c19400 0x14>, + <0x01c1a800 0x4>; + reg-names = "phy_ctrl", + "pmu1"; + clocks = <&usb_clk 8>, + <&usb_clk 9>; + clock-names = "usb0_phy", + "usb1_phy"; + resets = <&usb_clk 0>, + <&usb_clk 1>; + reset-names = "usb0_reset", + "usb1_reset"; + status = "disabled"; + #phy-cells = <1>; + }; + }; }; &pio { From e385c09c0a64d2f440186be906e92cfb1cabfb7b Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Tue, 2 Jun 2015 20:29:11 +0800 Subject: [PATCH 07/35] ARM: dts: sun8i: Add support for USB controllers on A23/A33 A23/A33 has one pair of EHCI/OHCI USB controllers. There are 2 USB PHYs, one for the USB OTG controller, one for the EHCI/OHCI pair. The latter may also support HSIC, though none of the available boards utilize this, so this is not supported yet. Signed-off-by: Chen-Yu Tsai Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a23-a33.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi index 7abd0ae3143d..b9e4d5650b5d 100644 --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi @@ -332,6 +332,28 @@ #size-cells = <0>; }; + ehci0: usb@01c1a000 { + compatible = "allwinner,sun8i-a23-ehci", "generic-ehci"; + reg = <0x01c1a000 0x100>; + interrupts = ; + clocks = <&ahb1_gates 26>; + resets = <&ahb1_rst 26>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci0: usb@01c1a400 { + compatible = "allwinner,sun8i-a23-ohci", "generic-ohci"; + reg = <0x01c1a400 0x100>; + interrupts = ; + clocks = <&ahb1_gates 29>, <&usb_clk 16>; + resets = <&ahb1_rst 29>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + pio: pinctrl@01c20800 { /* compatible gets set in SoC specific dtsi file */ reg = <0x01c20800 0x400>; From a40d6f243eda177614df1f42cd9ad837c645e7d8 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Thu, 5 Mar 2015 17:08:13 +0100 Subject: [PATCH 08/35] ARM: dts: sun4i: Enable USB DRC on Chuwi V7 CW0825 Enable the otg/drc usb controller on the Chuwi V7 CW0825 tablet. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- .../boot/dts/sun4i-a10-chuwi-v7-cw0825.dts | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts b/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts index 5878a0b11f7b..143056872650 100644 --- a/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts +++ b/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts @@ -114,6 +114,30 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + +&pio { + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { + allwinner,pins = "PH5"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +®_usb0_vbus { + status = "okay"; +}; + ®_usb2_vbus { status = "okay"; }; @@ -124,7 +148,17 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_vbus-supply = <®_usb0_vbus>; usb2_vbus-supply = <®_usb2_vbus>; status = "okay"; }; From c68d23ce258ce5ffaa5ef7bba79ced4e6e1b5421 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Fri, 5 Jun 2015 13:35:28 +0200 Subject: [PATCH 09/35] ARM: dts: sun4i: Enable USB DRC on the Cubieboard Enable the otg/drc usb controller on the Cubieboard. Note that the 5V of the otg is directly connected to the general 5V, so we only use the id pin. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts index 9afb4e018593..046a84d9719d 100644 --- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts +++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts @@ -155,6 +155,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { led_pins_cubieboard: led_pins@0 { allwinner,pins = "PH20", "PH21"; @@ -162,6 +166,13 @@ allwinner,drive = ; allwinner,pull = ; }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; }; ®_ahci_5v { @@ -216,7 +227,15 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; status = "okay"; From 2354570da880df63da11176b5febf15648377a57 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 16 Feb 2015 21:55:47 +0100 Subject: [PATCH 10/35] ARM: dts: sun5i: Enable USB DRC on UTOO P66 Enable the OTG controller on the UTOO P66 tablet. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-a13-utoo-p66.dts | 27 ++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts b/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts index 514f159a14d4..3043aac2c765 100644 --- a/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts +++ b/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts @@ -153,6 +153,10 @@ }; }; +&otg_sram { + status = "okay"; +}; + &pio { mmc0_cd_pin_p66: mmc0_cd_pin@0 { allwinner,pins = "PG0"; @@ -161,6 +165,20 @@ allwinner,pull = ; }; + usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { + allwinner,pins = "PG1"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PG2"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + i2c_lcd_pins: i2c_lcd_pin@0 { allwinner,pins = "PG10", "PG12"; allwinner,function = "gpio_out"; @@ -219,7 +237,16 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */ + usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ usb0_vbus-supply = <®_usb0_vbus>; usb1_vbus-supply = <®_ldo3>; status = "okay"; From 09fa35ea2cb477992fc342daebe6fcbb8b829415 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 1 Jun 2015 16:55:55 +0200 Subject: [PATCH 11/35] ARM: dts: sun6i: Enable USB DRC on the Mele A1000G quad The Mele A1000G-quad has an usb to sata bridge connected to its otg controller, this commit enables support for this. Since the otg is hardwired to the sata bridge it gets enabled in host only mode. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts b/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts index 4404f37d132e..4dd70cce2127 100644 --- a/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts +++ b/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts @@ -143,6 +143,11 @@ status = "okay"; }; +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + &usbphy { usb1_vbus-supply = <®_usb1_vbus>; status = "okay"; From d3c23bac7fde7ad93c6d46ea37b38c8f8ba0f699 Mon Sep 17 00:00:00 2001 From: Roman Byshko Date: Tue, 21 Oct 2014 00:31:04 +0200 Subject: [PATCH 12/35] ARM: dts: sun7i: Enable USB DRC on Cubietruck Enable the otg/drc usb controller on the cubietruck. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 27 ++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts index 4611e2f5a99e..839d79d98395 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts @@ -199,6 +199,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { vmmc3_pin_cubietruck: vmmc3_pin@0 { allwinner,pins = "PH9"; @@ -227,6 +231,20 @@ allwinner,drive = ; allwinner,pull = ; }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH19"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { + allwinner,pins = "PH22"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; }; &pwm { @@ -288,7 +306,16 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpios = <&pio 7 19 GPIO_ACTIVE_HIGH>; /* PH19 */ + usb0_vbus_det-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */ usb0_vbus-supply = <®_usb0_vbus>; usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; From d7a99f6bb625e7d0a256bc6e3d4538669ea22f27 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sat, 7 Mar 2015 17:56:40 +0100 Subject: [PATCH 13/35] ARM: dts: sun7i: Enable USB DRC on A20-OLinuxIno-Lime Enable the otg/drc usb controller on the A20-OLinuxIno-Lime. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- .../arm/boot/dts/sun7i-a20-olinuxino-lime.dts | 32 +++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts index 769726dfb046..04237085dc39 100644 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts @@ -135,6 +135,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 { allwinner,pins = "PC3"; @@ -149,6 +153,20 @@ allwinner,drive = ; allwinner,pull = ; }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { + allwinner,pins = "PH5"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; }; ®_ahci_5v { @@ -157,6 +175,10 @@ status = "okay"; }; +®_usb0_vbus { + status = "okay"; +}; + ®_usb1_vbus { status = "okay"; }; @@ -171,7 +193,17 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_vbus-supply = <®_usb0_vbus>; usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; status = "okay"; From 14b7289828c44343e69cae8194d9e4ce121da1f6 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Tue, 19 May 2015 12:33:58 +0200 Subject: [PATCH 14/35] ARM: dts: sun7i: Enable USB DRC on A20-OLinuxIno-Micro Enable the otg/drc usb controller on the A20-OLinuxIno-Micro. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- .../boot/dts/sun7i-a20-olinuxino-micro.dts | 32 +++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts index 00f8f25eccae..c5d70caade82 100644 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts @@ -215,6 +215,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { mmc3_cd_pin_olinuxinom: mmc3_cd_pin@0 { allwinner,pins = "PH11"; @@ -229,12 +233,30 @@ allwinner,drive = ; allwinner,pull = ; }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { + allwinner,pins = "PH5"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; }; ®_ahci_5v { status = "okay"; }; +®_usb0_vbus { + status = "okay"; +}; + ®_usb1_vbus { status = "okay"; }; @@ -275,7 +297,17 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_vbus-supply = <®_usb0_vbus>; usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; status = "okay"; From a85b59c14d4082abcf27f63994e900dd00b5e572 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 1 Jun 2015 20:08:59 +0200 Subject: [PATCH 15/35] ARM: dts: sun8i: Enable USB DRC on Ippo Q8H-A23 tablets Enable the otg controller on Ippo Q8H tablets, for now it is enabled in host-only mode, because true OTG support requires support for detecting and enabling Vbus through the axp221 pmic. For this to work the Vbus on the port must be enabled by u-boot, or a powered hub must be used. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts index 95134c69cfc1..8d9da6886a4c 100644 --- a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts +++ b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts @@ -125,3 +125,12 @@ pinctrl-0 = <&r_uart_pins_a>; status = "okay"; }; + +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; From 4e2066ed71c0d07421baa60567b1ebfb5894e10c Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Tue, 2 Jun 2015 18:58:34 +0200 Subject: [PATCH 16/35] ARM: dts: sun8i: Enable USB DRC on GA10H-A33 tablets Enable the otg controller on GA10H-A33 tablets, for now it is enabled in host-only mode, because true OTG support requires support for detecting and enabling Vbus through the axp221 pmic. For this to work the Vbus on the port must be enabled by u-boot, or a powered hub must be used. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts b/arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts index 866703355b9c..7520e0673740 100644 --- a/arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts +++ b/arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts @@ -123,3 +123,12 @@ pinctrl-0 = <&r_uart_pins_a>; status = "okay"; }; + +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; From c43fa32143a1e4fba3f988ca116710b652c68077 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Tue, 2 Jun 2015 21:47:58 +0200 Subject: [PATCH 17/35] ARM: dts: sun8i: Enable USB host on GA10H-A33 tablets The GA10H tablets not only have an otg connector, but also a normal usb host connector, enabled support for this. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts b/arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts index 7520e0673740..1aefc6793e25 100644 --- a/arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts +++ b/arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts @@ -61,6 +61,10 @@ }; }; +&ehci0 { + status = "okay"; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>; @@ -109,6 +113,10 @@ status = "okay"; }; +&ohci0 { + status = "okay"; +}; + &pio { mmc0_cd_pin_q8h: mmc0_cd_pin@0 { allwinner,pins = "PB4"; From c077132b2829efecbc6b052fb0f3aa793c054ab8 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Tue, 2 Jun 2015 20:29:12 +0800 Subject: [PATCH 18/35] ARM: dts: sun8i: sina33: Enable USB hosts The Sina33 SDK board exposes the EHCI/OHCI USB host pair. VBUS for this port is always on and non-controllable. Signed-off-by: Chen-Yu Tsai Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts index 5788c29cb56a..1d5390d4e03a 100644 --- a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts +++ b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts @@ -63,6 +63,10 @@ }; }; +&ehci0 { + status = "okay"; +}; + &lradc { vref-supply = <®_vcc3v0>; status = "okay"; @@ -113,6 +117,10 @@ allwinner,pull = ; }; +&ohci0 { + status = "okay"; +}; + &pio { mmc0_cd_pin_sina33: mmc0_cd_pin@0 { allwinner,pins = "PB4"; @@ -127,3 +135,8 @@ pinctrl-0 = <&uart0_pins_b>; status = "okay"; }; + +&usbphy { + status = "okay"; + usb1_vbus-supply = <®_vcc5v0>; /* USB1 VBUS is always on */ +}; From 88651aebd276f272f34f2459d1eb2a86413aaabc Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sat, 30 May 2015 16:55:06 +0200 Subject: [PATCH 19/35] ARM: sun8i: dts: Add Ippo-q8h v1.2 with A33 The Ippo-q8h is a tablet circuit board commonly found in cheap Android tablets. The v1.2 version can be used with either an A23 or A33 SoC. This version features 512 MB DRAM, 4G NAND, MMC, LCD, capacitive touchscreen, accelerometer, 2 camera sensors, USB OTG, microphone and speakers. i2c0 is connected to the gsl1680 capacitive touch panel controller, i2c1 is connected to an mma7660 3-axis accelerometer, these peripherals are not supported by the kernel yet, i2c bus functionality has been tested via i2c-dev. Signed-off-by: Hans de Goede [maxime: Removed the resolution mention, and modified the compatible to have a unique one with the A23 version] Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/sun8i-a33-ippo-q8h-v1.2.dts | 118 ++++++++++++++++++ 2 files changed, 119 insertions(+) create mode 100644 arch/arm/boot/dts/sun8i-a33-ippo-q8h-v1.2.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 246473a244f6..f07a97f39988 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -601,6 +601,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ sun8i-a23-ippo-q8h-v1.2.dtb \ sun8i-a33-et-q8-v1.6.dtb \ sun8i-a33-ga10h-v1.1.dtb \ + sun8i-a33-ippo-q8h-v1.2.dtb \ sun8i-a33-sinlinx-sina33.dtb dtb-$(CONFIG_MACH_SUN9I) += \ sun9i-a80-optimus.dtb \ diff --git a/arch/arm/boot/dts/sun8i-a33-ippo-q8h-v1.2.dts b/arch/arm/boot/dts/sun8i-a33-ippo-q8h-v1.2.dts new file mode 100644 index 000000000000..8bb75ee736a9 --- /dev/null +++ b/arch/arm/boot/dts/sun8i-a33-ippo-q8h-v1.2.dts @@ -0,0 +1,118 @@ +/* + * Copyright 2015 Hans de Goede + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun8i-a33.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include +#include +#include + +/ { + model = "Ippo Q8H Quad Core Tablet (v1.2)"; + compatible = "ippo,a33-q8h-v1.2", "allwinner,sun8i-a33"; + + aliases { + serial0 = &r_uart; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; +}; + +&lradc { + vref-supply = <®_vcc3v0>; + status = "okay"; + + button@200 { + label = "Volume Up"; + linux,code = ; + channel = <0>; + voltage = <200000>; + }; + + button@400 { + label = "Volume Down"; + linux,code = ; + channel = <0>; + voltage = <400000>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_q8h>; + vmmc-supply = <®_vcc3v0>; + bus-width = <4>; + cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ + cd-inverted; + status = "okay"; +}; + +&pio { + mmc0_cd_pin_q8h: mmc0_cd_pin@0 { + allwinner,pins = "PB4"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +&r_uart { + pinctrl-names = "default"; + pinctrl-0 = <&r_uart_pins_a>; + status = "okay"; +}; From 0760bacef728f6c980278188a5aac7f0fbe8bed8 Mon Sep 17 00:00:00 2001 From: Karsten Merker Date: Tue, 23 Jun 2015 19:02:29 +0200 Subject: [PATCH 20/35] devicetree: Add msi to the vendor-prefix list Document the the "msi" (Micro-Star International Co. Ltd.) vendor prefix which is used in sun6i-a31s-primo81.dts. Signed-off-by: Karsten Merker Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index d444757c4d9e..c80e1173bbee 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -135,6 +135,7 @@ mitsubishi Mitsubishi Electric Corporation mosaixtech Mosaix Technologies, Inc. moxa Moxa mpl MPL AG +msi Micro-Star International Co. Ltd. mti Imagination Technologies Ltd. (formerly MIPS Technologies Inc.) mundoreader Mundo Reader S.L. murata Murata Manufacturing Co., Ltd. From b5977f389d9ec7b5ffdc37ca6f2266e05295a552 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sat, 20 Jun 2015 17:40:07 +0200 Subject: [PATCH 21/35] ARM: dts: sunxi: Add regulator-boot-on to usb host port regulator nodes u-boot will have turned on the power to the usb host ports, so mark them as regulator-boot-on, this stops the power on the ports from temporarily getting turned off during boot, causing issues with e.g. usb powered harddisks. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sunxi-common-regulators.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/sunxi-common-regulators.dtsi b/arch/arm/boot/dts/sunxi-common-regulators.dtsi index 51cc8383f70f..f1953b0c5059 100644 --- a/arch/arm/boot/dts/sunxi-common-regulators.dtsi +++ b/arch/arm/boot/dts/sunxi-common-regulators.dtsi @@ -108,6 +108,7 @@ regulator-name = "usb1-vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; + regulator-boot-on; enable-active-high; gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; status = "disabled"; @@ -120,6 +121,7 @@ regulator-name = "usb2-vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; + regulator-boot-on; enable-active-high; gpio = <&pio 7 3 GPIO_ACTIVE_HIGH>; status = "disabled"; From ccef71cc6ae1b1bda3fc2f27493ea831edd6caaa Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sat, 20 Jun 2015 17:40:08 +0200 Subject: [PATCH 22/35] ARM: dts: sun4i: Enable otg controller on the ba10-tvbox The ba10-tvbox has the otg controller connected to one of the 2 usb-A receptacles it has on the front, so enable the otg controller in host-only mode. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts b/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts index 93d435670ef1..f3cb297fd1db 100644 --- a/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts +++ b/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts @@ -125,12 +125,21 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { usb2_vbus_pin_a: usb2_vbus_pin@0 { allwinner,pins = "PH12"; }; }; +®_usb0_vbus { + regulator-boot-on; + status = "okay"; +}; + ®_usb1_vbus { status = "okay"; }; @@ -146,7 +155,13 @@ status = "okay"; }; +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + &usbphy { + usb0_vbus-supply = <®_usb0_vbus>; usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; status = "okay"; From 2433d82b6c9a3b3ec2ef68ef3360b8361d2d1a29 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sat, 20 Jun 2015 17:40:09 +0200 Subject: [PATCH 23/35] ARM: dts: sun4i: Enable otg controller on the mini-x The mini-x has the otg controller connected to one of the 2 usb-A receptacles it has on the front, so enable the otg controller in host-only mode. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10-mini-xplus.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts index ebe2a04ef649..a7dd86d30fa2 100644 --- a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts +++ b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts @@ -114,6 +114,15 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + +®_usb0_vbus { + regulator-boot-on; + status = "okay"; +}; + ®_usb1_vbus { status = "okay"; }; @@ -128,7 +137,13 @@ status = "okay"; }; +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + &usbphy { + usb0_vbus-supply = <®_usb0_vbus>; usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; status = "okay"; From cb9b608706c21cb7c748dcea7fa493344857f505 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sat, 20 Jun 2015 17:40:10 +0200 Subject: [PATCH 24/35] ARM: dts: sun6i: Enable otg controller on the cs908 The cs908 has the otg controller connected to one of the 2 usb-A receptacles it has on the front, so enable the otg controller in host-only mode. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun6i-a31s-cs908.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sun6i-a31s-cs908.dts b/arch/arm/boot/dts/sun6i-a31s-cs908.dts index 1e2411a2bcea..5e8f8c4f2b30 100644 --- a/arch/arm/boot/dts/sun6i-a31s-cs908.dts +++ b/arch/arm/boot/dts/sun6i-a31s-cs908.dts @@ -93,6 +93,11 @@ status = "okay"; }; +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + &usbphy { status = "okay"; }; From 98a4707ada2be6b168a3490c3addc2690927a111 Mon Sep 17 00:00:00 2001 From: Michal Suchanek Date: Tue, 23 Jun 2015 21:41:42 +0200 Subject: [PATCH 25/35] ARM: dts: axp152: Add a dtsi file for the axp152 pmic Add a dtsi file for the axp152 pmic, this mirrors the way things are handled for the axp202 pmic. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/axp152.dtsi | 49 +++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 arch/arm/boot/dts/axp152.dtsi diff --git a/arch/arm/boot/dts/axp152.dtsi b/arch/arm/boot/dts/axp152.dtsi new file mode 100644 index 000000000000..f90ad6c64a07 --- /dev/null +++ b/arch/arm/boot/dts/axp152.dtsi @@ -0,0 +1,49 @@ +/* + * Copyright 2015 Chen-Yu Tsai + * + * Chen-Yu Tsai + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +&axp152 { + compatible = "x-powers,axp152"; + interrupt-controller; + #interrupt-cells = <1>; +}; From c53765247ed7461ebe4e448af03c051bf6edaf48 Mon Sep 17 00:00:00 2001 From: Michal Suchanek Date: Tue, 23 Jun 2015 21:41:43 +0200 Subject: [PATCH 26/35] ARM: dts: A10s-OLinuxIno: Add a node for axp152 pmic Add a node for axp152 pmic used on the A10s-OLinuxIno SBC. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts index a7e19e4847f7..7b26e17146b8 100644 --- a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts @@ -96,8 +96,15 @@ pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>; status = "okay"; + + axp152: pmic@30 { + reg = <0x30>; + interrupts = <0>; + }; }; +#include "axp152.dtsi" + &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins_a>; From 79ae3e66f8d7ba51c02773897a8f1a37b496d9a3 Mon Sep 17 00:00:00 2001 From: Josef Gajdusek Date: Mon, 20 Jul 2015 22:53:18 +0200 Subject: [PATCH 27/35] ARM: dts: sun4i: Add Iteaduino Plus A10 Iteaduino Plus A10 is a breakout board + Itead Core A10. It features 1GB RAM, has most of the A10 pins on a .1" header, 2 USB ports, 1 OTG USB port, Ethernet, HDMI, SATA, Speaker/Microphone 3.5mm jacks and an SD card slot. Signed-off-by: Josef Gajdusek Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/Makefile | 1 + .../dts/sun4i-a10-itead-iteaduino-plus.dts | 202 ++++++++++++++++++ 2 files changed, 203 insertions(+) create mode 100644 arch/arm/boot/dts/sun4i-a10-itead-iteaduino-plus.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index f07a97f39988..f830e1f12716 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -554,6 +554,7 @@ dtb-$(CONFIG_MACH_SUN4I) += \ sun4i-a10-hackberry.dtb \ sun4i-a10-hyundai-a7hd.dtb \ sun4i-a10-inet97fv2.dtb \ + sun4i-a10-itead-iteaduino-plus.dts \ sun4i-a10-jesurun-q5.dtb \ sun4i-a10-marsboard.dtb \ sun4i-a10-mini-xplus.dtb \ diff --git a/arch/arm/boot/dts/sun4i-a10-itead-iteaduino-plus.dts b/arch/arm/boot/dts/sun4i-a10-itead-iteaduino-plus.dts new file mode 100644 index 000000000000..985e15503378 --- /dev/null +++ b/arch/arm/boot/dts/sun4i-a10-itead-iteaduino-plus.dts @@ -0,0 +1,202 @@ +/* + * Copyright 2015 Josef Gajdusek + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun4i-a10.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include +#include + +/ { + model = "Iteaduino Plus A10"; + compatible = "itead,iteaduino-plus-a10", "allwinner,sun4i-a10"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&ahci { + target-supply = <®_ahci_5v>; + status = "okay"; +}; + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_pins_a>; + phy = <&phy1>; + status = "okay"; +}; + +&emac_sram { + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; + + axp209: pmic@34 { + reg = <0x34>; + interrupts = <0>; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins_a>; + status = "okay"; +}; + +&ir0 { + pinctrl-names = "default"; + pinctrl-0 = <&ir0_rx_pins_a>; + status = "okay"; +}; + +&mdio { + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ + cd-inverted; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +®_ahci_5v { + status = "okay"; +}; + +#include "axp209.dtsi" + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1450000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-dll"; +}; + +®_ldo1 { + regulator-name = "vdd-rtc"; +}; + +®_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + +®_usb1_vbus { + status = "okay"; +}; + +®_usb2_vbus { + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins_a>, + <&spi0_cs0_pins_a>; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <®_usb1_vbus>; + usb2_vbus-supply = <®_usb2_vbus>; + status = "okay"; +}; From b03e081672d9ccbff8185dd655a7bbba24223b4a Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Wed, 17 Jun 2015 11:44:24 +0200 Subject: [PATCH 28/35] ARM: sunxi: dt: Convert users to the PIO interrupts binding The current DTs were setting the cell size to 2, but used the default xlate function that was assuming an interrupt cell size of 1, leading to the second part of the cell (the flags) being ignored, while we were having an inconsistent binding between the interrupts and gpio (that could also be used as interrupts). That "binding" doesn't work either with newer SoCs that have multiple irq banks. Now that we fixed the pinctrl driver to handle this like it should always have been handled, convert the DT users, and while we're at it, remove the size-cells property of PIO that is completely useless. Signed-off-by: Maxime Ripard Reviewed-by: Hans de Goede Acked-by: Linus Walleij --- arch/arm/boot/dts/sun4i-a10.dtsi | 3 +-- arch/arm/boot/dts/sun5i-a13-utoo-p66.dts | 2 +- arch/arm/boot/dts/sun5i.dtsi | 3 +-- arch/arm/boot/dts/sun6i-a31.dtsi | 3 +-- arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 2 +- arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts | 2 +- arch/arm/boot/dts/sun7i-a20.dtsi | 3 +-- arch/arm/boot/dts/sun8i-a23-a33.dtsi | 3 +-- 8 files changed, 8 insertions(+), 13 deletions(-) diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 5ce2e8e3e114..463bacd6a74d 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -726,8 +726,7 @@ clocks = <&apb0_gates 5>; gpio-controller; interrupt-controller; - #interrupt-cells = <2>; - #size-cells = <0>; + #interrupt-cells = <3>; #gpio-cells = <3>; pwm0_pins_a: pwm0@0 { diff --git a/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts b/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts index 3043aac2c765..eb793d5a2bd6 100644 --- a/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts +++ b/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts @@ -93,7 +93,7 @@ compatible = "chipone,icn8318"; reg = <0x40>; interrupt-parent = <&pio>; - interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* EINT9 (PG9) */ + interrupts = <6 9 IRQ_TYPE_EDGE_FALLING>; /* EINT9 (PG9) */ pinctrl-names = "default"; pinctrl-0 = <&ts_wake_pin_p66>; wake-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */ diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index 550506fed13b..759117d14ce5 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -488,8 +488,7 @@ clocks = <&apb0_gates 5>; gpio-controller; interrupt-controller; - #interrupt-cells = <2>; - #size-cells = <0>; + #interrupt-cells = <3>; #gpio-cells = <3>; i2c0_pins_a: i2c0@0 { diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index c9b5bfd7b3b4..39953e76bbfc 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -612,8 +612,7 @@ clocks = <&apb1_gates 5>; gpio-controller; interrupt-controller; - #interrupt-cells = <2>; - #size-cells = <0>; + #interrupt-cells = <3>; #gpio-cells = <3>; uart0_pins_a: uart0@0 { diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts index 839d79d98395..2dada04cbc50 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts @@ -181,7 +181,7 @@ reg = <1>; compatible = "brcm,bcm4329-fmac"; interrupt-parent = <&pio>; - interrupts = <10 IRQ_TYPE_LEVEL_LOW>; /* PH10 / EINT10 */ + interrupts = <7 10 IRQ_TYPE_LEVEL_LOW>; /* PH10 / EINT10 */ interrupt-names = "host-wake"; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts b/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts index f32f6f20d923..1e6bd360dac0 100644 --- a/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts +++ b/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts @@ -178,7 +178,7 @@ reg = <1>; compatible = "brcm,bcm4329-fmac"; interrupt-parent = <&pio>; - interrupts = <10 IRQ_TYPE_LEVEL_LOW>; /* PH10 / EINT10 */ + interrupts = <7 10 IRQ_TYPE_LEVEL_LOW>; /* PH10 / EINT10 */ interrupt-names = "host-wake"; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 067f2b00f5e5..71ab6b85f240 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -807,8 +807,7 @@ clocks = <&apb0_gates 5>; gpio-controller; interrupt-controller; - #interrupt-cells = <2>; - #size-cells = <0>; + #interrupt-cells = <3>; #gpio-cells = <3>; pwm0_pins_a: pwm0@0 { diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi index b9e4d5650b5d..9c4a55c5510e 100644 --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi @@ -361,8 +361,7 @@ clocks = <&apb1_gates 5>; gpio-controller; interrupt-controller; - #address-cells = <1>; - #size-cells = <0>; + #interrupt-cells = <3>; #gpio-cells = <3>; uart0_pins_a: uart0@0 { From b7b1d645bb7a3dab4be9d4114cbe319b67a45c01 Mon Sep 17 00:00:00 2001 From: Remy van Elst Date: Fri, 31 Jul 2015 10:59:50 +0200 Subject: [PATCH 29/35] ARM: dts: sun4i: Enable USB DRC on A10 OLinuxIno Lime Enable the otg/drc usb controller on the A10 OLinuxIno Lime. Signed-off-by: Remy van Elst Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- .../arm/boot/dts/sun4i-a10-olinuxino-lime.dts | 32 +++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts index b64aa4eb071e..28e32ad705cd 100644 --- a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts +++ b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts @@ -150,6 +150,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 { allwinner,pins = "PC3"; @@ -164,6 +168,20 @@ allwinner,drive = ; allwinner,pull = ; }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { + allwinner,pins = "PH5"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; }; ®_ahci_5v { @@ -172,6 +190,10 @@ status = "okay"; }; +®_usb0_vbus { + status = "okay"; +}; + ®_usb1_vbus { status = "okay"; }; @@ -186,7 +208,17 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_vbus-supply = <®_usb0_vbus>; usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; status = "okay"; From 24354cc7c2b1187ab66ee27dd891bf0d59a8624e Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Fri, 31 Jul 2015 14:53:36 +0200 Subject: [PATCH 30/35] ARM: dts: sun5i: Enable USB DRC on A10s OLinuxIno Micro Enable the otg/drc usb controller on the A10s OLinuxIno Micro. Note the A10s OlinuxIno Micro always has some voltage on its otg power pin, even if the usb-vbus0-regulator is disabled, the leaked voltage is enough to make vbus-det always report 1, so we do not use vbus-det on this board. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- .../boot/dts/sun5i-a10s-olinuxino-micro.dts | 32 +++++++++++++++++-- 1 file changed, 30 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts index 7b26e17146b8..5a422c1ff725 100644 --- a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts @@ -196,6 +196,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { mmc0_cd_pin_olinuxino_micro: mmc0_cd_pin@0 { allwinner,pins = "PG1"; @@ -224,6 +228,18 @@ allwinner,drive = ; allwinner,pull = ; }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PG12"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +®_usb0_vbus { + gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */ + status = "okay"; }; ®_usb1_vbus { @@ -250,8 +266,20 @@ status = "okay"; }; -&usbphy { - usb1_vbus-supply = <®_usb1_vbus>; +&usb_otg { + dr_mode = "otg"; status = "okay"; }; +&usb0_vbus_pin_a { + allwinner,pins = "PG11"; +}; + +&usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>; + usb0_id_det-gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ + usb0_vbus-supply = <®_usb0_vbus>; + usb1_vbus-supply = <®_usb1_vbus>; + status = "okay"; +}; From 4e627fba0511546ad92ad983f938a2d6d47c95f2 Mon Sep 17 00:00:00 2001 From: Mark Janssen Date: Fri, 31 Jul 2015 14:53:37 +0200 Subject: [PATCH 31/35] ARM: dts: sun5i: Enable USB DRC on A13 OLinuxIno Enable the otg/drc usb controller on the A13 OLinuxIno. Signed-off-by: Mark Janssen Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 37 +++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts index 42324005eb7c..b3c234c65ea1 100644 --- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts +++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts @@ -159,6 +159,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { mmc0_cd_pin_olinuxino: mmc0_cd_pin@0 { allwinner,pins = "PG0"; @@ -174,6 +178,20 @@ allwinner,pull = ; }; + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PG2"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { + allwinner,pins = "PG1"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + usb1_vbus_pin_olinuxino: usb1_vbus_pin@0 { allwinner,pins = "PG11"; allwinner,function = "gpio_out"; @@ -182,6 +200,11 @@ }; }; +®_usb0_vbus { + status = "okay"; + gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ +}; + ®_usb1_vbus { pinctrl-0 = <&usb1_vbus_pin_olinuxino>; gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; @@ -194,7 +217,21 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usb0_vbus_pin_a { + allwinner,pins = "PG12"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */ + usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ + usb0_vbus-supply = <®_usb0_vbus>; usb1_vbus-supply = <®_usb1_vbus>; status = "okay"; }; From 361a4069727b1f43583314470e877e1187b35505 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Fri, 31 Jul 2015 14:53:38 +0200 Subject: [PATCH 32/35] ARM: dts: sun8i: Enable USB DRC on Ippo Q8H-A33 tablet Enable the otg/drc usb controller on the Ippo Q8H-A33 tablet, for now it is enabled in host-only mode, because true OTG support requires support for detecting and enabling Vbus through the axp221 pmic. For this to work the Vbus on the port must be enabled by u-boot, or a powered hub must be used. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a33-ippo-q8h-v1.2.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a33-ippo-q8h-v1.2.dts b/arch/arm/boot/dts/sun8i-a33-ippo-q8h-v1.2.dts index 8bb75ee736a9..a43897515fb6 100644 --- a/arch/arm/boot/dts/sun8i-a33-ippo-q8h-v1.2.dts +++ b/arch/arm/boot/dts/sun8i-a33-ippo-q8h-v1.2.dts @@ -116,3 +116,18 @@ pinctrl-0 = <&r_uart_pins_a>; status = "okay"; }; + +/* + * FIXME for now we only support host mode and rely on u-boot to have + * turned on Vbus which is controlled by the axp223 pmic on the board. + * + * Once we have axp223 support we should switch to fully supporting otg. + */ +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; From d747af013db7d0a0d3c5054d3856ad941f2b715c Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Fri, 31 Jul 2015 22:40:58 +0800 Subject: [PATCH 33/35] ARM: dts: sun5i: hsg-h702: Enable side volume buttons with LRADC The tablet has volume up/down buttons on the side, connected to the LRADC. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-a13-hsg-h702.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts b/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts index 990f9d61ae4d..4b8808ab9711 100644 --- a/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts +++ b/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts @@ -45,6 +45,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include #include / { @@ -96,6 +97,25 @@ status = "okay"; }; +&lradc { + vref-supply = <®_ldo2>; + status = "okay"; + + button@200 { + label = "Volume Up"; + linux,code = ; + channel = <0>; + voltage = <200000>; + }; + + button@400 { + label = "Volume Down"; + linux,code = ; + channel = <0>; + voltage = <400000>; + }; +}; + &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_h702>; From 36d16154fd0c5cc4f61831c482379acfb3d800f4 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Fri, 31 Jul 2015 22:40:59 +0800 Subject: [PATCH 34/35] ARM: dts: sun5i: hsg-h702: Enable USB OTG controller This tablet has proper USB OTG support, using 3 GPIO pins for ID and VBUS detection, and also VBUS control. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-a13-hsg-h702.dts | 38 ++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts b/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts index 4b8808ab9711..3724b988064e 100644 --- a/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts +++ b/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts @@ -130,6 +130,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { mmc0_cd_pin_h702: mmc0_cd_pin@0 { allwinner,pins = "PG0"; @@ -137,6 +141,20 @@ allwinner,drive = ; allwinner,pull = ; }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PG2"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { + allwinner,pins = "PG1"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; }; #include "axp209.dtsi" @@ -172,13 +190,33 @@ regulator-name = "vcc-wifi"; }; +®_usb0_vbus { + pinctrl-0 = <&usb0_vbus_pin_a>; + gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ + status = "okay"; +}; + &uart1 { pinctrl-names = "default"; pinctrl-0 = <&uart1_pins_b>; status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usb0_vbus_pin_a { + allwinner,pins = "PG12"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpios = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */ + usb0_vbus_det-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ + usb0_vbus-supply = <®_usb0_vbus>; usb1_vbus-supply = <®_ldo3>; status = "okay"; }; From 60018d027d792bdfe9d98c83a470fa2cdd6a0e1a Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Fri, 31 Jul 2015 17:41:52 +0200 Subject: [PATCH 35/35] ARM: dts: sun7i: Change cubietruck wifi enable pin to use mmc-pwrseq The wifi-enable pin of the ap6210 module is not really a regulator, switch to the mmc-pwrseq framework for controlling it. This more accurately reflects how the hardware actually works. Signed-off-by: Hans de Goede [maxime: Changed the name of the pinctrl node and re-ordered it] Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 29 ++++++++++------------ 1 file changed, 13 insertions(+), 16 deletions(-) diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts index 2dada04cbc50..e6b019232a9e 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts @@ -88,15 +88,11 @@ }; }; - reg_vmmc3: vmmc3 { - compatible = "regulator-fixed"; + mmc3_pwrseq: mmc3_pwrseq { + compatible = "mmc-pwrseq-simple"; pinctrl-names = "default"; - pinctrl-0 = <&vmmc3_pin_cubietruck>; - regulator-name = "vmmc3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpio = <&pio 7 9 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&mmc3_pwrseq_pin_cubietruck>; + reset-gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 WIFI_EN */ }; }; @@ -172,7 +168,8 @@ &mmc3 { pinctrl-names = "default"; pinctrl-0 = <&mmc3_pins_a>; - vmmc-supply = <®_vmmc3>; + vmmc-supply = <®_vcc3v3>; + mmc-pwrseq = <&mmc3_pwrseq>; bus-width = <4>; non-removable; status = "okay"; @@ -204,13 +201,6 @@ }; &pio { - vmmc3_pin_cubietruck: vmmc3_pin@0 { - allwinner,pins = "PH9"; - allwinner,function = "gpio_out"; - allwinner,drive = ; - allwinner,pull = ; - }; - ahci_pwr_pin_cubietruck: ahci_pwr_pin@1 { allwinner,pins = "PH12"; allwinner,function = "gpio_out"; @@ -225,6 +215,13 @@ allwinner,pull = ; }; + mmc3_pwrseq_pin_cubietruck: mmc3_pwrseq_pin@0 { + allwinner,pins = "PH9"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; + usb0_vbus_pin_a: usb0_vbus_pin@0 { allwinner,pins = "PH17"; allwinner,function = "gpio_out";