tty: goldfish: use __raw_writel()/__raw_readl()

gf_early_console_putchar() uses __raw_writel() but the standard driver
uses writel()/readl(). This means we can't use both on the same machine
as the device is either big-endian, little-endian or native-endian.

As android implementation defines the endianness of the device is the one
of the architecture replace all writel()/readl() by
__raw_writel()/__raw_readl()

https://android.googlesource.com/platform/external/qemu/+/refs/heads/emu-master-dev/hw/char/goldfish_tty.c#222

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Link: https://lore.kernel.org/r/20201010004749.1201695-1-laurent@vivier.eu
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Laurent Vivier 2020-10-10 02:47:49 +02:00 committed by Greg Kroah-Hartman
parent 1a460c3607
commit da31de35cd
2 changed files with 13 additions and 13 deletions

View File

@ -61,13 +61,13 @@ static void do_rw_io(struct goldfish_tty *qtty,
spin_lock_irqsave(&qtty->lock, irq_flags); spin_lock_irqsave(&qtty->lock, irq_flags);
gf_write_ptr((void *)address, base + GOLDFISH_TTY_REG_DATA_PTR, gf_write_ptr((void *)address, base + GOLDFISH_TTY_REG_DATA_PTR,
base + GOLDFISH_TTY_REG_DATA_PTR_HIGH); base + GOLDFISH_TTY_REG_DATA_PTR_HIGH);
writel(count, base + GOLDFISH_TTY_REG_DATA_LEN); __raw_writel(count, base + GOLDFISH_TTY_REG_DATA_LEN);
if (is_write) if (is_write)
writel(GOLDFISH_TTY_CMD_WRITE_BUFFER, __raw_writel(GOLDFISH_TTY_CMD_WRITE_BUFFER,
base + GOLDFISH_TTY_REG_CMD); base + GOLDFISH_TTY_REG_CMD);
else else
writel(GOLDFISH_TTY_CMD_READ_BUFFER, __raw_writel(GOLDFISH_TTY_CMD_READ_BUFFER,
base + GOLDFISH_TTY_REG_CMD); base + GOLDFISH_TTY_REG_CMD);
spin_unlock_irqrestore(&qtty->lock, irq_flags); spin_unlock_irqrestore(&qtty->lock, irq_flags);
@ -142,7 +142,7 @@ static irqreturn_t goldfish_tty_interrupt(int irq, void *dev_id)
unsigned char *buf; unsigned char *buf;
u32 count; u32 count;
count = readl(base + GOLDFISH_TTY_REG_BYTES_READY); count = __raw_readl(base + GOLDFISH_TTY_REG_BYTES_READY);
if (count == 0) if (count == 0)
return IRQ_NONE; return IRQ_NONE;
@ -159,7 +159,7 @@ static int goldfish_tty_activate(struct tty_port *port, struct tty_struct *tty)
{ {
struct goldfish_tty *qtty = container_of(port, struct goldfish_tty, struct goldfish_tty *qtty = container_of(port, struct goldfish_tty,
port); port);
writel(GOLDFISH_TTY_CMD_INT_ENABLE, qtty->base + GOLDFISH_TTY_REG_CMD); __raw_writel(GOLDFISH_TTY_CMD_INT_ENABLE, qtty->base + GOLDFISH_TTY_REG_CMD);
return 0; return 0;
} }
@ -167,7 +167,7 @@ static void goldfish_tty_shutdown(struct tty_port *port)
{ {
struct goldfish_tty *qtty = container_of(port, struct goldfish_tty, struct goldfish_tty *qtty = container_of(port, struct goldfish_tty,
port); port);
writel(GOLDFISH_TTY_CMD_INT_DISABLE, qtty->base + GOLDFISH_TTY_REG_CMD); __raw_writel(GOLDFISH_TTY_CMD_INT_DISABLE, qtty->base + GOLDFISH_TTY_REG_CMD);
} }
static int goldfish_tty_open(struct tty_struct *tty, struct file *filp) static int goldfish_tty_open(struct tty_struct *tty, struct file *filp)
@ -202,7 +202,7 @@ static int goldfish_tty_chars_in_buffer(struct tty_struct *tty)
{ {
struct goldfish_tty *qtty = &goldfish_ttys[tty->index]; struct goldfish_tty *qtty = &goldfish_ttys[tty->index];
void __iomem *base = qtty->base; void __iomem *base = qtty->base;
return readl(base + GOLDFISH_TTY_REG_BYTES_READY); return __raw_readl(base + GOLDFISH_TTY_REG_BYTES_READY);
} }
static void goldfish_tty_console_write(struct console *co, const char *b, static void goldfish_tty_console_write(struct console *co, const char *b,
@ -357,7 +357,7 @@ static int goldfish_tty_probe(struct platform_device *pdev)
* on Ranchu emulator (qemu2) returns 1 here and * on Ranchu emulator (qemu2) returns 1 here and
* driver will use physical addresses. * driver will use physical addresses.
*/ */
qtty->version = readl(base + GOLDFISH_TTY_REG_VERSION); qtty->version = __raw_readl(base + GOLDFISH_TTY_REG_VERSION);
/* /*
* Goldfish TTY device on Ranchu emulator (qemu2) * Goldfish TTY device on Ranchu emulator (qemu2)
@ -376,7 +376,7 @@ static int goldfish_tty_probe(struct platform_device *pdev)
} }
} }
writel(GOLDFISH_TTY_CMD_INT_DISABLE, base + GOLDFISH_TTY_REG_CMD); __raw_writel(GOLDFISH_TTY_CMD_INT_DISABLE, base + GOLDFISH_TTY_REG_CMD);
ret = request_irq(irq, goldfish_tty_interrupt, IRQF_SHARED, ret = request_irq(irq, goldfish_tty_interrupt, IRQF_SHARED,
"goldfish_tty", qtty); "goldfish_tty", qtty);

View File

@ -13,9 +13,9 @@ static inline void gf_write_ptr(const void *ptr, void __iomem *portl,
{ {
const unsigned long addr = (unsigned long)ptr; const unsigned long addr = (unsigned long)ptr;
writel(lower_32_bits(addr), portl); __raw_writel(lower_32_bits(addr), portl);
#ifdef CONFIG_64BIT #ifdef CONFIG_64BIT
writel(upper_32_bits(addr), porth); __raw_writel(upper_32_bits(addr), porth);
#endif #endif
} }
@ -23,9 +23,9 @@ static inline void gf_write_dma_addr(const dma_addr_t addr,
void __iomem *portl, void __iomem *portl,
void __iomem *porth) void __iomem *porth)
{ {
writel(lower_32_bits(addr), portl); __raw_writel(lower_32_bits(addr), portl);
#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
writel(upper_32_bits(addr), porth); __raw_writel(upper_32_bits(addr), porth);
#endif #endif
} }