dt-bindings: Add Tegra PMC pad configuration bindings
Document the PMC pinctrl bindings for pad power state and signaling voltage configuration. Both nvidia,tegra186-pmc.txt and nvidia,tegra20-pmc.txt are modified as they both cover SoC generations for which these bindings apply. Add a header defining Tegra PMC pad voltage configurations. Signed-off-by: Aapo Vienamo <avienamo@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Aapo Vienamo
Thierry Reding
parent
5b394b2ddf
commit
d9be10edf7
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@ -34,3 +34,96 @@ Board DTS:
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pmc@c360000 {
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pmc@c360000 {
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nvidia,invert-interrupt;
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nvidia,invert-interrupt;
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};
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};
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== Pad Control ==
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On Tegra SoCs a pad is a set of pins which are configured as a group.
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The pin grouping is a fixed attribute of the hardware. The PMC can be
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used to set pad power state and signaling voltage. A pad can be either
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in active or power down mode. The support for power state and signaling
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voltage configuration varies depending on the pad in question. 3.3 V and
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1.8 V signaling voltages are supported on pins where software
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controllable signaling voltage switching is available.
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Pad configurations are described with pin configuration nodes which
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are placed under the pmc node and they are referred to by the pinctrl
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client properties. For more information see
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Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt.
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The following pads are present on Tegra186:
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csia csib dsi mipi-bias
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pex-clk-bias pex-clk3 pex-clk2 pex-clk1
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usb0 usb1 usb2 usb-bias
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uart audio hsic dbg
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hdmi-dp0 hdmi-dp1 pex-cntrl sdmmc2-hv
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sdmmc4 cam dsib dsic
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dsid csic csid csie
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dsif spi ufs dmic-hv
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edp sdmmc1-hv sdmmc3-hv conn
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audio-hv ao-hv
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Required pin configuration properties:
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- pins: A list of strings, each of which contains the name of a pad
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to be configured.
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Optional pin configuration properties:
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- low-power-enable: Configure the pad into power down mode
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- low-power-disable: Configure the pad into active mode
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- power-source: Must contain either TEGRA_IO_PAD_VOLTAGE_1V8 or
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TEGRA_IO_PAD_VOLTAGE_3V3 to select between signaling voltages.
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The values are defined in
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include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h.
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Note: The power state can be configured on all of the above pads except
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for ao-hv. Following pads have software configurable signaling
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voltages: sdmmc2-hv, dmic-hv, sdmmc1-hv, sdmmc3-hv, audio-hv,
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ao-hv.
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Pad configuration state example:
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pmc: pmc@7000e400 {
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compatible = "nvidia,tegra186-pmc";
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reg = <0 0x0c360000 0 0x10000>,
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<0 0x0c370000 0 0x10000>,
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<0 0x0c380000 0 0x10000>,
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<0 0x0c390000 0 0x10000>;
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reg-names = "pmc", "wake", "aotag", "scratch";
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...
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sdmmc1_3v3: sdmmc1-3v3 {
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pins = "sdmmc1-hv";
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power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
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};
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sdmmc1_1v8: sdmmc1-1v8 {
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pins = "sdmmc1-hv";
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power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
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};
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hdmi_off: hdmi-off {
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pins = "hdmi";
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low-power-enable;
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}
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hdmi_on: hdmi-on {
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pins = "hdmi";
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low-power-disable;
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}
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};
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Pinctrl client example:
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sdmmc1: sdhci@3400000 {
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...
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pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
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pinctrl-0 = <&sdmmc1_3v3>;
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pinctrl-1 = <&sdmmc1_1v8>;
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};
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...
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sor0: sor@15540000 {
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...
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pinctrl-0 = <&hdmi_off>;
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pinctrl-1 = <&hdmi_on>;
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pinctrl-names = "hdmi-on", "hdmi-off";
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};
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@ -195,3 +195,106 @@ Example:
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power-domains = <&pd_audio>;
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power-domains = <&pd_audio>;
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...
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...
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};
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};
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== Pad Control ==
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On Tegra SoCs a pad is a set of pins which are configured as a group.
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The pin grouping is a fixed attribute of the hardware. The PMC can be
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used to set pad power state and signaling voltage. A pad can be either
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in active or power down mode. The support for power state and signaling
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voltage configuration varies depending on the pad in question. 3.3 V and
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1.8 V signaling voltages are supported on pins where software
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controllable signaling voltage switching is available.
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The pad configuration state nodes are placed under the pmc node and they
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are referred to by the pinctrl client properties. For more information
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see Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt.
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The pad name should be used as the value of the pins property in pin
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configuration nodes.
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The following pads are present on Tegra124 and Tegra132:
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audio bb cam comp
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csia csb cse dsi
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dsib dsic dsid hdmi
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hsic hv lvds mipi-bias
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nand pex-bias pex-clk1 pex-clk2
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pex-cntrl sdmmc1 sdmmc3 sdmmc4
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sys_ddc uart usb0 usb1
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usb2 usb_bias
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The following pads are present on Tegra210:
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audio audio-hv cam csia
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csib csic csid csie
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csif dbg debug-nonao dmic
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dp dsi dsib dsic
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dsid emmc emmc2 gpio
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hdmi hsic lvds mipi-bias
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pex-bias pex-clk1 pex-clk2 pex-cntrl
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sdmmc1 sdmmc3 spi spi-hv
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uart usb0 usb1 usb2
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usb3 usb-bias
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Required pin configuration properties:
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- pins: Must contain name of the pad(s) to be configured.
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Optional pin configuration properties:
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- low-power-enable: Configure the pad into power down mode
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- low-power-disable: Configure the pad into active mode
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- power-source: Must contain either TEGRA_IO_PAD_VOLTAGE_1V8
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or TEGRA_IO_PAD_VOLTAGE_3V3 to select between signaling voltages.
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The values are defined in
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include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h.
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Note: The power state can be configured on all of the Tegra124 and
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Tegra132 pads. None of the Tegra124 or Tegra132 pads support
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signaling voltage switching.
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Note: All of the listed Tegra210 pads except pex-cntrl support power
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state configuration. Signaling voltage switching is supported on
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following Tegra210 pads: audio, audio-hv, cam, dbg, dmic, gpio,
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pex-cntrl, sdmmc1, sdmmc3, spi, spi-hv, and uart.
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Pad configuration state example:
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pmc: pmc@7000e400 {
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compatible = "nvidia,tegra210-pmc";
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reg = <0x0 0x7000e400 0x0 0x400>;
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clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>;
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clock-names = "pclk", "clk32k_in";
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...
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sdmmc1_3v3: sdmmc1-3v3 {
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pins = "sdmmc1";
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power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
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};
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sdmmc1_1v8: sdmmc1-1v8 {
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pins = "sdmmc1";
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power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
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};
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hdmi_off: hdmi-off {
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pins = "hdmi";
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low-power-enable;
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}
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hdmi_on: hdmi-on {
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pins = "hdmi";
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low-power-disable;
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}
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};
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Pinctrl client example:
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sdmmc1: sdhci@700b0000 {
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...
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pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
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pinctrl-0 = <&sdmmc1_3v3>;
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pinctrl-1 = <&sdmmc1_1v8>;
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};
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...
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sor@54540000 {
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...
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pinctrl-0 = <&hdmi_off>;
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pinctrl-1 = <&hdmi_on>;
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pinctrl-names = "hdmi-on", "hdmi-off";
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};
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@ -0,0 +1,18 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* pinctrl-tegra-io-pad.h: Tegra I/O pad source voltage configuration constants
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* pinctrl bindings.
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*
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* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Author: Aapo Vienamo <avienamo@nvidia.com>
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*/
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#ifndef _DT_BINDINGS_PINCTRL_TEGRA_IO_PAD_H
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#define _DT_BINDINGS_PINCTRL_TEGRA_IO_PAD_H
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/* Voltage levels of the I/O pad's source rail */
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#define TEGRA_IO_PAD_VOLTAGE_1V8 0
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#define TEGRA_IO_PAD_VOLTAGE_3V3 1
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#endif
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