arm64: dts: qcom: msm8992: Modernize the DTS style
Following changes have been made: - remove name, compatible and msm-id - wrap clocks in clocks{} - order nodes by name and by address - clock_gcc -> gcc - msmgpio -> tlmm - retire msm8992-pins.dtsi - add some of the missing pins - make comments C-style - make apcs a mailbox Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-2-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
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*/
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&msmgpio {
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blsp1_uart2_default: blsp1_uart2_default {
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pinmux {
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function = "blsp_uart2";
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pins = "gpio4", "gpio5";
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};
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pinconf {
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pins = "gpio4", "gpio5";
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drive-strength = <16>;
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bias-disable;
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};
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};
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blsp1_uart2_sleep: blsp1_uart2_sleep {
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pinmux {
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function = "gpio";
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pins = "gpio4", "gpio5";
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};
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pinconf {
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pins = "gpio4", "gpio5";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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/* 0-3 for sdc1 4-6 for sdc2 */
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/* Order of pins */
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/* SDC1: CLK -> 0, CMD -> 1, DATA -> 2, RCLK -> 3 */
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/* SDC2: CLK -> 4, CMD -> 5, DATA -> 6 */
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sdc1_clk_on: clk-on {
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pinconf {
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pins = "sdc1_clk";
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bias-disable = <0>; /* No pull */
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drive-strength = <16>; /* 16mA */
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};
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};
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sdc1_clk_off: clk-off {
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pinconf {
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pins = "sdc1_clk";
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bias-disable = <0>; /* No pull */
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drive-strength = <2>; /* 2mA */
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};
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};
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sdc1_cmd_on: cmd-on {
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pinconf {
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pins = "sdc1_cmd";
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bias-pull-up;
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drive-strength = <8>;
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};
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};
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sdc1_cmd_off: cmd-off {
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pinconf {
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pins = "sdc1_cmd";
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bias-pull-up = <0x3>; /* same as 3.10 ?? */
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drive-strength = <2>; /* 2mA */
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};
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};
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sdc1_data_on: data-on {
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pinconf {
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pins = "sdc1_data";
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bias-pull-up;
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drive-strength = <8>; /* 8mA */
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};
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};
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sdc1_data_off: data-off {
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pinconf {
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pins = "sdc1_data";
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bias-pull-up;
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drive-strength = <2>;
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};
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};
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sdc1_rclk_on: rclk-on {
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bias-pull-down; /* pull down */
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};
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sdc1_rclk_off: rclk-off {
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bias-pull-down; /* pull down */
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};
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};
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@ -6,10 +6,6 @@
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#include <dt-bindings/clock/qcom,gcc-msm8994.h>
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/ {
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model = "Qualcomm Technologies, Inc. MSM 8992";
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compatible = "qcom,msm8992";
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// msm-id needed by bootloader for selecting correct blob
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qcom,msm-id = <251 0>, <252 0>;
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interrupt-parent = <&intc>;
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#address-cells = <2>;
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@ -40,35 +36,35 @@
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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clocks {
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xo_board: xo_board {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <19200000>;
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};
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sleep_clk: sleep_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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};
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xo_board: xo_board {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <19200000>;
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memory {
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device_type = "memory";
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/* We expect the bootloader to fill in the reg */
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reg = <0 0 0 0>;
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};
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sleep_clk: sleep_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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vreg_vph_pwr: vreg-vph-pwr {
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compatible = "regulator-fixed";
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status = "okay";
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regulator-name = "vph-pwr";
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regulator-min-microvolt = <3600000>;
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regulator-max-microvolt = <3600000>;
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regulator-always-on;
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smem_region: smem@6a00000 {
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reg = <0x0 0x6a00000 0x0 0x200000>;
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no-map;
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};
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};
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sfpb_mutex: hwmutex {
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<0xf9002000 0x1000>;
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};
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apcs: syscon@f900d000 {
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compatible = "syscon";
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apcs: mailbox@f900d000 {
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compatible = "qcom,msm8994-apcs-kpss-global", "syscon";
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reg = <0xf900d000 0x2000>;
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#mbox-cells = <1>;
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};
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timer@f9020000 {
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@ -161,40 +158,6 @@
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};
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};
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restart@fc4ab000 {
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compatible = "qcom,pshold";
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reg = <0xfc4ab000 0x4>;
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};
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msmgpio: pinctrl@fd510000 {
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compatible = "qcom,msm8994-pinctrl";
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reg = <0xfd510000 0x4000>;
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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gpio-ranges = <&msmgpio 0 0 146>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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blsp1_uart2: serial@f991e000 {
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compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
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reg = <0xf991e000 0x1000>;
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interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_LOW>;
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status = "disabled";
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clock-names = "core", "iface";
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clocks = <&clock_gcc GCC_BLSP1_UART2_APPS_CLK>,
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<&clock_gcc GCC_BLSP1_AHB_CLK>;
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};
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clock_gcc: clock-controller@fc400000 {
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compatible = "qcom,gcc-msm8994";
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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reg = <0xfc400000 0x2000>;
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};
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sdhci1: mmc@f9824900 {
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compatible = "qcom,sdhci-msm-v4";
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reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
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<GIC_SPI 138 IRQ_TYPE_NONE>;
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interrupt-names = "hc_irq", "pwr_irq";
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clocks = <&clock_gcc GCC_SDCC1_APPS_CLK>,
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<&clock_gcc GCC_SDCC1_AHB_CLK>;
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clocks = <&gcc GCC_SDCC1_APPS_CLK>,
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<&gcc GCC_SDCC1_AHB_CLK>;
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clock-names = "core", "iface";
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pinctrl-names = "default", "sleep";
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status = "okay";
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};
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blsp1_uart2: serial@f991e000 {
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compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
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reg = <0xf991e000 0x1000>;
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interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_LOW>;
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clock-names = "core", "iface";
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clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
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<&gcc GCC_BLSP1_AHB_CLK>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&blsp1_uart2_default>;
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pinctrl-1 = <&blsp1_uart2_sleep>;
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status = "disabled";
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};
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gcc: clock-controller@fc400000 {
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compatible = "qcom,gcc-msm8994";
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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reg = <0xfc400000 0x2000>;
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};
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rpm_msg_ram: memory@fc428000 {
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compatible = "qcom,rpm-msg-ram";
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reg = <0xfc428000 0x4000>;
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};
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restart@fc4ab000 {
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compatible = "qcom,pshold";
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reg = <0xfc4ab000 0x4>;
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};
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sfpb_mutex_regs: syscon@fd484000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "syscon";
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reg = <0xfd484000 0x400>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0 0 0 0>; // bootloader will update
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};
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tlmm: pinctrl@fd510000 {
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compatible = "qcom,msm8994-pinctrl";
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reg = <0xfd510000 0x4000>;
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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gpio-ranges = <&tlmm 0 0 146>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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blsp1_uart2_default: blsp1-uart2-default {
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function = "blsp_uart2";
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pins = "gpio4", "gpio5";
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drive-strength = <16>;
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bias-disable;
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};
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smem_region: smem@6a00000 {
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reg = <0x0 0x6a00000 0x0 0x200000>;
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no-map;
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blsp1_uart2_sleep: blsp1-uart2-sleep {
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function = "gpio";
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pins = "gpio4", "gpio5";
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drive-strength = <2>;
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bias-pull-down;
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};
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sdc1_clk_on: clk-on {
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pins = "sdc1_clk";
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bias-disable;
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drive-strength = <6>;
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};
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sdc1_clk_off: clk-off {
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pins = "sdc1_clk";
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bias-disable;
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drive-strength = <2>;
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};
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sdc1_cmd_on: cmd-on {
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pins = "sdc1_cmd";
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bias-pull-up;
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drive-strength = <6>;
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};
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sdc1_cmd_off: cmd-off {
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pins = "sdc1_cmd";
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bias-pull-up;
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drive-strength = <2>;
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};
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sdc1_data_on: data-on {
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pins = "sdc1_data";
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bias-pull-up;
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drive-strength = <6>;
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};
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sdc1_data_off: data-off {
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pins = "sdc1_data";
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bias-pull-up;
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drive-strength = <2>;
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};
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sdc1_rclk_on: rclk-on {
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pins = "sdc1_rclk";
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bias-pull-down;
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};
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sdc1_rclk_off: rclk-off {
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pins = "sdc1_rclk";
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bias-pull-down;
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};
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i2c2_default: i2c2-default {
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function = "blsp_i2c2";
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pins = "gpio6", "gpio7";
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drive-strength = <2>;
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bias-disable;
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};
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i2c2_sleep: i2c2-sleep {
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function = "gpio";
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pins = "gpio6", "gpio7";
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drive-strength = <2>;
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bias-disable;
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};
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i2c6_default: i2c6-default {
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function = "blsp_i2c6";
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pins = "gpio28", "gpio27";
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drive-strength = <2>;
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bias-disable;
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};
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i2c6_sleep: i2c6-sleep {
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function = "gpio";
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pins = "gpio28", "gpio27";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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};
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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};
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vreg_vph_pwr: vreg-vph-pwr {
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compatible = "regulator-fixed";
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status = "okay";
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regulator-name = "vph-pwr";
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regulator-min-microvolt = <3600000>;
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regulator-max-microvolt = <3600000>;
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regulator-always-on;
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};
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};
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#include "msm8992-pins.dtsi"
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