Renesas ARM Based SoC DT Fixes for v4.8
* Corrections to r8a7792 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXjDuJAAoJENfPZGlqN0++zTwP/izl3NeRBX9cz+sTDYKb9lB5 w2OMwUE7p4aC5iFej7CmLLvhgtpC/6RJiD61F6LqHJF3GG5CJrzXo69EYrnU13R2 4oIEZLdnWawAbAIhzKHvypgXw+6el4X3NSX29yZziVkObWxDczCYKQBNYOhzwRQd itoJk6oYOwgUUCkbDY9CfPyym0rHtQ/CXPxL49MZgiKX0Qkq0QyCeT4OC3XGbyu2 1oJfBDew3i7OQnd+RirmMlVZpHBaDgIKehaUTd1ZNJomAxBuaISpdfmiliU46VcB 6+LXBTM0LRqIvZTsdEEWd4hvMTC5A4MPb3zTel1lUeucfQrkfKIMfijBt/nNokkG vpGQBdCM9FuSXKylAcToFKLKi6AMaXy2dUTi8/fQcNE59VHghrB3eLHPJDRbxkCm 2CVQ2Kjtjm+Egd+ElYsCkFXtiRqR1xFMIM2HFfGq50GFpR9KF3vwelgSgnQbO9ei g9qjNAuoIEJR2o+kj6XKTjGU9qRNC6DoxZLIsg32cUP8E95wU9xWfQaHbWEGUdhh kEQkwvVrHsLM6b3ElAj/U7cwK7AI5nDnNucOwbBM6f9XoAeVbgrTy2cz4wDfmfoR 5lNTuyrLCv0cu0SPOHXgqPti6bxPnzYF7G/Xnm9WbJeJYnA0q2VK+4jl8ItjjgoA /0nNwVDhCUVCzX95Vw5g =BHVI -----END PGP SIGNATURE----- Merge tag 'renesas-dt-fixes-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Merge "Renesas ARM Based SoC DT Fixes for v4.8" from Simon Horman: * Corrections to r8a7792 * tag 'renesas-dt-fixes-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: dts: r8a7792: remove ADSP clock ARM: dts: r8a7792: add PLL1 divided by 2 clock
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commit
d95eabc7b8
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@ -279,11 +279,18 @@
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clocks = <&extal_clk>;
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#clock-cells = <1>;
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clock-output-names = "main", "pll0", "pll1", "pll3",
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"lb", "qspi", "z", "adsp";
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"lb", "qspi", "z";
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#power-domain-cells = <0>;
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};
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/* Fixed factor clocks */
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pll1_div2_clk: pll1_div2 {
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compatible = "fixed-factor-clock";
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clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
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#clock-cells = <0>;
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clock-div = <2>;
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clock-mult = <1>;
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};
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zs_clk: zs {
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compatible = "fixed-factor-clock";
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clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
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@ -18,7 +18,6 @@
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#define R8A7792_CLK_LB 4
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#define R8A7792_CLK_QSPI 5
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#define R8A7792_CLK_Z 6
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#define R8A7792_CLK_ADSP 7
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/* MSTP0 */
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#define R8A7792_CLK_MSIOF0 0
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