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arm64: dts: m3ulcb: enable SCIF clk and pins 

This enables the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Vladimir Barinov 2016-11-03 21:07:20 +03:00 committed by Simon Horman
parent d9b1c75387
commit d92ce1a574
1 changed files with 13 additions and 0 deletions
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13
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
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@ -37,10 +37,18 @@
}; };
&pfc { &pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
scif2_pins: scif2 { scif2_pins: scif2 {
groups = "scif2_data_a"; groups = "scif2_data_a";
function = "scif2"; function = "scif2";
}; };
scif_clk_pins: scif_clk {
groups = "scif_clk_a";
function = "scif_clk";
};
}; };
&scif2 { &scif2 {
@ -49,3 +57,8 @@
status = "okay"; status = "okay";
}; };
&scif_clk {
clock-frequency = <14745600>;
status = "okay";
};