ARM: stm32: debug: add low-level debug support
This adds low-level debug support on USART1 for STM32F4 and STM32F7. Compiled via 'CONFIG_DEBUG_LL' and 'CONFIG_EARLY_PRINTK'. Enabled via 'earlyprintk' in bootargs. Signed-off-by: Gerald Baeza <gerald.baeza@st.com> Signed-off-by: Bich Hemon <bich.hemon@st.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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@ -1192,6 +1192,28 @@ choice
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If unsure, say N.
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config STM32F4_DEBUG_UART
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bool "Use STM32F4 UART for low-level debug"
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depends on ARCH_STM32
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select DEBUG_STM32_UART
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help
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Say Y here if you want kernel low-level debugging support
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on STM32F4 based platforms, which default UART is wired on
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USART1.
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If unsure, say N.
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config STM32F7_DEBUG_UART
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bool "Use STM32F7 UART for low-level debug"
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depends on ARCH_STM32
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select DEBUG_STM32_UART
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help
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Say Y here if you want kernel low-level debugging support
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on STM32F7 based platforms, which default UART is wired on
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USART1.
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If unsure, say N.
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config TEGRA_DEBUG_UART_AUTO_ODMDATA
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bool "Kernel low-level debugging messages via Tegra UART via ODMDATA"
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depends on ARCH_TEGRA
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@ -1476,6 +1498,10 @@ config DEBUG_STI_UART
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bool
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depends on ARCH_STI
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config DEBUG_STM32_UART
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bool
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depends on ARCH_STM32
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config DEBUG_SIRFSOC_UART
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bool
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depends on ARCH_SIRF
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@ -1525,6 +1551,7 @@ config DEBUG_LL_INCLUDE
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default "debug/s5pv210.S" if DEBUG_S5PV210_UART
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default "debug/sirf.S" if DEBUG_SIRFSOC_UART
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default "debug/sti.S" if DEBUG_STI_UART
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default "debug/stm32.S" if DEBUG_STM32_UART
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default "debug/tegra.S" if DEBUG_TEGRA_UART
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default "debug/ux500.S" if DEBUG_UX500_UART
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default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT
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@ -0,0 +1,41 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) STMicroelectronics SA 2017 - All Rights Reserved
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* Author: Gerald Baeza <gerald.baeza@st.com> for STMicroelectronics.
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*/
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#define STM32_UART_BASE 0x40011000 /* USART1 */
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#ifdef CONFIG_STM32F4_DEBUG_UART
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#define STM32_USART_SR_OFF 0x00
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#define STM32_USART_TDR_OFF 0x04
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#endif
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#ifdef CONFIG_STM32F7_DEBUG_UART
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#define STM32_USART_SR_OFF 0x1C
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#define STM32_USART_TDR_OFF 0x28
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#endif
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#define STM32_USART_TC (1 << 6) /* Tx complete */
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#define STM32_USART_TXE (1 << 7) /* Tx data reg empty */
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.macro addruart, rp, rv, tmp
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ldr \rp, =STM32_UART_BASE @ physical base
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ldr \rv, =STM32_UART_BASE @ virt base /* NoMMU */
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.endm
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.macro senduart,rd,rx
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strb \rd, [\rx, #STM32_USART_TDR_OFF]
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.endm
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.macro waituart,rd,rx
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1001: ldr \rd, [\rx, #(STM32_USART_SR_OFF)] @ Read Status Register
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tst \rd, #STM32_USART_TXE @ TXE = 1 = tx empty
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beq 1001b
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.endm
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.macro busyuart,rd,rx
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1001: ldr \rd, [\rx, #(STM32_USART_SR_OFF)] @ Read Status Register
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tst \rd, #STM32_USART_TC @ TC = 1 = tx complete
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beq 1001b
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.endm
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