ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes
This patch adds device nodes for all the regulators of the AXP813 PMIC. Sunxi common regulators are removed, and USB VBUS regulators are added. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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@ -44,7 +44,6 @@
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/dts-v1/;
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#include "sun8i-a83t.dtsi"
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#include "sunxi-common-regulators.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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@ -59,6 +58,16 @@
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chosen {
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stdout-path = "serial0:115200n8";
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};
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reg_usb1_vbus: reg-usb1-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb1-vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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enable-active-high;
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gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
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};
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};
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&ehci0 {
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@ -71,7 +80,7 @@
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&mmc0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_pins>;
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vmmc-supply = <®_vcc3v3>;
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vmmc-supply = <®_dcdc1>;
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bus-width = <4>;
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cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
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cd-inverted;
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@ -81,7 +90,8 @@
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_8bit_emmc_pins>;
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vmmc-supply = <®_vcc3v3>;
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vmmc-supply = <®_dcdc1>;
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vqmmc-supply = <®_dcdc1>;
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bus-width = <8>;
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non-removable;
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cap-mmc-hw-reset;
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@ -96,6 +106,10 @@
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reg = <0x3a3>;
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interrupt-parent = <&r_intc>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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eldoin-supply = <®_dcdc1>;
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fldoin-supply = <®_dcdc5>;
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swin-supply = <®_dcdc1>;
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x-powers,drive-vbus-en;
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};
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ac100: codec@e89 {
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@ -123,17 +137,126 @@
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};
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};
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®_usb1_vbus {
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gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
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#include "axp81x.dtsi"
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®_aldo1 {
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regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc-1v8";
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};
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®_aldo2 {
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regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "dram-pll";
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};
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®_aldo3 {
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regulator-always-on;
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-name = "avcc";
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};
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®_dcdc1 {
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/* schematics says 3.1V but FEX file says 3.3V */
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-3v3";
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};
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®_dcdc2 {
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regulator-always-on;
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1100000>;
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regulator-name = "vdd-cpua";
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};
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®_dcdc3 {
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regulator-always-on;
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1100000>;
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regulator-name = "vdd-cpub";
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};
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®_dcdc4 {
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1100000>;
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regulator-name = "vdd-gpu";
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};
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®_dcdc5 {
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regulator-always-on;
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-name = "vcc-dram";
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};
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®_dcdc6 {
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regulator-always-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-name = "vdd-sys";
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};
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®_dldo1 {
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/*
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* This powers both the WiFi/BT module's main power, I/O supply,
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* and external pull-ups on all the data lines. It should be set
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* to the same voltage as the I/O supply (DCDC1 in this case) to
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* avoid any leakage or mismatch.
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*/
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-wifi";
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};
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®_dldo3 {
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regulator-always-on;
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-name = "vcc-pd";
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};
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®_drivevbus {
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regulator-name = "usb0-vbus";
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status = "okay";
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};
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®_vcc3v0 {
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status = "disabled";
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®_fldo1 {
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regulator-min-microvolt = <1080000>;
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regulator-max-microvolt = <1320000>;
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regulator-name = "vdd12-hsic";
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};
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®_vcc5v0 {
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status = "disabled";
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®_fldo2 {
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/*
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* Despite the embedded CPUs core not being used in any way,
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* this must remain on or the system will hang.
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*/
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regulator-always-on;
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1100000>;
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regulator-name = "vdd-cpus";
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};
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®_rtc_ldo {
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regulator-name = "vcc-rtc";
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};
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®_sw {
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/*
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* The PHY requires 20ms after all voltages
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* are applied until core logic is ready and
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* 30ms after the reset pin is de-asserted.
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* Set a 100ms delay to account for PMIC
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* ramp time and board traces.
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*/
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regulator-enable-ramp-delay = <100000>;
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regulator-name = "vcc-ephy";
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};
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&uart0 {
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