staging: xgifb: XGINew_SetDRAMDefaultRegister340: inline the value of SR1B
SR1B register value is always 3 regardless of video card or RAM type. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -507,9 +507,7 @@ static void XGINew_SetDRAMDefaultRegister340(
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xgifb_reg_set(P3d4, 0xB0, 0x80); /* DDRII Dual frequency mode */
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XGINew_DDR2_DefaultRegister(HwDeviceExtension, P3d4, pVBInfo);
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}
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xgifb_reg_set(P3c4,
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0x1B,
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pVBInfo->SR15[3][pVBInfo->ram_type]); /* SR1B */
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xgifb_reg_set(P3c4, 0x1B, 0x03); /* SR1B */
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}
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@ -18,18 +18,16 @@ const struct XGI_ECLKDataStruct XGI340_ECLKData[] = {
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{0x7C, 0x08, 0x01, 200},
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};
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static const unsigned char XG27_SR13[4][3] = {
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static const unsigned char XG27_SR13[3][3] = {
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{0x35, 0x45, 0xb1}, /* SR13 */
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{0x41, 0x51, 0x5c}, /* SR14 */
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{0x32, 0x32, 0x42}, /* SR18 */
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{0x03, 0x03, 0x03} /* SR1B */
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};
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static const unsigned char XGI340_SR13[4][3] = {
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static const unsigned char XGI340_SR13[3][3] = {
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{0x35, 0x45, 0xb1}, /* SR13 */
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{0x41, 0x51, 0x5c}, /* SR14 */
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{0x31, 0x42, 0x42}, /* SR18 */
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{0x03, 0x03, 0x03} /* SR1B */
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};
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static const unsigned char XGI340_cr41[24][3] = {
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