thermal: tegra: add a debugfs to show registers
Add a debugfs interface to show register contents for debug. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
This commit is contained in:
Wei Ni
Eduardo Valentin
parent
8204104f35
commit
d753b22d8b
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@ -15,6 +15,7 @@
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*
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*/
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#include <linux/debugfs.h>
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#include <linux/bitops.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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@ -33,14 +34,18 @@
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#define SENSOR_CONFIG0 0
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#define SENSOR_CONFIG0_STOP BIT(0)
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#define SENSOR_CONFIG0_TALL_SHIFT 8
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#define SENSOR_CONFIG0_TCALC_OVER BIT(4)
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#define SENSOR_CONFIG0_OVER BIT(3)
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#define SENSOR_CONFIG0_CPTR_OVER BIT(2)
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#define SENSOR_CONFIG0_OVER BIT(3)
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#define SENSOR_CONFIG0_TCALC_OVER BIT(4)
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#define SENSOR_CONFIG0_TALL_MASK (0xfffff << 8)
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#define SENSOR_CONFIG0_TALL_SHIFT 8
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#define SENSOR_CONFIG1 4
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#define SENSOR_CONFIG1_TSAMPLE_MASK 0x3ff
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#define SENSOR_CONFIG1_TSAMPLE_SHIFT 0
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#define SENSOR_CONFIG1_TIDDQ_EN_MASK (0x3f << 15)
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#define SENSOR_CONFIG1_TIDDQ_EN_SHIFT 15
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#define SENSOR_CONFIG1_TEN_COUNT_MASK (0x3f << 24)
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#define SENSOR_CONFIG1_TEN_COUNT_SHIFT 24
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#define SENSOR_CONFIG1_TEMP_ENABLE BIT(31)
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@ -49,6 +54,14 @@
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* because, it will be used by tegra_soctherm_fuse.c
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*/
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#define SENSOR_STATUS0 0xc
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#define SENSOR_STATUS0_VALID_MASK BIT(31)
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#define SENSOR_STATUS0_CAPTURE_MASK 0xffff
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#define SENSOR_STATUS1 0x10
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#define SENSOR_STATUS1_TEMP_VALID_MASK BIT(31)
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#define SENSOR_STATUS1_TEMP_MASK 0xffff
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#define READBACK_VALUE_MASK 0xff00
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#define READBACK_VALUE_SHIFT 8
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#define READBACK_ADD_HALF BIT(7)
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@ -73,6 +86,8 @@ struct tegra_soctherm {
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u32 *calib;
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struct tegra_soctherm_soc *soc;
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struct dentry *debugfs_dir;
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};
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static int enable_tsensor(struct tegra_soctherm *tegra,
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@ -140,6 +155,127 @@ static const struct thermal_zone_of_device_ops tegra_of_thermal_ops = {
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.get_temp = tegra_thermctl_get_temp,
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};
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#ifdef CONFIG_DEBUG_FS
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static int regs_show(struct seq_file *s, void *data)
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{
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struct platform_device *pdev = s->private;
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struct tegra_soctherm *ts = platform_get_drvdata(pdev);
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const struct tegra_tsensor *tsensors = ts->soc->tsensors;
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u32 r, state;
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int i;
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seq_puts(s, "-----TSENSE (convert HW)-----\n");
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for (i = 0; i < ts->soc->num_tsensors; i++) {
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r = readl(ts->regs + tsensors[i].base + SENSOR_CONFIG1);
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state = REG_GET_MASK(r, SENSOR_CONFIG1_TEMP_ENABLE);
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seq_printf(s, "%s: ", tsensors[i].name);
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seq_printf(s, "En(%d) ", state);
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if (!state) {
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seq_puts(s, "\n");
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continue;
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}
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state = REG_GET_MASK(r, SENSOR_CONFIG1_TIDDQ_EN_MASK);
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seq_printf(s, "tiddq(%d) ", state);
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state = REG_GET_MASK(r, SENSOR_CONFIG1_TEN_COUNT_MASK);
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seq_printf(s, "ten_count(%d) ", state);
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state = REG_GET_MASK(r, SENSOR_CONFIG1_TSAMPLE_MASK);
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seq_printf(s, "tsample(%d) ", state + 1);
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r = readl(ts->regs + tsensors[i].base + SENSOR_STATUS1);
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state = REG_GET_MASK(r, SENSOR_STATUS1_TEMP_VALID_MASK);
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seq_printf(s, "Temp(%d/", state);
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state = REG_GET_MASK(r, SENSOR_STATUS1_TEMP_MASK);
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seq_printf(s, "%d) ", translate_temp(state));
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r = readl(ts->regs + tsensors[i].base + SENSOR_STATUS0);
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state = REG_GET_MASK(r, SENSOR_STATUS0_VALID_MASK);
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seq_printf(s, "Capture(%d/", state);
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state = REG_GET_MASK(r, SENSOR_STATUS0_CAPTURE_MASK);
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seq_printf(s, "%d) ", state);
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r = readl(ts->regs + tsensors[i].base + SENSOR_CONFIG0);
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state = REG_GET_MASK(r, SENSOR_CONFIG0_STOP);
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seq_printf(s, "Stop(%d) ", state);
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state = REG_GET_MASK(r, SENSOR_CONFIG0_TALL_MASK);
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seq_printf(s, "Tall(%d) ", state);
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state = REG_GET_MASK(r, SENSOR_CONFIG0_TCALC_OVER);
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seq_printf(s, "Over(%d/", state);
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state = REG_GET_MASK(r, SENSOR_CONFIG0_OVER);
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seq_printf(s, "%d/", state);
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state = REG_GET_MASK(r, SENSOR_CONFIG0_CPTR_OVER);
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seq_printf(s, "%d) ", state);
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r = readl(ts->regs + tsensors[i].base + SENSOR_CONFIG2);
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state = REG_GET_MASK(r, SENSOR_CONFIG2_THERMA_MASK);
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seq_printf(s, "Therm_A/B(%d/", state);
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state = REG_GET_MASK(r, SENSOR_CONFIG2_THERMB_MASK);
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seq_printf(s, "%d)\n", (s16)state);
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}
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r = readl(ts->regs + SENSOR_PDIV);
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seq_printf(s, "PDIV: 0x%x\n", r);
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r = readl(ts->regs + SENSOR_HOTSPOT_OFF);
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seq_printf(s, "HOTSPOT: 0x%x\n", r);
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seq_puts(s, "\n");
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seq_puts(s, "-----SOC_THERM-----\n");
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r = readl(ts->regs + SENSOR_TEMP1);
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state = REG_GET_MASK(r, SENSOR_TEMP1_CPU_TEMP_MASK);
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seq_printf(s, "Temperatures: CPU(%d) ", translate_temp(state));
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state = REG_GET_MASK(r, SENSOR_TEMP1_GPU_TEMP_MASK);
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seq_printf(s, " GPU(%d) ", translate_temp(state));
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r = readl(ts->regs + SENSOR_TEMP2);
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state = REG_GET_MASK(r, SENSOR_TEMP2_PLLX_TEMP_MASK);
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seq_printf(s, " PLLX(%d) ", translate_temp(state));
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state = REG_GET_MASK(r, SENSOR_TEMP2_MEM_TEMP_MASK);
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seq_printf(s, " MEM(%d)\n", translate_temp(state));
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return 0;
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}
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static int regs_open(struct inode *inode, struct file *file)
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{
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return single_open(file, regs_show, inode->i_private);
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}
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static const struct file_operations regs_fops = {
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.open = regs_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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};
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static void soctherm_debug_init(struct platform_device *pdev)
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{
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struct tegra_soctherm *tegra = platform_get_drvdata(pdev);
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struct dentry *root, *file;
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root = debugfs_create_dir("soctherm", NULL);
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if (!root) {
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dev_err(&pdev->dev, "failed to create debugfs directory\n");
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return;
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}
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tegra->debugfs_dir = root;
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file = debugfs_create_file("reg_contents", 0644, root,
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pdev, ®s_fops);
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if (!file) {
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dev_err(&pdev->dev, "failed to create debugfs file\n");
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debugfs_remove_recursive(tegra->debugfs_dir);
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tegra->debugfs_dir = NULL;
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}
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}
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#else
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static inline void soctherm_debug_init(struct platform_device *pdev) {}
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#endif
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static const struct of_device_id tegra_soctherm_of_match[] = {
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#ifdef CONFIG_ARCH_TEGRA_124_SOC
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{
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@ -282,6 +418,8 @@ static int tegra_soctherm_probe(struct platform_device *pdev)
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}
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}
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soctherm_debug_init(pdev);
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return 0;
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disable_clocks:
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@ -295,6 +433,8 @@ static int tegra_soctherm_remove(struct platform_device *pdev)
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{
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struct tegra_soctherm *tegra = platform_get_drvdata(pdev);
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debugfs_remove_recursive(tegra->debugfs_dir);
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clk_disable_unprepare(tegra->clock_tsensor);
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clk_disable_unprepare(tegra->clock_soctherm);
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@ -16,7 +16,9 @@
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#define __DRIVERS_THERMAL_TEGRA_SOCTHERM_H
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#define SENSOR_CONFIG2 8
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#define SENSOR_CONFIG2_THERMA_MASK (0xffff << 16)
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#define SENSOR_CONFIG2_THERMA_SHIFT 16
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#define SENSOR_CONFIG2_THERMB_MASK 0xffff
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#define SENSOR_CONFIG2_THERMB_SHIFT 0
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#define SENSOR_PDIV 0x1c0
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