drm/amd/powerplay: add some hwmgr functions for sysfs interface on Carrizo
These add the interfaces for manual clock control. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1700,6 +1700,54 @@ static void cz_hw_print_display_cfg(
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return -EINVAL;
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}
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static int cz_force_clock_level(struct pp_hwmgr *hwmgr,
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enum pp_clock_type type, int level)
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{
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if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL)
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return -EINVAL;
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switch (type) {
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case PP_SCLK:
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smum_send_msg_to_smc_with_parameter(hwmgr->smumgr,
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PPSMC_MSG_SetSclkSoftMin,
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(1 << level));
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smum_send_msg_to_smc_with_parameter(hwmgr->smumgr,
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PPSMC_MSG_SetSclkSoftMax,
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(1 << level));
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break;
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default:
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break;
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}
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return 0;
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}
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static int cz_print_clock_levels(struct pp_hwmgr *hwmgr,
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enum pp_clock_type type, char *buf)
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{
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struct phm_clock_voltage_dependency_table *sclk_table =
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hwmgr->dyn_state.vddc_dependency_on_sclk;
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int i, now, size = 0;
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switch (type) {
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case PP_SCLK:
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now = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device,
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CGS_IND_REG__SMC,
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ixTARGET_AND_CURRENT_PROFILE_INDEX),
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TARGET_AND_CURRENT_PROFILE_INDEX,
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CURR_SCLK_INDEX);
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for (i = 0; i < sclk_table->count; i++)
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size += sprintf(buf + size, "%d: %uMhz %s\n",
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i, sclk_table->entries[i].clk / 100,
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(i == now) ? "*" : "");
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break;
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default:
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break;
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}
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return size;
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}
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static const struct pp_hwmgr_func cz_hwmgr_funcs = {
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.backend_init = cz_hwmgr_backend_init,
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.backend_fini = cz_hwmgr_backend_fini,
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@ -1719,6 +1767,9 @@ static const struct pp_hwmgr_func cz_hwmgr_funcs = {
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.set_cpu_power_state = cz_set_cpu_power_state,
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.store_cc6_data = cz_store_cc6_data,
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.get_dal_power_level= cz_get_dal_power_level,
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.force_clock_level = cz_force_clock_level,
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.print_clock_levels = cz_print_clock_levels,
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};
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int cz_hwmgr_init(struct pp_hwmgr *hwmgr)
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