thermal: tegra: add support for thermal IRQ
Support to generate an interrupt when the temperature crosses a programmed threshold and notify the thermal framework. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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@ -86,6 +86,20 @@
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#define THERMCTL_LVL0_UP_STATS 0x10
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#define THERMCTL_LVL0_DN_STATS 0x14
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#define THERMCTL_INTR_STATUS 0x84
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#define THERMCTL_INTR_ENABLE 0x88
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#define THERMCTL_INTR_DISABLE 0x8c
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#define TH_INTR_MD0_MASK BIT(25)
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#define TH_INTR_MU0_MASK BIT(24)
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#define TH_INTR_GD0_MASK BIT(17)
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#define TH_INTR_GU0_MASK BIT(16)
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#define TH_INTR_CD0_MASK BIT(9)
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#define TH_INTR_CU0_MASK BIT(8)
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#define TH_INTR_PD0_MASK BIT(1)
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#define TH_INTR_PU0_MASK BIT(0)
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#define TH_INTR_IGNORE_MASK 0xFCFCFCFC
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#define THERMCTL_STATS_CTL 0x94
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#define STATS_CTL_CLR_DN 0x8
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#define STATS_CTL_EN_DN 0x4
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@ -242,6 +256,8 @@ struct tegra_soctherm {
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void __iomem *clk_regs;
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void __iomem *ccroc_regs;
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int thermal_irq;
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u32 *calib;
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struct thermal_zone_device **thermctl_tzs;
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struct tegra_soctherm_soc *soc;
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@ -672,6 +688,98 @@ static int tegra_soctherm_set_hwtrips(struct device *dev,
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return 0;
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}
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static irqreturn_t soctherm_thermal_isr(int irq, void *dev_id)
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{
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struct tegra_soctherm *ts = dev_id;
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u32 r;
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r = readl(ts->regs + THERMCTL_INTR_STATUS);
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writel(r, ts->regs + THERMCTL_INTR_DISABLE);
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return IRQ_WAKE_THREAD;
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}
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/**
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* soctherm_thermal_isr_thread() - Handles a thermal interrupt request
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* @irq: The interrupt number being requested; not used
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* @dev_id: Opaque pointer to tegra_soctherm;
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*
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* Clears the interrupt status register if there are expected
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* interrupt bits set.
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* The interrupt(s) are then handled by updating the corresponding
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* thermal zones.
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*
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* An error is logged if any unexpected interrupt bits are set.
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*
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* Disabled interrupts are re-enabled.
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*
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* Return: %IRQ_HANDLED. Interrupt was handled and no further processing
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* is needed.
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*/
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static irqreturn_t soctherm_thermal_isr_thread(int irq, void *dev_id)
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{
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struct tegra_soctherm *ts = dev_id;
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struct thermal_zone_device *tz;
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u32 st, ex = 0, cp = 0, gp = 0, pl = 0, me = 0;
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st = readl(ts->regs + THERMCTL_INTR_STATUS);
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/* deliberately clear expected interrupts handled in SW */
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cp |= st & TH_INTR_CD0_MASK;
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cp |= st & TH_INTR_CU0_MASK;
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gp |= st & TH_INTR_GD0_MASK;
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gp |= st & TH_INTR_GU0_MASK;
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pl |= st & TH_INTR_PD0_MASK;
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pl |= st & TH_INTR_PU0_MASK;
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me |= st & TH_INTR_MD0_MASK;
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me |= st & TH_INTR_MU0_MASK;
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ex |= cp | gp | pl | me;
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if (ex) {
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writel(ex, ts->regs + THERMCTL_INTR_STATUS);
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st &= ~ex;
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if (cp) {
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tz = ts->thermctl_tzs[TEGRA124_SOCTHERM_SENSOR_CPU];
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thermal_zone_device_update(tz,
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THERMAL_EVENT_UNSPECIFIED);
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}
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if (gp) {
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tz = ts->thermctl_tzs[TEGRA124_SOCTHERM_SENSOR_GPU];
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thermal_zone_device_update(tz,
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THERMAL_EVENT_UNSPECIFIED);
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}
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if (pl) {
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tz = ts->thermctl_tzs[TEGRA124_SOCTHERM_SENSOR_PLLX];
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thermal_zone_device_update(tz,
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THERMAL_EVENT_UNSPECIFIED);
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}
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if (me) {
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tz = ts->thermctl_tzs[TEGRA124_SOCTHERM_SENSOR_MEM];
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thermal_zone_device_update(tz,
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THERMAL_EVENT_UNSPECIFIED);
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}
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}
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/* deliberately ignore expected interrupts NOT handled in SW */
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ex |= TH_INTR_IGNORE_MASK;
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st &= ~ex;
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if (st) {
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/* Whine about any other unexpected INTR bits still set */
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pr_err("soctherm: Ignored unexpected INTRs 0x%08x\n", st);
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writel(st, ts->regs + THERMCTL_INTR_STATUS);
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}
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return IRQ_HANDLED;
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}
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#ifdef CONFIG_DEBUG_FS
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static int regs_show(struct seq_file *s, void *data)
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{
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@ -1334,6 +1442,32 @@ static void tegra_soctherm_throttle(struct device *dev)
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writel(v, ts->regs + THERMCTL_STATS_CTL);
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}
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static int soctherm_interrupts_init(struct platform_device *pdev,
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struct tegra_soctherm *tegra)
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{
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int ret;
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tegra->thermal_irq = platform_get_irq(pdev, 0);
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if (tegra->thermal_irq < 0) {
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dev_dbg(&pdev->dev, "get 'thermal_irq' failed.\n");
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return 0;
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}
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ret = devm_request_threaded_irq(&pdev->dev,
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tegra->thermal_irq,
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soctherm_thermal_isr,
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soctherm_thermal_isr_thread,
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IRQF_ONESHOT,
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dev_name(&pdev->dev),
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tegra);
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if (ret < 0) {
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dev_err(&pdev->dev, "request_irq 'thermal_irq' failed.\n");
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return ret;
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}
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return 0;
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}
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static void soctherm_init(struct platform_device *pdev)
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{
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struct tegra_soctherm *tegra = platform_get_drvdata(pdev);
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@ -1527,6 +1661,8 @@ static int tegra_soctherm_probe(struct platform_device *pdev)
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goto disable_clocks;
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}
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err = soctherm_interrupts_init(pdev, tegra);
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soctherm_debug_init(pdev);
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return 0;
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