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linux-sg2042
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Merge branch 'perf/urgent' into perf/core 

Merge reason: Add these cherry-picked commits so that future changes
              on perf/core don't conflict.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Ingo Molnar 2011-12-06 06:42:35 +01:00
parent 9dde9dc0a8 ddf6e0e507
commit d6c1c49de5
245 changed files with 2710 additions and 2505 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
.mailmap
View File

@ -68,6 +68,7 @@ Juha Yrjola <juha.yrjola@solidboot.com>
Kay Sievers <kay.sievers@vrfy.org>
Kenneth W Chen <kenneth.w.chen@intel.com>
Koushik <raghavendra.koushik@neterion.com>
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Leonid I Ananiev <leonid.i.ananiev@intel.com>
Linas Vepstas <linas@austin.ibm.com>
Mark Brown <broonie@sirena.org.uk>
@ -111,3 +112,4 @@ Uwe Kleine-König <ukl@pengutronix.de>
Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
Valdis Kletnieks <Valdis.Kletnieks@vt.edu>
Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Yusuke Goda <goda.yusuke@renesas.com>

1
Documentation/sound/alsa/HD-Audio-Models.txt
View File

@ -349,6 +349,7 @@ STAC92HD83*
ref Reference board
mic-ref Reference board with power management for ports
dell-s14 Dell laptop
dell-vostro-3500 Dell Vostro 3500 laptop
hp HP laptops with (inverted) mute-LED
hp-dv7-4000 HP dv-7 4000
auto BIOS setup (default)

2
Kbuild
View File

@ -92,7 +92,7 @@ always += missing-syscalls
targets += missing-syscalls
quiet_cmd_syscalls = CALL $<
cmd_syscalls = $(CONFIG_SHELL) $< $(CC) $(c_flags)
cmd_syscalls = $(CONFIG_SHELL) $< $(CC) $(c_flags) $(missing_syscalls_flags)
missing-syscalls: scripts/checksyscalls.sh $(offsets-file) FORCE
$(call cmd,syscalls)

10
MAINTAINERS
View File

@ -1106,6 +1106,7 @@ F: drivers/media/video/s5p-fimc/
ARM/SAMSUNG S5P SERIES Multi Format Codec (MFC) SUPPORT
M: Kyungmin Park <kyungmin.park@samsung.com>
M: Kamil Debski <k.debski@samsung.com>
M: Jeongtae Park <jtp.park@samsung.com>
L: linux-arm-kernel@lists.infradead.org
L: linux-media@vger.kernel.org
S: Maintained
@ -2342,6 +2343,13 @@ S: Supported
F: drivers/gpu/drm/i915
F: include/drm/i915*
DRM DRIVERS FOR EXYNOS
M: Inki Dae <inki.dae@samsung.com>
L: dri-devel@lists.freedesktop.org
S: Supported
F: drivers/gpu/drm/exynos
F: include/drm/exynos*
DSCC4 DRIVER
M: Francois Romieu <romieu@fr.zoreil.com>
L: netdev@vger.kernel.org
@ -6122,7 +6130,7 @@ F: sound/
SOUND - SOC LAYER / DYNAMIC AUDIO POWER MANAGEMENT (ASoC)
M: Liam Girdwood <lrg@ti.com>
M: Mark Brown <broonie@opensource.wolfsonmicro.com>
T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound-2.6.git
T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
W: http://alsa-project.org/main/index.php/ASoC
S: Supported

3
arch/arm/boot/dts/tegra-ventana.dts
View File

@ -22,11 +22,10 @@
sdhci@c8000400 {
cd-gpios = <&gpio 69 0>; /* gpio PI5 */
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
power-gpios = <&gpio 155 0>; /* gpio PT3 */
power-gpios = <&gpio 70 0>; /* gpio PI6 */
};
sdhci@c8000600 {
power-gpios = <&gpio 70 0>; /* gpio PI6 */
support-8bit;
};
};

6
arch/arm/kernel/perf_event.c
View File

@ -347,15 +347,15 @@ validate_group(struct perf_event *event)
memset(&fake_pmu, 0, sizeof(fake_pmu));
if (!validate_event(&fake_pmu, leader))
return -ENOSPC;
return -EINVAL;
list_for_each_entry(sibling, &leader->sibling_list, group_entry) {
if (!validate_event(&fake_pmu, sibling))
return -ENOSPC;
return -EINVAL;
}
if (!validate_event(&fake_pmu, event))
return -ENOSPC;
return -EINVAL;
return 0;
}

7
arch/arm/mach-at91/at91cap9_devices.c
View File

@ -98,7 +98,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
* USB HS Device (Gadget)
* -------------------------------------------------------------------- */
#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE)
#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
static struct resource usba_udc_resources[] = {
[0] = {
@ -1021,8 +1021,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
#if defined(CONFIG_SERIAL_ATMEL)
static struct resource dbgu_resources[] = {
[0] = {
.start = AT91_VA_BASE_SYS + AT91_DBGU,
.end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
.start = AT91_BASE_SYS + AT91_DBGU,
.end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@ -1035,7 +1035,6 @@ static struct resource dbgu_resources[] = {
static struct atmel_uart_data dbgu_data = {
.use_dma_tx = 0,
.use_dma_rx = 0, /* DBGU not capable of receive DMA */
.regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
};
static u64 dbgu_dmamask = DMA_BIT_MASK(32);

5
arch/arm/mach-at91/at91rm9200_devices.c
View File

@ -877,8 +877,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
#if defined(CONFIG_SERIAL_ATMEL)
static struct resource dbgu_resources[] = {
[0] = {
.start = AT91_VA_BASE_SYS + AT91_DBGU,
.end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
.start = AT91_BASE_SYS + AT91_DBGU,
.end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@ -891,7 +891,6 @@ static struct resource dbgu_resources[] = {
static struct atmel_uart_data dbgu_data = {
.use_dma_tx = 0,
.use_dma_rx = 0, /* DBGU not capable of receive DMA */
.regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
};
static u64 dbgu_dmamask = DMA_BIT_MASK(32);

5
arch/arm/mach-at91/at91sam9260_devices.c
View File

@ -837,8 +837,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
#if defined(CONFIG_SERIAL_ATMEL)
static struct resource dbgu_resources[] = {
[0] = {
.start = AT91_VA_BASE_SYS + AT91_DBGU,
.end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
.start = AT91_BASE_SYS + AT91_DBGU,
.end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@ -851,7 +851,6 @@ static struct resource dbgu_resources[] = {
static struct atmel_uart_data dbgu_data = {
.use_dma_tx = 0,
.use_dma_rx = 0, /* DBGU not capable of receive DMA */
.regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
};
static u64 dbgu_dmamask = DMA_BIT_MASK(32);

5
arch/arm/mach-at91/at91sam9261_devices.c
View File

@ -816,8 +816,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
#if defined(CONFIG_SERIAL_ATMEL)
static struct resource dbgu_resources[] = {
[0] = {
.start = AT91_VA_BASE_SYS + AT91_DBGU,
.end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
.start = AT91_BASE_SYS + AT91_DBGU,
.end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@ -830,7 +830,6 @@ static struct resource dbgu_resources[] = {
static struct atmel_uart_data dbgu_data = {
.use_dma_tx = 0,
.use_dma_rx = 0, /* DBGU not capable of receive DMA */
.regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
};
static u64 dbgu_dmamask = DMA_BIT_MASK(32);

5
arch/arm/mach-at91/at91sam9263_devices.c
View File

@ -1196,8 +1196,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
static struct resource dbgu_resources[] = {
[0] = {
.start = AT91_VA_BASE_SYS + AT91_DBGU,
.end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
.start = AT91_BASE_SYS + AT91_DBGU,
.end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@ -1210,7 +1210,6 @@ static struct resource dbgu_resources[] = {
static struct atmel_uart_data dbgu_data = {
.use_dma_tx = 0,
.use_dma_rx = 0, /* DBGU not capable of receive DMA */
.regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
};
static u64 dbgu_dmamask = DMA_BIT_MASK(32);

7
arch/arm/mach-at91/at91sam9g45_devices.c
View File

@ -197,7 +197,7 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data) {}
* USB HS Device (Gadget)
* -------------------------------------------------------------------- */
#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE)
#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
static struct resource usba_udc_resources[] = {
[0] = {
.start = AT91SAM9G45_UDPHS_FIFO,
@ -1332,8 +1332,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
#if defined(CONFIG_SERIAL_ATMEL)
static struct resource dbgu_resources[] = {
[0] = {
.start = AT91_VA_BASE_SYS + AT91_DBGU,
.end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
.start = AT91_BASE_SYS + AT91_DBGU,
.end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@ -1346,7 +1346,6 @@ static struct resource dbgu_resources[] = {
static struct atmel_uart_data dbgu_data = {
.use_dma_tx = 0,
.use_dma_rx = 0,
.regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
};
static u64 dbgu_dmamask = DMA_BIT_MASK(32);

7
arch/arm/mach-at91/at91sam9rl_devices.c
View File

@ -75,7 +75,7 @@ void __init at91_add_device_hdmac(void) {}
* USB HS Device (Gadget)
* -------------------------------------------------------------------- */
#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE)
#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
static struct resource usba_udc_resources[] = {
[0] = {
@ -908,8 +908,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
#if defined(CONFIG_SERIAL_ATMEL)
static struct resource dbgu_resources[] = {
[0] = {
.start = AT91_VA_BASE_SYS + AT91_DBGU,
.end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
.start = AT91_BASE_SYS + AT91_DBGU,
.end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@ -922,7 +922,6 @@ static struct resource dbgu_resources[] = {
static struct atmel_uart_data dbgu_data = {
.use_dma_tx = 0,
.use_dma_rx = 0, /* DBGU not capable of receive DMA */
.regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
};
static u64 dbgu_dmamask = DMA_BIT_MASK(32);

2
arch/arm/mach-at91/board-yl-9200.c
View File

@ -384,7 +384,7 @@ static struct spi_board_info yl9200_spi_devices[] = {
#include <video/s1d13xxxfb.h>
static void __init yl9200_init_video(void)
static void yl9200_init_video(void)
{
/* NWAIT Signal */
at91_set_A_periph(AT91_PIN_PC6, 0);

2
arch/arm/mach-at91/include/mach/vmalloc.h
View File

@ -21,6 +21,8 @@
#ifndef __ASM_ARCH_VMALLOC_H
#define __ASM_ARCH_VMALLOC_H
#include <mach/hardware.h>
#define VMALLOC_END (AT91_VIRT_BASE & PGDIR_MASK)
#endif

34
arch/arm/mach-imx/Makefile.boot
View File

@ -1,22 +1,26 @@
zreladdr-$(CONFIG_ARCH_MX1) += 0x08008000
params_phys-$(CONFIG_ARCH_MX1) := 0x08000100
initrd_phys-$(CONFIG_ARCH_MX1) := 0x08800000
zreladdr-$(CONFIG_SOC_IMX1) += 0x08008000
params_phys-$(CONFIG_SOC_IMX1) := 0x08000100
initrd_phys-$(CONFIG_SOC_IMX1) := 0x08800000
zreladdr-$(CONFIG_MACH_MX21) += 0xC0008000
params_phys-$(CONFIG_MACH_MX21) := 0xC0000100
initrd_phys-$(CONFIG_MACH_MX21) := 0xC0800000
zreladdr-$(CONFIG_SOC_IMX21) += 0xC0008000
params_phys-$(CONFIG_SOC_IMX21) := 0xC0000100
initrd_phys-$(CONFIG_SOC_IMX21) := 0xC0800000
zreladdr-$(CONFIG_ARCH_MX25) += 0x80008000
params_phys-$(CONFIG_ARCH_MX25) := 0x80000100
initrd_phys-$(CONFIG_ARCH_MX25) := 0x80800000
zreladdr-$(CONFIG_SOC_IMX25) += 0x80008000
params_phys-$(CONFIG_SOC_IMX25) := 0x80000100
initrd_phys-$(CONFIG_SOC_IMX25) := 0x80800000
zreladdr-$(CONFIG_MACH_MX27) += 0xA0008000
params_phys-$(CONFIG_MACH_MX27) := 0xA0000100
initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000
zreladdr-$(CONFIG_SOC_IMX27) += 0xA0008000
params_phys-$(CONFIG_SOC_IMX27) := 0xA0000100
initrd_phys-$(CONFIG_SOC_IMX27) := 0xA0800000
zreladdr-$(CONFIG_ARCH_MX3) += 0x80008000
params_phys-$(CONFIG_ARCH_MX3) := 0x80000100
initrd_phys-$(CONFIG_ARCH_MX3) := 0x80800000
zreladdr-$(CONFIG_SOC_IMX31) += 0x80008000
params_phys-$(CONFIG_SOC_IMX31) := 0x80000100
initrd_phys-$(CONFIG_SOC_IMX31) := 0x80800000
zreladdr-$(CONFIG_SOC_IMX35) += 0x80008000
params_phys-$(CONFIG_SOC_IMX35) := 0x80000100
initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000
zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000
params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100

17
arch/arm/mach-imx/clock-imx6q.c
View File

@ -1139,7 +1139,7 @@ static int _clk_set_rate(struct clk *clk, unsigned long rate)
return -EINVAL;
max_div = ((d->bm_pred >> d->bp_pred) + 1) *
((d->bm_pred >> d->bp_pred) + 1);
((d->bm_podf >> d->bp_podf) + 1);
div = parent_rate / rate;
if (div == 0)
@ -2002,6 +2002,21 @@ int __init mx6q_clocks_init(void)
clk_set_rate(&asrc_serial_clk, 1500000);
clk_set_rate(&enfc_clk, 11000000);
/*
* Before pinctrl API is available, we have to rely on the pad
* configuration set up by bootloader. For usdhc example here,
* u-boot sets up the pads for 49.5 MHz case, and we have to lower
* the usdhc clock from 198 to 49.5 MHz to match the pad configuration.
*
* FIXME: This is should be removed after pinctrl API is available.
* At that time, usdhc driver can call pinctrl API to change pad
* configuration dynamically per different usdhc clock settings.
*/
clk_set_rate(&usdhc1_clk, 49500000);
clk_set_rate(&usdhc2_clk, 49500000);
clk_set_rate(&usdhc3_clk, 49500000);
clk_set_rate(&usdhc4_clk, 49500000);
np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");
base = of_iomap(np, 0);
WARN_ON(!base);

2
arch/arm/mach-msm/Makefile
View File

@ -15,6 +15,8 @@ obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o
obj-$(CONFIG_MSM_SMD) += last_radio_log.o
obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.o
CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1)
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
obj-$(CONFIG_SMP) += headsmp.o platsmp.o

4
arch/arm/mach-msm/board-msm7x30.c
View File

@ -42,8 +42,8 @@
extern struct sys_timer msm_timer;
static void __init msm7x30_fixup(struct machine_desc *desc, struct tag *tag,
char **cmdline, struct meminfo *mi)
static void __init msm7x30_fixup(struct tag *tag, char **cmdline,
struct meminfo *mi)
{
for (; tag->hdr.size; tag = tag_next(tag))
if (tag->hdr.tag == ATAG_MEM && tag->u.mem.start == 0x200000) {

4
arch/arm/mach-msm/board-msm8960.c
View File

@ -32,8 +32,8 @@
#include "devices.h"
static void __init msm8960_fixup(struct machine_desc *desc, struct tag *tag,
char **cmdline, struct meminfo *mi)
static void __init msm8960_fixup(struct tag *tag, char **cmdline,
struct meminfo *mi)
{
for (; tag->hdr.size; tag = tag_next(tag))
if (tag->hdr.tag == ATAG_MEM &&

4
arch/arm/mach-msm/board-msm8x60.c
View File

@ -28,8 +28,8 @@
#include <mach/board.h>
#include <mach/msm_iomap.h>
static void __init msm8x60_fixup(struct machine_desc *desc, struct tag *tag,
char **cmdline, struct meminfo *mi)
static void __init msm8x60_fixup(struct tag *tag, char **cmdline,
struct meminfo *mi)
{
for (; tag->hdr.size; tag = tag_next(tag))
if (tag->hdr.tag == ATAG_MEM &&

3
arch/arm/mach-msm/scm.c
View File

@ -180,6 +180,9 @@ static u32 smc(u32 cmd_addr)
__asmeq("%1", "r0")
__asmeq("%2", "r1")
__asmeq("%3", "r2")
#ifdef REQUIRES_SEC
".arch_extension sec\n"
#endif
"smc #0 @ switch to secure world\n"
: "=r" (r0)
: "r" (r0), "r" (r1), "r" (r2)

6
arch/arm/mach-mx5/clock-mx51-mx53.c
View File

@ -1281,9 +1281,9 @@ DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET,
NULL, NULL, &ipg_clk, &gpt_ipg_clk);
DEFINE_CLOCK(pwm1_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG6_OFFSET,
NULL, NULL, &ipg_clk, NULL);
NULL, NULL, &ipg_perclk, NULL);
DEFINE_CLOCK(pwm2_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG8_OFFSET,
NULL, NULL, &ipg_clk, NULL);
NULL, NULL, &ipg_perclk, NULL);
/* I2C */
DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET,
@ -1634,6 +1634,7 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
return 0;
}
#ifdef CONFIG_OF
static void __init clk_get_freq_dt(unsigned long *ckil, unsigned long *osc,
unsigned long *ckih1, unsigned long *ckih2)
{
@ -1671,3 +1672,4 @@ int __init mx53_clocks_init_dt(void)
clk_get_freq_dt(&ckil, &osc, &ckih1, &ckih2);
return mx53_clocks_init(ckil, osc, ckih1, ckih2);
}
#endif

4
arch/arm/mach-mxs/mach-mx28evk.c
View File

@ -471,7 +471,8 @@ static void __init mx28evk_init(void)
"mmc0-slot-power");
if (ret)
pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret);
mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]);
else
mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]);
ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW,
"mmc1-slot-power");
@ -480,7 +481,6 @@ static void __init mx28evk_init(void)
else
mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
mx28_add_rtc_stmp3xxx();
gpio_led_register_device(0, &mx28evk_led_data);

2
arch/arm/mach-picoxcell/include/mach/debug-macro.S
View File

@ -14,7 +14,7 @@
#define UART_SHIFT 2
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldr \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE)
ldr \rp, =PICOXCELL_UART1_BASE
.endm

2
arch/arm/mach-shmobile/Makefile
View File

@ -3,7 +3,7 @@
#
# Common objects
obj-y := timer.o console.o clock.o pm_runtime.o
obj-y := timer.o console.o clock.o
# CPU objects
obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o

16
arch/arm/mach-shmobile/board-ag5evm.c
View File

@ -515,14 +515,14 @@ static void __init ag5evm_init(void)
/* enable MMCIF */
gpio_request(GPIO_FN_MMCCLK0, NULL);
gpio_request(GPIO_FN_MMCCMD0_PU, NULL);
gpio_request(GPIO_FN_MMCD0_0, NULL);
gpio_request(GPIO_FN_MMCD0_1, NULL);
gpio_request(GPIO_FN_MMCD0_2, NULL);
gpio_request(GPIO_FN_MMCD0_3, NULL);
gpio_request(GPIO_FN_MMCD0_4, NULL);
gpio_request(GPIO_FN_MMCD0_5, NULL);
gpio_request(GPIO_FN_MMCD0_6, NULL);
gpio_request(GPIO_FN_MMCD0_7, NULL);
gpio_request(GPIO_FN_MMCD0_0_PU, NULL);
gpio_request(GPIO_FN_MMCD0_1_PU, NULL);
gpio_request(GPIO_FN_MMCD0_2_PU, NULL);
gpio_request(GPIO_FN_MMCD0_3_PU, NULL);
gpio_request(GPIO_FN_MMCD0_4_PU, NULL);
gpio_request(GPIO_FN_MMCD0_5_PU, NULL);
gpio_request(GPIO_FN_MMCD0_6_PU, NULL);
gpio_request(GPIO_FN_MMCD0_7_PU, NULL);
gpio_request(GPIO_PORT208, NULL); /* Reset */
gpio_direction_output(GPIO_PORT208, 1);

2
arch/arm/mach-shmobile/board-ap4evb.c
View File

@ -201,7 +201,7 @@ static struct physmap_flash_data nor_flash_data = {
static struct resource nor_flash_resources[] = {
[0] = {
.start = 0x20000000, /* CS0 shadow instead of regular CS0 */
.end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
.end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
.flags = IORESOURCE_MEM,
}
};

7
arch/arm/mach-shmobile/board-kota2.c
View File

@ -48,6 +48,7 @@
#include <asm/hardware/cache-l2x0.h>
#include <asm/traps.h>
/* SMSC 9220 */
static struct resource smsc9220_resources[] = {
[0] = {
.start = 0x14000000, /* CS5A */
@ -77,6 +78,7 @@ static struct platform_device eth_device = {
.num_resources = ARRAY_SIZE(smsc9220_resources),
};
/* KEYSC */
static struct sh_keysc_info keysc_platdata = {
.mode = SH_KEYSC_MODE_6,
.scan_timing = 3,
@ -120,6 +122,7 @@ static struct platform_device keysc_device = {
},
};
/* GPIO KEY */
#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 }
static struct gpio_keys_button gpio_buttons[] = {
@ -150,6 +153,7 @@ static struct platform_device gpio_keys_device = {
},
};
/* GPIO LED */
#define GPIO_LED(n, g) { .name = n, .gpio = g }
static struct gpio_led gpio_leds[] = {
@ -175,6 +179,7 @@ static struct platform_device gpio_leds_device = {
},
};
/* MMCIF */
static struct resource mmcif_resources[] = {
[0] = {
.name = "MMCIF",
@ -207,6 +212,7 @@ static struct platform_device mmcif_device = {
.resource = mmcif_resources,
};
/* SDHI0 */
static struct sh_mobile_sdhi_info sdhi0_info = {
.tmio_caps = MMC_CAP_SD_HIGHSPEED,
.tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
@ -243,6 +249,7 @@ static struct platform_device sdhi0_device = {
},
};
/* SDHI1 */
static struct sh_mobile_sdhi_info sdhi1_info = {
.tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ,
.tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,

8
arch/arm/mach-shmobile/clock-sh7372.c
View File

@ -476,7 +476,7 @@ static struct clk_ops fsidiv_clk_ops = {
.disable = fsidiv_disable,
};
static struct clk_mapping sh7372_fsidiva_clk_mapping = {
static struct clk_mapping fsidiva_clk_mapping = {
.phys = FSIDIVA,
.len = 8,
};
@ -484,10 +484,10 @@ static struct clk_mapping sh7372_fsidiva_clk_mapping = {
struct clk sh7372_fsidiva_clk = {
.ops = &fsidiv_clk_ops,
.parent = &div6_reparent_clks[DIV6_FSIA], /* late install */
.mapping = &sh7372_fsidiva_clk_mapping,
.mapping = &fsidiva_clk_mapping,
};
static struct clk_mapping sh7372_fsidivb_clk_mapping = {
static struct clk_mapping fsidivb_clk_mapping = {
.phys = FSIDIVB,
.len = 8,
};
@ -495,7 +495,7 @@ static struct clk_mapping sh7372_fsidivb_clk_mapping = {
struct clk sh7372_fsidivb_clk = {
.ops = &fsidiv_clk_ops,
.parent = &div6_reparent_clks[DIV6_FSIB], /* late install */
.mapping = &sh7372_fsidivb_clk_mapping,
.mapping = &fsidivb_clk_mapping,
};
static struct clk *late_main_clks[] = {

52
arch/arm/mach-shmobile/cpuidle.c
View File

@ -26,65 +26,59 @@ void (*shmobile_cpuidle_modes[CPUIDLE_STATE_MAX])(void) = {
};
static int shmobile_cpuidle_enter(struct cpuidle_device *dev,
struct cpuidle_state *state)
struct cpuidle_driver *drv,
int index)
{
ktime_t before, after;
int requested_state = state - &dev->states[0];
dev->last_state = &dev->states[requested_state];
before = ktime_get();
local_irq_disable();
local_fiq_disable();
shmobile_cpuidle_modes[requested_state]();
shmobile_cpuidle_modes[index]();
local_irq_enable();
local_fiq_enable();
after = ktime_get();
return ktime_to_ns(ktime_sub(after, before)) >> 10;
dev->last_residency = ktime_to_ns(ktime_sub(after, before)) >> 10;
return index;
}
static struct cpuidle_device shmobile_cpuidle_dev;
static struct cpuidle_driver shmobile_cpuidle_driver = {
.name = "shmobile_cpuidle",
.owner = THIS_MODULE,
.states[0] = {
.name = "C1",
.desc = "WFI",
.exit_latency = 1,
.target_residency = 1 * 2,
.flags = CPUIDLE_FLAG_TIME_VALID,
},
.safe_state_index = 0, /* C1 */
.state_count = 1,
};
void (*shmobile_cpuidle_setup)(struct cpuidle_device *dev);
void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv);
static int shmobile_cpuidle_init(void)
{
struct cpuidle_device *dev = &shmobile_cpuidle_dev;
struct cpuidle_state *state;
struct cpuidle_driver *drv = &shmobile_cpuidle_driver;
int i;
cpuidle_register_driver(&shmobile_cpuidle_driver);
for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
dev->states[i].name[0] = '\0';
dev->states[i].desc[0] = '\0';
dev->states[i].enter = shmobile_cpuidle_enter;
}
i = CPUIDLE_DRIVER_STATE_START;
state = &dev->states[i++];
snprintf(state->name, CPUIDLE_NAME_LEN, "C1");
strncpy(state->desc, "WFI", CPUIDLE_DESC_LEN);
state->exit_latency = 1;
state->target_residency = 1 * 2;
state->power_usage = 3;
state->flags = 0;
state->flags |= CPUIDLE_FLAG_TIME_VALID;
dev->safe_state = state;
dev->state_count = i;
for (i = 0; i < CPUIDLE_STATE_MAX; i++)
drv->states[i].enter = shmobile_cpuidle_enter;
if (shmobile_cpuidle_setup)
shmobile_cpuidle_setup(dev);
shmobile_cpuidle_setup(drv);
cpuidle_register_driver(drv);
dev->state_count = drv->state_count;
cpuidle_register_device(dev);
return 0;

4
arch/arm/mach-shmobile/include/mach/common.h
View File

@ -9,9 +9,9 @@ extern int clk_init(void);
extern void shmobile_handle_irq_intc(struct pt_regs *);
extern void shmobile_handle_irq_gic(struct pt_regs *);
extern struct platform_suspend_ops shmobile_suspend_ops;
struct cpuidle_device;
struct cpuidle_driver;
extern void (*shmobile_cpuidle_modes[])(void);
extern void (*shmobile_cpuidle_setup)(struct cpuidle_device *dev);
extern void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv);
extern void sh7367_init_irq(void);
extern void sh7367_add_early_devices(void);

8
arch/arm/mach-shmobile/include/mach/sh73a0.h
View File

@ -470,6 +470,14 @@ enum {
GPIO_FN_SDHICMD2_PU,
GPIO_FN_MMCCMD0_PU,
GPIO_FN_MMCCMD1_PU,
GPIO_FN_MMCD0_0_PU,
GPIO_FN_MMCD0_1_PU,
GPIO_FN_MMCD0_2_PU,
GPIO_FN_MMCD0_3_PU,
GPIO_FN_MMCD0_4_PU,
GPIO_FN_MMCD0_5_PU,
GPIO_FN_MMCD0_6_PU,
GPIO_FN_MMCD0_7_PU,
GPIO_FN_FSIACK_PU,
GPIO_FN_FSIAILR_PU,
GPIO_FN_FSIAIBT_PU,

122
arch/arm/mach-shmobile/pfc-sh7367.c
View File

@ -21,68 +21,49 @@
#include <linux/gpio.h>
#include <mach/sh7367.h>
#define _1(fn, pfx, sfx) fn(pfx, sfx)
#define _10(fn, pfx, sfx) \
_1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \
_1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \
_1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \
_1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \
_1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
#define _90(fn, pfx, sfx) \
_10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx), \
_10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx), \
_10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx), \
_10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx), \
_10(fn, pfx##9, sfx)
#define _273(fn, pfx, sfx) \
_10(fn, pfx, sfx), _90(fn, pfx, sfx), \
_10(fn, pfx##10, sfx), _90(fn, pfx##1, sfx), \
_10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx), \
_10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx), \
_10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx), \
_10(fn, pfx##26, sfx), _1(fn, pfx##270, sfx), \
_1(fn, pfx##271, sfx), _1(fn, pfx##272, sfx)
#define _PORT(pfx, sfx) pfx##_##sfx
#define PORT_273(str) _273(_PORT, PORT, str)
#define CPU_ALL_PORT(fn, pfx, sfx) \
PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
PORT_10(fn, pfx##10, sfx), PORT_90(fn, pfx##1, sfx), \
PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \
PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \
PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \
PORT_10(fn, pfx##26, sfx), PORT_1(fn, pfx##270, sfx), \
PORT_1(fn, pfx##271, sfx), PORT_1(fn, pfx##272, sfx)
enum {
PINMUX_RESERVED = 0,
PINMUX_DATA_BEGIN,
PORT_273(DATA), /* PORT0_DATA -> PORT272_DATA */
PORT_ALL(DATA), /* PORT0_DATA -> PORT272_DATA */
PINMUX_DATA_END,
PINMUX_INPUT_BEGIN,
PORT_273(IN), /* PORT0_IN -> PORT272_IN */
PORT_ALL(IN), /* PORT0_IN -> PORT272_IN */
PINMUX_INPUT_END,
PINMUX_INPUT_PULLUP_BEGIN,
PORT_273(IN_PU), /* PORT0_IN_PU -> PORT272_IN_PU */
PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT272_IN_PU */
PINMUX_INPUT_PULLUP_END,
PINMUX_INPUT_PULLDOWN_BEGIN,
PORT_273(IN_PD), /* PORT0_IN_PD -> PORT272_IN_PD */
PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT272_IN_PD */
PINMUX_INPUT_PULLDOWN_END,
PINMUX_OUTPUT_BEGIN,
PORT_273(OUT), /* PORT0_OUT -> PORT272_OUT */
PORT_ALL(OUT), /* PORT0_OUT -> PORT272_OUT */
PINMUX_OUTPUT_END,
PINMUX_FUNCTION_BEGIN,
PORT_273(FN_IN), /* PORT0_FN_IN -> PORT272_FN_IN */
PORT_273(FN_OUT), /* PORT0_FN_OUT -> PORT272_FN_OUT */
PORT_273(FN0), /* PORT0_FN0 -> PORT272_FN0 */
PORT_273(FN1), /* PORT0_FN1 -> PORT272_FN1 */
PORT_273(FN2), /* PORT0_FN2 -> PORT272_FN2 */
PORT_273(FN3), /* PORT0_FN3 -> PORT272_FN3 */
PORT_273(FN4), /* PORT0_FN4 -> PORT272_FN4 */
PORT_273(FN5), /* PORT0_FN5 -> PORT272_FN5 */
PORT_273(FN6), /* PORT0_FN6 -> PORT272_FN6 */
PORT_273(FN7), /* PORT0_FN7 -> PORT272_FN7 */
PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT272_FN_IN */
PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT272_FN_OUT */
PORT_ALL(FN0), /* PORT0_FN0 -> PORT272_FN0 */
PORT_ALL(FN1), /* PORT0_FN1 -> PORT272_FN1 */
PORT_ALL(FN2), /* PORT0_FN2 -> PORT272_FN2 */
PORT_ALL(FN3), /* PORT0_FN3 -> PORT272_FN3 */
PORT_ALL(FN4), /* PORT0_FN4 -> PORT272_FN4 */
PORT_ALL(FN5), /* PORT0_FN5 -> PORT272_FN5 */
PORT_ALL(FN6), /* PORT0_FN6 -> PORT272_FN6 */
PORT_ALL(FN7), /* PORT0_FN7 -> PORT272_FN7 */
MSELBCR_MSEL2_1, MSELBCR_MSEL2_0,
PINMUX_FUNCTION_END,
@ -327,41 +308,6 @@ enum {
PINMUX_MARK_END,
};
#define PORT_DATA_I(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
#define PORT_DATA_I_PD(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_IN, PORT##nr##_IN_PD)
#define PORT_DATA_I_PU(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_IN, PORT##nr##_IN_PU)
#define PORT_DATA_I_PU_PD(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
#define PORT_DATA_O(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
#define PORT_DATA_IO(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
PORT##nr##_IN)
#define PORT_DATA_IO_PD(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
PORT##nr##_IN, PORT##nr##_IN_PD)
#define PORT_DATA_IO_PU(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
PORT##nr##_IN, PORT##nr##_IN_PU)
#define PORT_DATA_IO_PU_PD(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
static pinmux_enum_t pinmux_data[] = {
/* specify valid pin states for each pin in GPIO mode */
@ -1098,13 +1044,9 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_DATA(DIVLOCK_MARK, PORT272_FN1),
};
#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
#define GPIO_PORT_273() _273(_GPIO_PORT, , unused)
#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
static struct pinmux_gpio pinmux_gpios[] = {
/* 49-1 -> 49-6 (GPIO) */
GPIO_PORT_273(),
GPIO_PORT_ALL(),
/* Special Pull-up / Pull-down Functions */
GPIO_FN(PORT48_KEYIN0_PU), GPIO_FN(PORT49_KEYIN1_PU),
@ -1345,22 +1287,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
GPIO_FN(DIVLOCK),
};
/* helper for top 4 bits in PORTnCR */
#define PCRH(in, in_pd, in_pu, out) \
0, (out), (in), 0, \
0, 0, 0, 0, \
0, 0, (in_pd), 0, \
0, 0, (in_pu), 0
#define PORTCR(nr, reg) \
{ PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
PORT##nr##_IN_PU, PORT##nr##_OUT), \
PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
PORT##nr##_FN6, PORT##nr##_FN7 } \
}
static struct pinmux_cfg_reg pinmux_config_regs[] = {
PORTCR(0, 0xe6050000), /* PORT0CR */
PORTCR(1, 0xe6050001), /* PORT1CR */

224
arch/arm/mach-shmobile/pfc-sh7372.c
View File

@ -25,27 +25,13 @@
#include <linux/gpio.h>
#include <mach/sh7372.h>
#define _1(fn, pfx, sfx) fn(pfx, sfx)
#define _10(fn, pfx, sfx) \
_1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \
_1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \
_1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \
_1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \
_1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
#define _80(fn, pfx, sfx) \
_10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx), \
_10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx), \
_10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx), \
_10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx)
#define _190(fn, pfx, sfx) \
_10(fn, pfx, sfx), _80(fn, pfx, sfx), _10(fn, pfx##9, sfx), \
_10(fn, pfx##10, sfx), _80(fn, pfx##1, sfx), _1(fn, pfx##190, sfx)
#define _PORT(pfx, sfx) pfx##_##sfx
#define PORT_ALL(str) _190(_PORT, PORT, str)
#define CPU_ALL_PORT(fn, pfx, sfx) \
PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
PORT_10(fn, pfx##10, sfx), PORT_10(fn, pfx##11, sfx), \
PORT_10(fn, pfx##12, sfx), PORT_10(fn, pfx##13, sfx), \
PORT_10(fn, pfx##14, sfx), PORT_10(fn, pfx##15, sfx), \
PORT_10(fn, pfx##16, sfx), PORT_10(fn, pfx##17, sfx), \
PORT_10(fn, pfx##18, sfx), PORT_1(fn, pfx##190, sfx)
enum {
PINMUX_RESERVED = 0,
@ -381,108 +367,124 @@ enum {
PINMUX_MARK_END,
};
/* PORT_DATA_I_PD(nr) */
#define _I___D(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_IN, PORT##nr##_IN_PD)
/* PORT_DATA_I_PU(nr) */
#define _I__U_(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_IN, PORT##nr##_IN_PU)
/* PORT_DATA_I_PU_PD(nr) */
#define _I__UD(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
/* PORT_DATA_O(nr) */
#define __O___(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
/* PORT_DATA_IO(nr) */
#define _IO___(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
PORT##nr##_IN)
/* PORT_DATA_IO_PD(nr) */
#define _IO__D(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
PORT##nr##_IN, PORT##nr##_IN_PD)
/* PORT_DATA_IO_PU(nr) */
#define _IO_U_(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
PORT##nr##_IN, PORT##nr##_IN_PU)
/* PORT_DATA_IO_PU_PD(nr) */
#define _IO_UD(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
static pinmux_enum_t pinmux_data[] = {
/* specify valid pin states for each pin in GPIO mode */
PORT_DATA_IO_PD(0), PORT_DATA_IO_PD(1),
PORT_DATA_O(2), PORT_DATA_I_PD(3),
PORT_DATA_I_PD(4), PORT_DATA_I_PD(5),
PORT_DATA_IO_PU_PD(6), PORT_DATA_I_PD(7),
PORT_DATA_IO_PD(8), PORT_DATA_O(9),
_IO__D(0), _IO__D(1), __O___(2), _I___D(3), _I___D(4),
_I___D(5), _IO_UD(6), _I___D(7), _IO__D(8), __O___(9),
PORT_DATA_O(10), PORT_DATA_O(11),
PORT_DATA_IO_PU_PD(12), PORT_DATA_IO_PD(13),
PORT_DATA_IO_PD(14), PORT_DATA_O(15),
PORT_DATA_IO_PD(16), PORT_DATA_IO_PD(17),
PORT_DATA_I_PD(18), PORT_DATA_IO(19),
__O___(10), __O___(11), _IO_UD(12), _IO__D(13), _IO__D(14),
__O___(15), _IO__D(16), _IO__D(17), _I___D(18), _IO___(19),
PORT_DATA_IO(20), PORT_DATA_IO(21),
PORT_DATA_IO(22), PORT_DATA_IO(23),
PORT_DATA_IO(24), PORT_DATA_IO(25),
PORT_DATA_IO(26), PORT_DATA_IO(27),
PORT_DATA_IO(28), PORT_DATA_IO(29),
_IO___(20), _IO___(21), _IO___(22), _IO___(23), _IO___(24),
_IO___(25), _IO___(26), _IO___(27), _IO___(28), _IO___(29),
PORT_DATA_IO(30), PORT_DATA_IO(31),
PORT_DATA_IO(32), PORT_DATA_IO(33),
PORT_DATA_IO(34), PORT_DATA_IO(35),
PORT_DATA_IO(36), PORT_DATA_IO(37),
PORT_DATA_IO(38), PORT_DATA_IO(39),
_IO___(30), _IO___(31), _IO___(32), _IO___(33), _IO___(34),
_IO___(35), _IO___(36), _IO___(37), _IO___(38), _IO___(39),
PORT_DATA_IO(40), PORT_DATA_IO(41),
PORT_DATA_IO(42), PORT_DATA_IO(43),
PORT_DATA_IO(44), PORT_DATA_IO(45),
PORT_DATA_IO_PU(46), PORT_DATA_IO_PU(47),
PORT_DATA_IO_PU(48), PORT_DATA_IO_PU(49),
_IO___(40), _IO___(41), _IO___(42), _IO___(43), _IO___(44),
_IO___(45), _IO_U_(46), _IO_U_(47), _IO_U_(48), _IO_U_(49),
PORT_DATA_IO_PU(50), PORT_DATA_IO_PU(51),
PORT_DATA_IO_PU(52), PORT_DATA_IO_PU(53),
PORT_DATA_IO_PU(54), PORT_DATA_IO_PU(55),
PORT_DATA_IO_PU(56), PORT_DATA_IO_PU(57),
PORT_DATA_IO_PU(58), PORT_DATA_IO_PU(59),
_IO_U_(50), _IO_U_(51), _IO_U_(52), _IO_U_(53), _IO_U_(54),
_IO_U_(55), _IO_U_(56), _IO_U_(57), _IO_U_(58), _IO_U_(59),
PORT_DATA_IO_PU(60), PORT_DATA_IO_PU(61),
PORT_DATA_IO(62), PORT_DATA_O(63),
PORT_DATA_O(64), PORT_DATA_IO_PU(65),
PORT_DATA_O(66), PORT_DATA_IO_PU(67), /*66?*/
PORT_DATA_O(68), PORT_DATA_IO(69),
_IO_U_(60), _IO_U_(61), _IO___(62), __O___(63), __O___(64),
_IO_U_(65), __O___(66), _IO_U_(67), __O___(68), _IO___(69), /*66?*/
PORT_DATA_IO(70), PORT_DATA_IO(71),
PORT_DATA_O(72), PORT_DATA_I_PU(73),
PORT_DATA_I_PU_PD(74), PORT_DATA_IO_PU_PD(75),
PORT_DATA_IO_PU_PD(76), PORT_DATA_IO_PU_PD(77),
PORT_DATA_IO_PU_PD(78), PORT_DATA_IO_PU_PD(79),
_IO___(70), _IO___(71), __O___(72), _I__U_(73), _I__UD(74),
_IO_UD(75), _IO_UD(76), _IO_UD(77), _IO_UD(78), _IO_UD(79),
PORT_DATA_IO_PU_PD(80), PORT_DATA_IO_PU_PD(81),
PORT_DATA_IO_PU_PD(82), PORT_DATA_IO_PU_PD(83),
PORT_DATA_IO_PU_PD(84), PORT_DATA_IO_PU_PD(85),
PORT_DATA_IO_PU_PD(86), PORT_DATA_IO_PU_PD(87),
PORT_DATA_IO_PU_PD(88), PORT_DATA_IO_PU_PD(89),
_IO_UD(80), _IO_UD(81), _IO_UD(82), _IO_UD(83), _IO_UD(84),
_IO_UD(85), _IO_UD(86), _IO_UD(87), _IO_UD(88), _IO_UD(89),
PORT_DATA_IO_PU_PD(90), PORT_DATA_IO_PU_PD(91),
PORT_DATA_IO_PU_PD(92), PORT_DATA_IO_PU_PD(93),
PORT_DATA_IO_PU_PD(94), PORT_DATA_IO_PU_PD(95),
PORT_DATA_IO_PU(96), PORT_DATA_IO_PU_PD(97),
PORT_DATA_IO_PU_PD(98), PORT_DATA_O(99), /*99?*/
_IO_UD(90), _IO_UD(91), _IO_UD(92), _IO_UD(93), _IO_UD(94),
_IO_UD(95), _IO_U_(96), _IO_UD(97), _IO_UD(98), __O___(99), /*99?*/
PORT_DATA_IO_PD(100), PORT_DATA_IO_PD(101),
PORT_DATA_IO_PD(102), PORT_DATA_IO_PD(103),
PORT_DATA_IO_PD(104), PORT_DATA_IO_PD(105),
PORT_DATA_IO_PU(106), PORT_DATA_IO_PU(107),
PORT_DATA_IO_PU(108), PORT_DATA_IO_PU(109),
_IO__D(100), _IO__D(101), _IO__D(102), _IO__D(103), _IO__D(104),
_IO__D(105), _IO_U_(106), _IO_U_(107), _IO_U_(108), _IO_U_(109),
PORT_DATA_IO_PU(110), PORT_DATA_IO_PU(111),
PORT_DATA_IO_PD(112), PORT_DATA_IO_PD(113),
PORT_DATA_IO_PU(114), PORT_DATA_IO_PU(115),
PORT_DATA_IO_PU(116), PORT_DATA_IO_PU(117),
PORT_DATA_IO_PU(118), PORT_DATA_IO_PU(119),
_IO_U_(110), _IO_U_(111), _IO__D(112), _IO__D(113), _IO_U_(114),
_IO_U_(115), _IO_U_(116), _IO_U_(117), _IO_U_(118), _IO_U_(119),
PORT_DATA_IO_PU(120), PORT_DATA_IO_PD(121),
PORT_DATA_IO_PD(122), PORT_DATA_IO_PD(123),
PORT_DATA_IO_PD(124), PORT_DATA_IO_PD(125),
PORT_DATA_IO_PD(126), PORT_DATA_IO_PD(127),
PORT_DATA_IO_PD(128), PORT_DATA_IO_PU_PD(129),
_IO_U_(120), _IO__D(121), _IO__D(122), _IO__D(123), _IO__D(124),
_IO__D(125), _IO__D(126), _IO__D(127), _IO__D(128), _IO_UD(129),
PORT_DATA_IO_PU_PD(130), PORT_DATA_IO_PU_PD(131),
PORT_DATA_IO_PU_PD(132), PORT_DATA_IO_PU_PD(133),
PORT_DATA_IO_PU_PD(134), PORT_DATA_IO_PU_PD(135),
PORT_DATA_IO_PD(136), PORT_DATA_IO_PD(137),
PORT_DATA_IO_PD(138), PORT_DATA_IO_PD(139),
_IO_UD(130), _IO_UD(131), _IO_UD(132), _IO_UD(133), _IO_UD(134),
_IO_UD(135), _IO__D(136), _IO__D(137), _IO__D(138), _IO__D(139),
PORT_DATA_IO_PD(140), PORT_DATA_IO_PD(141),
PORT_DATA_IO_PD(142), PORT_DATA_IO_PU_PD(143),
PORT_DATA_IO_PD(144), PORT_DATA_IO_PD(145),
PORT_DATA_IO_PD(146), PORT_DATA_IO_PD(147),
PORT_DATA_IO_PD(148), PORT_DATA_IO_PD(149),
_IO__D(140), _IO__D(141), _IO__D(142), _IO_UD(143), _IO__D(144),
_IO__D(145), _IO__D(146), _IO__D(147), _IO__D(148), _IO__D(149),
PORT_DATA_IO_PD(150), PORT_DATA_IO_PD(151),
PORT_DATA_IO_PU_PD(152), PORT_DATA_I_PD(153),
PORT_DATA_IO_PU_PD(154), PORT_DATA_I_PD(155),
PORT_DATA_IO_PD(156), PORT_DATA_IO_PD(157),
PORT_DATA_I_PD(158), PORT_DATA_IO_PD(159),
_IO__D(150), _IO__D(151), _IO_UD(152), _I___D(153), _IO_UD(154),
_I___D(155), _IO__D(156), _IO__D(157), _I___D(158), _IO__D(159),
PORT_DATA_O(160), PORT_DATA_IO_PD(161),
PORT_DATA_IO_PD(162), PORT_DATA_IO_PD(163),
PORT_DATA_I_PD(164), PORT_DATA_IO_PD(165),
PORT_DATA_I_PD(166), PORT_DATA_I_PD(167),
PORT_DATA_I_PD(168), PORT_DATA_I_PD(169),
__O___(160), _IO__D(161), _IO__D(162), _IO__D(163), _I___D(164),
_IO__D(165), _I___D(166), _I___D(167), _I___D(168), _I___D(169),
PORT_DATA_I_PD(170), PORT_DATA_O(171),
PORT_DATA_IO_PU_PD(172), PORT_DATA_IO_PU_PD(173),
PORT_DATA_IO_PU_PD(174), PORT_DATA_IO_PU_PD(175),
PORT_DATA_IO_PU_PD(176), PORT_DATA_IO_PU_PD(177),
PORT_DATA_IO_PU_PD(178), PORT_DATA_O(179),
_I___D(170), __O___(171), _IO_UD(172), _IO_UD(173), _IO_UD(174),
_IO_UD(175), _IO_UD(176), _IO_UD(177), _IO_UD(178), __O___(179),
PORT_DATA_IO_PU_PD(180), PORT_DATA_IO_PU_PD(181),
PORT_DATA_IO_PU_PD(182), PORT_DATA_IO_PU_PD(183),
PORT_DATA_IO_PU_PD(184), PORT_DATA_O(185),
PORT_DATA_IO_PU_PD(186), PORT_DATA_IO_PU_PD(187),
PORT_DATA_IO_PU_PD(188), PORT_DATA_IO_PU_PD(189),
_IO_UD(180), _IO_UD(181), _IO_UD(182), _IO_UD(183), _IO_UD(184),
__O___(185), _IO_UD(186), _IO_UD(187), _IO_UD(188), _IO_UD(189),
_IO_UD(190),
PORT_DATA_IO_PU_PD(190),
/* IRQ */
PINMUX_DATA(IRQ0_6_MARK, PORT6_FN0, MSEL1CR_0_0),
@ -926,10 +928,6 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_DATA(MFIv4_MARK, MSEL4CR_6_1),
};
#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
#define GPIO_PORT_ALL() _190(_GPIO_PORT, , unused)
#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
static struct pinmux_gpio pinmux_gpios[] = {
/* PORT */
@ -1201,22 +1199,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
GPIO_FN(SDENC_DV_CLKI),
};
/* helper for top 4 bits in PORTnCR */
#define PCRH(in, in_pd, in_pu, out) \
0, (out), (in), 0, \
0, 0, 0, 0, \
0, 0, (in_pd), 0, \
0, 0, (in_pu), 0
#define PORTCR(nr, reg) \
{ PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
PORT##nr##_IN_PU, PORT##nr##_OUT), \
PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
PORT##nr##_FN6, PORT##nr##_FN7 } \
}
static struct pinmux_cfg_reg pinmux_config_regs[] = {
PORTCR(0, 0xE6051000), /* PORT0CR */
PORTCR(1, 0xE6051001), /* PORT1CR */

159
arch/arm/mach-shmobile/pfc-sh7377.c
View File

@ -22,84 +22,65 @@
#include <linux/gpio.h>
#include <mach/sh7377.h>
#define _1(fn, pfx, sfx) fn(pfx, sfx)
#define _10(fn, pfx, sfx) \
_1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \
_1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \
_1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \
_1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \
_1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
#define _90(fn, pfx, sfx) \
_10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx), \
_10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx), \
_10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx), \
_10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx), \
_10(fn, pfx##9, sfx)
#define _265(fn, pfx, sfx) \
_10(fn, pfx, sfx), _90(fn, pfx, sfx), \
_10(fn, pfx##10, sfx), \
_1(fn, pfx##110, sfx), _1(fn, pfx##111, sfx), \
_1(fn, pfx##112, sfx), _1(fn, pfx##113, sfx), \
_1(fn, pfx##114, sfx), _1(fn, pfx##115, sfx), \
_1(fn, pfx##116, sfx), _1(fn, pfx##117, sfx), \
_1(fn, pfx##118, sfx), \
_1(fn, pfx##128, sfx), _1(fn, pfx##129, sfx), \
_10(fn, pfx##13, sfx), _10(fn, pfx##14, sfx), \
_10(fn, pfx##15, sfx), \
_1(fn, pfx##160, sfx), _1(fn, pfx##161, sfx), \
_1(fn, pfx##162, sfx), _1(fn, pfx##163, sfx), \
_1(fn, pfx##164, sfx), \
_1(fn, pfx##192, sfx), _1(fn, pfx##193, sfx), \
_1(fn, pfx##194, sfx), _1(fn, pfx##195, sfx), \
_1(fn, pfx##196, sfx), _1(fn, pfx##197, sfx), \
_1(fn, pfx##198, sfx), _1(fn, pfx##199, sfx), \
_10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx), \
_10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx), \
_10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx), \
_1(fn, pfx##260, sfx), _1(fn, pfx##261, sfx), \
_1(fn, pfx##262, sfx), _1(fn, pfx##263, sfx), \
_1(fn, pfx##264, sfx)
#define _PORT(pfx, sfx) pfx##_##sfx
#define PORT_265(str) _265(_PORT, PORT, str)
#define CPU_ALL_PORT(fn, pfx, sfx) \
PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
PORT_10(fn, pfx##10, sfx), \
PORT_1(fn, pfx##110, sfx), PORT_1(fn, pfx##111, sfx), \
PORT_1(fn, pfx##112, sfx), PORT_1(fn, pfx##113, sfx), \
PORT_1(fn, pfx##114, sfx), PORT_1(fn, pfx##115, sfx), \
PORT_1(fn, pfx##116, sfx), PORT_1(fn, pfx##117, sfx), \
PORT_1(fn, pfx##118, sfx), \
PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx), \
PORT_10(fn, pfx##13, sfx), PORT_10(fn, pfx##14, sfx), \
PORT_10(fn, pfx##15, sfx), \
PORT_1(fn, pfx##160, sfx), PORT_1(fn, pfx##161, sfx), \
PORT_1(fn, pfx##162, sfx), PORT_1(fn, pfx##163, sfx), \
PORT_1(fn, pfx##164, sfx), \
PORT_1(fn, pfx##192, sfx), PORT_1(fn, pfx##193, sfx), \
PORT_1(fn, pfx##194, sfx), PORT_1(fn, pfx##195, sfx), \
PORT_1(fn, pfx##196, sfx), PORT_1(fn, pfx##197, sfx), \
PORT_1(fn, pfx##198, sfx), PORT_1(fn, pfx##199, sfx), \
PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \
PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \
PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \
PORT_1(fn, pfx##260, sfx), PORT_1(fn, pfx##261, sfx), \
PORT_1(fn, pfx##262, sfx), PORT_1(fn, pfx##263, sfx), \
PORT_1(fn, pfx##264, sfx)
enum {
PINMUX_RESERVED = 0,
PINMUX_DATA_BEGIN,
PORT_265(DATA), /* PORT0_DATA -> PORT264_DATA */
PORT_ALL(DATA), /* PORT0_DATA -> PORT264_DATA */
PINMUX_DATA_END,
PINMUX_INPUT_BEGIN,
PORT_265(IN), /* PORT0_IN -> PORT264_IN */
PORT_ALL(IN), /* PORT0_IN -> PORT264_IN */
PINMUX_INPUT_END,
PINMUX_INPUT_PULLUP_BEGIN,
PORT_265(IN_PU), /* PORT0_IN_PU -> PORT264_IN_PU */
PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT264_IN_PU */
PINMUX_INPUT_PULLUP_END,
PINMUX_INPUT_PULLDOWN_BEGIN,
PORT_265(IN_PD), /* PORT0_IN_PD -> PORT264_IN_PD */
PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT264_IN_PD */
PINMUX_INPUT_PULLDOWN_END,
PINMUX_OUTPUT_BEGIN,
PORT_265(OUT), /* PORT0_OUT -> PORT264_OUT */
PORT_ALL(OUT), /* PORT0_OUT -> PORT264_OUT */
PINMUX_OUTPUT_END,
PINMUX_FUNCTION_BEGIN,
PORT_265(FN_IN), /* PORT0_FN_IN -> PORT264_FN_IN */
PORT_265(FN_OUT), /* PORT0_FN_OUT -> PORT264_FN_OUT */
PORT_265(FN0), /* PORT0_FN0 -> PORT264_FN0 */
PORT_265(FN1), /* PORT0_FN1 -> PORT264_FN1 */
PORT_265(FN2), /* PORT0_FN2 -> PORT264_FN2 */
PORT_265(FN3), /* PORT0_FN3 -> PORT264_FN3 */
PORT_265(FN4), /* PORT0_FN4 -> PORT264_FN4 */
PORT_265(FN5), /* PORT0_FN5 -> PORT264_FN5 */
PORT_265(FN6), /* PORT0_FN6 -> PORT264_FN6 */
PORT_265(FN7), /* PORT0_FN7 -> PORT264_FN7 */
PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT264_FN_IN */
PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT264_FN_OUT */
PORT_ALL(FN0), /* PORT0_FN0 -> PORT264_FN0 */
PORT_ALL(FN1), /* PORT0_FN1 -> PORT264_FN1 */
PORT_ALL(FN2), /* PORT0_FN2 -> PORT264_FN2 */
PORT_ALL(FN3), /* PORT0_FN3 -> PORT264_FN3 */
PORT_ALL(FN4), /* PORT0_FN4 -> PORT264_FN4 */
PORT_ALL(FN5), /* PORT0_FN5 -> PORT264_FN5 */
PORT_ALL(FN6), /* PORT0_FN6 -> PORT264_FN6 */
PORT_ALL(FN7), /* PORT0_FN7 -> PORT264_FN7 */
MSELBCR_MSEL17_1, MSELBCR_MSEL17_0,
MSELBCR_MSEL16_1, MSELBCR_MSEL16_0,
@ -360,45 +341,6 @@ enum {
PINMUX_MARK_END,
};
#define PORT_DATA_I(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
#define PORT_DATA_I_PD(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_IN, PORT##nr##_IN_PD)
#define PORT_DATA_I_PU(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_IN, PORT##nr##_IN_PU)
#define PORT_DATA_I_PU_PD(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_IN, PORT##nr##_IN_PD, \
PORT##nr##_IN_PU)
#define PORT_DATA_O(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_OUT)
#define PORT_DATA_IO(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_OUT, PORT##nr##_IN)
#define PORT_DATA_IO_PD(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_OUT, PORT##nr##_IN, \
PORT##nr##_IN_PD)
#define PORT_DATA_IO_PU(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_OUT, PORT##nr##_IN, \
PORT##nr##_IN_PU)
#define PORT_DATA_IO_PU_PD(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_OUT, PORT##nr##_IN, \
PORT##nr##_IN_PD, PORT##nr##_IN_PU)
static pinmux_enum_t pinmux_data[] = {
/* specify valid pin states for each pin in GPIO mode */
/* 55-1 (GPIO) */
@ -1078,13 +1020,9 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_DATA(RESETOUTS_MARK, PORT264_FN1),
};
#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
#define GPIO_PORT_265() _265(_GPIO_PORT, , unused)
#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
static struct pinmux_gpio pinmux_gpios[] = {
/* 55-1 -> 55-5 (GPIO) */
GPIO_PORT_265(),
GPIO_PORT_ALL(),
/* Special Pull-up / Pull-down Functions */
GPIO_FN(PORT66_KEYIN0_PU), GPIO_FN(PORT67_KEYIN1_PU),
@ -1362,23 +1300,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
GPIO_FN(RESETOUTS),
};
/* helper for top 4 bits in PORTnCR */
#define PCRH(in, in_pd, in_pu, out) \
0, (out), (in), 0, \
0, 0, 0, 0, \
0, 0, (in_pd), 0, \
0, 0, (in_pu), 0
#define PORTCR(nr, reg) \
{ PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
PORT##nr##_IN_PU, PORT##nr##_OUT), \
PORT##nr##_FN0, PORT##nr##_FN1, \
PORT##nr##_FN2, PORT##nr##_FN3, \
PORT##nr##_FN4, PORT##nr##_FN5, \
PORT##nr##_FN6, PORT##nr##_FN7 } \
}
static struct pinmux_cfg_reg pinmux_config_regs[] = {
PORTCR(0, 0xe6050000), /* PORT0CR */
PORTCR(1, 0xe6050001), /* PORT1CR */

193
arch/arm/mach-shmobile/pfc-sh73a0.c
View File

@ -24,83 +24,71 @@
#include <mach/sh73a0.h>
#include <mach/irqs.h>
#define _1(fn, pfx, sfx) fn(pfx, sfx)
#define _10(fn, pfx, sfx) \
_1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \
_1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \
_1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \
_1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \
_1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
#define _310(fn, pfx, sfx) \
_10(fn, pfx, sfx), _10(fn, pfx##1, sfx), \
_10(fn, pfx##2, sfx), _10(fn, pfx##3, sfx), \
_10(fn, pfx##4, sfx), _10(fn, pfx##5, sfx), \
_10(fn, pfx##6, sfx), _10(fn, pfx##7, sfx), \
_10(fn, pfx##8, sfx), _10(fn, pfx##9, sfx), \
_10(fn, pfx##10, sfx), \
_1(fn, pfx##110, sfx), _1(fn, pfx##111, sfx), \
_1(fn, pfx##112, sfx), _1(fn, pfx##113, sfx), \
_1(fn, pfx##114, sfx), _1(fn, pfx##115, sfx), \
_1(fn, pfx##116, sfx), _1(fn, pfx##117, sfx), \
_1(fn, pfx##118, sfx), \
_1(fn, pfx##128, sfx), _1(fn, pfx##129, sfx), \
_10(fn, pfx##13, sfx), _10(fn, pfx##14, sfx), \
_10(fn, pfx##15, sfx), \
_1(fn, pfx##160, sfx), _1(fn, pfx##161, sfx), \
_1(fn, pfx##162, sfx), _1(fn, pfx##163, sfx), \
_1(fn, pfx##164, sfx), \
_1(fn, pfx##192, sfx), _1(fn, pfx##193, sfx), \
_1(fn, pfx##194, sfx), _1(fn, pfx##195, sfx), \
_1(fn, pfx##196, sfx), _1(fn, pfx##197, sfx), \
_1(fn, pfx##198, sfx), _1(fn, pfx##199, sfx), \
_10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx), \
_10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx), \
_10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx), \
_10(fn, pfx##26, sfx), _10(fn, pfx##27, sfx), \
_1(fn, pfx##280, sfx), _1(fn, pfx##281, sfx), \
_1(fn, pfx##282, sfx), \
_1(fn, pfx##288, sfx), _1(fn, pfx##289, sfx), \
_10(fn, pfx##29, sfx), _10(fn, pfx##30, sfx)
#define _PORT(pfx, sfx) pfx##_##sfx
#define PORT_310(str) _310(_PORT, PORT, str)
#define CPU_ALL_PORT(fn, pfx, sfx) \
PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
PORT_10(fn, pfx##2, sfx), PORT_10(fn, pfx##3, sfx), \
PORT_10(fn, pfx##4, sfx), PORT_10(fn, pfx##5, sfx), \
PORT_10(fn, pfx##6, sfx), PORT_10(fn, pfx##7, sfx), \
PORT_10(fn, pfx##8, sfx), PORT_10(fn, pfx##9, sfx), \
PORT_10(fn, pfx##10, sfx), \
PORT_1(fn, pfx##110, sfx), PORT_1(fn, pfx##111, sfx), \
PORT_1(fn, pfx##112, sfx), PORT_1(fn, pfx##113, sfx), \
PORT_1(fn, pfx##114, sfx), PORT_1(fn, pfx##115, sfx), \
PORT_1(fn, pfx##116, sfx), PORT_1(fn, pfx##117, sfx), \
PORT_1(fn, pfx##118, sfx), \
PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx), \
PORT_10(fn, pfx##13, sfx), PORT_10(fn, pfx##14, sfx), \
PORT_10(fn, pfx##15, sfx), \
PORT_1(fn, pfx##160, sfx), PORT_1(fn, pfx##161, sfx), \
PORT_1(fn, pfx##162, sfx), PORT_1(fn, pfx##163, sfx), \
PORT_1(fn, pfx##164, sfx), \
PORT_1(fn, pfx##192, sfx), PORT_1(fn, pfx##193, sfx), \
PORT_1(fn, pfx##194, sfx), PORT_1(fn, pfx##195, sfx), \
PORT_1(fn, pfx##196, sfx), PORT_1(fn, pfx##197, sfx), \
PORT_1(fn, pfx##198, sfx), PORT_1(fn, pfx##199, sfx), \
PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \
PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \
PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \
PORT_10(fn, pfx##26, sfx), PORT_10(fn, pfx##27, sfx), \
PORT_1(fn, pfx##280, sfx), PORT_1(fn, pfx##281, sfx), \
PORT_1(fn, pfx##282, sfx), \
PORT_1(fn, pfx##288, sfx), PORT_1(fn, pfx##289, sfx), \
PORT_10(fn, pfx##29, sfx), PORT_10(fn, pfx##30, sfx)
enum {
PINMUX_RESERVED = 0,
PINMUX_DATA_BEGIN,
PORT_310(DATA), /* PORT0_DATA -> PORT309_DATA */
PORT_ALL(DATA), /* PORT0_DATA -> PORT309_DATA */
PINMUX_DATA_END,
PINMUX_INPUT_BEGIN,
PORT_310(IN), /* PORT0_IN -> PORT309_IN */
PORT_ALL(IN), /* PORT0_IN -> PORT309_IN */
PINMUX_INPUT_END,
PINMUX_INPUT_PULLUP_BEGIN,
PORT_310(IN_PU), /* PORT0_IN_PU -> PORT309_IN_PU */
PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT309_IN_PU */
PINMUX_INPUT_PULLUP_END,
PINMUX_INPUT_PULLDOWN_BEGIN,
PORT_310(IN_PD), /* PORT0_IN_PD -> PORT309_IN_PD */
PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT309_IN_PD */
PINMUX_INPUT_PULLDOWN_END,
PINMUX_OUTPUT_BEGIN,
PORT_310(OUT), /* PORT0_OUT -> PORT309_OUT */
PORT_ALL(OUT), /* PORT0_OUT -> PORT309_OUT */
PINMUX_OUTPUT_END,
PINMUX_FUNCTION_BEGIN,
PORT_310(FN_IN), /* PORT0_FN_IN -> PORT309_FN_IN */
PORT_310(FN_OUT), /* PORT0_FN_OUT -> PORT309_FN_OUT */
PORT_310(FN0), /* PORT0_FN0 -> PORT309_FN0 */
PORT_310(FN1), /* PORT0_FN1 -> PORT309_FN1 */
PORT_310(FN2), /* PORT0_FN2 -> PORT309_FN2 */
PORT_310(FN3), /* PORT0_FN3 -> PORT309_FN3 */
PORT_310(FN4), /* PORT0_FN4 -> PORT309_FN4 */
PORT_310(FN5), /* PORT0_FN5 -> PORT309_FN5 */
PORT_310(FN6), /* PORT0_FN6 -> PORT309_FN6 */
PORT_310(FN7), /* PORT0_FN7 -> PORT309_FN7 */
PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT309_FN_IN */
PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT309_FN_OUT */
PORT_ALL(FN0), /* PORT0_FN0 -> PORT309_FN0 */
PORT_ALL(FN1), /* PORT0_FN1 -> PORT309_FN1 */
PORT_ALL(FN2), /* PORT0_FN2 -> PORT309_FN2 */
PORT_ALL(FN3), /* PORT0_FN3 -> PORT309_FN3 */
PORT_ALL(FN4), /* PORT0_FN4 -> PORT309_FN4 */
PORT_ALL(FN5), /* PORT0_FN5 -> PORT309_FN5 */
PORT_ALL(FN6), /* PORT0_FN6 -> PORT309_FN6 */
PORT_ALL(FN7), /* PORT0_FN7 -> PORT309_FN7 */
MSEL2CR_MSEL19_0, MSEL2CR_MSEL19_1,
MSEL2CR_MSEL18_0, MSEL2CR_MSEL18_1,
@ -508,6 +496,14 @@ enum {
SDHICMD2_PU_MARK,
MMCCMD0_PU_MARK,
MMCCMD1_PU_MARK,
MMCD0_0_PU_MARK,
MMCD0_1_PU_MARK,
MMCD0_2_PU_MARK,
MMCD0_3_PU_MARK,
MMCD0_4_PU_MARK,
MMCD0_5_PU_MARK,
MMCD0_6_PU_MARK,
MMCD0_7_PU_MARK,
FSIBISLD_PU_MARK,
FSIACK_PU_MARK,
FSIAILR_PU_MARK,
@ -517,45 +513,6 @@ enum {
PINMUX_MARK_END,
};
#define PORT_DATA_I(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
#define PORT_DATA_I_PD(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_IN, PORT##nr##_IN_PD)
#define PORT_DATA_I_PU(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_IN, PORT##nr##_IN_PU)
#define PORT_DATA_I_PU_PD(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_IN, PORT##nr##_IN_PD, \
PORT##nr##_IN_PU)
#define PORT_DATA_O(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_OUT)
#define PORT_DATA_IO(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_OUT, PORT##nr##_IN)
#define PORT_DATA_IO_PD(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_OUT, PORT##nr##_IN, \
PORT##nr##_IN_PD)
#define PORT_DATA_IO_PU(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_OUT, PORT##nr##_IN, \
PORT##nr##_IN_PU)
#define PORT_DATA_IO_PU_PD(nr) \
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
PORT##nr##_OUT, PORT##nr##_IN, \
PORT##nr##_IN_PD, PORT##nr##_IN_PU)
static pinmux_enum_t pinmux_data[] = {
/* specify valid pin states for each pin in GPIO mode */
@ -1561,6 +1518,24 @@ static pinmux_enum_t pinmux_data[] = {
MSEL4CR_MSEL15_0),
PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT297_IN_PU,
MSEL4CR_MSEL15_1),
PINMUX_DATA(MMCD0_0_PU_MARK,
PORT271_FN1, PORT271_IN_PU, MSEL4CR_MSEL15_0),
PINMUX_DATA(MMCD0_1_PU_MARK,
PORT272_FN1, PORT272_IN_PU, MSEL4CR_MSEL15_0),
PINMUX_DATA(MMCD0_2_PU_MARK,
PORT273_FN1, PORT273_IN_PU, MSEL4CR_MSEL15_0),
PINMUX_DATA(MMCD0_3_PU_MARK,
PORT274_FN1, PORT274_IN_PU, MSEL4CR_MSEL15_0),
PINMUX_DATA(MMCD0_4_PU_MARK,
PORT275_FN1, PORT275_IN_PU, MSEL4CR_MSEL15_0),
PINMUX_DATA(MMCD0_5_PU_MARK,
PORT276_FN1, PORT276_IN_PU, MSEL4CR_MSEL15_0),
PINMUX_DATA(MMCD0_6_PU_MARK,
PORT277_FN1, PORT277_IN_PU, MSEL4CR_MSEL15_0),
PINMUX_DATA(MMCD0_7_PU_MARK,
PORT278_FN1, PORT278_IN_PU, MSEL4CR_MSEL15_0),
PINMUX_DATA(FSIBISLD_PU_MARK, PORT39_FN1, PORT39_IN_PU),
PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU),
PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU),
@ -1568,12 +1543,8 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_DATA(FSIAISLD_PU_MARK, PORT55_FN1, PORT55_IN_PU),
};
#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
#define GPIO_PORT_310() _310(_GPIO_PORT, , unused)
#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
static struct pinmux_gpio pinmux_gpios[] = {
GPIO_PORT_310(),
GPIO_PORT_ALL(),
/* Table 25-1 (Functions 0-7) */
GPIO_FN(VBUS_0),
@ -2236,24 +2207,20 @@ static struct pinmux_gpio pinmux_gpios[] = {
GPIO_FN(SDHICMD2_PU),
GPIO_FN(MMCCMD0_PU),
GPIO_FN(MMCCMD1_PU),
GPIO_FN(MMCD0_0_PU),
GPIO_FN(MMCD0_1_PU),
GPIO_FN(MMCD0_2_PU),
GPIO_FN(MMCD0_3_PU),
GPIO_FN(MMCD0_4_PU),
GPIO_FN(MMCD0_5_PU),
GPIO_FN(MMCD0_6_PU),
GPIO_FN(MMCD0_7_PU),
GPIO_FN(FSIACK_PU),
GPIO_FN(FSIAILR_PU),
GPIO_FN(FSIAIBT_PU),
GPIO_FN(FSIAISLD_PU),
};
#define PORTCR(nr, reg) \
{ PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
0, \
/*0001*/ PORT##nr##_OUT , \
/*0010*/ PORT##nr##_IN , 0, 0, 0, 0, 0, 0, 0, \
/*1010*/ PORT##nr##_IN_PD, 0, 0, 0, \
/*1110*/ PORT##nr##_IN_PU, 0, \
PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
PORT##nr##_FN6, PORT##nr##_FN7, 0, 0, 0, 0, 0, 0, 0, 0 } \
}
static struct pinmux_cfg_reg pinmux_config_regs[] = {
PORTCR(0, 0xe6050000), /* PORT0CR */
PORTCR(1, 0xe6050001), /* PORT1CR */

14
arch/arm/mach-shmobile/pm-sh7372.c
View File

@ -402,22 +402,18 @@ static void sh7372_setup_a3sm(unsigned long msk, unsigned long msk2)
#ifdef CONFIG_CPU_IDLE
static void sh7372_cpuidle_setup(struct cpuidle_device *dev)
static void sh7372_cpuidle_setup(struct cpuidle_driver *drv)
{
struct cpuidle_state *state;
int i = dev->state_count;
struct cpuidle_state *state = &drv->states[drv->state_count];
state = &dev->states[i];
snprintf(state->name, CPUIDLE_NAME_LEN, "C2");
strncpy(state->desc, "Core Standby Mode", CPUIDLE_DESC_LEN);
state->exit_latency = 10;
state->target_residency = 20 + 10;
state->power_usage = 1; /* perhaps not */
state->flags = 0;
state->flags |= CPUIDLE_FLAG_TIME_VALID;
shmobile_cpuidle_modes[i] = sh7372_enter_core_standby;
state->flags = CPUIDLE_FLAG_TIME_VALID;
shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_core_standby;
dev->state_count = i + 1;
drv->state_count++;
}
static void sh7372_cpuidle_init(void)

13
arch/arm/mach-tegra/board-dt.c
View File

@ -101,6 +101,13 @@ static void __init tegra_dt_init(void)
tegra_clk_init_from_table(tegra_dt_clk_init_table);
/*
* Finished with the static registrations now; fill in the missing
* devices
*/
of_platform_populate(NULL, tegra_dt_match_table,
tegra20_auxdata_lookup, NULL);
for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) {
if (of_machine_is_compatible(pinmux_configs[i].machine)) {
pinmux_configs[i].init();
@ -110,12 +117,6 @@ static void __init tegra_dt_init(void)
WARN(i == ARRAY_SIZE(pinmux_configs),
"Unknown platform! Pinmuxing not initialized\n");
/*
* Finished with the static registrations now; fill in the missing
* devices
*/
of_platform_populate(NULL, tegra_dt_match_table, tegra20_auxdata_lookup, NULL);
}
static const char * tegra_dt_board_compat[] = {

6
arch/arm/mach-tegra/board-harmony-pinmux.c
View File

@ -16,6 +16,8 @@
#include <linux/kernel.h>
#include <linux/gpio.h>
#include <linux/of.h>
#include <mach/pinmux.h>
#include "gpio-names.h"
@ -161,7 +163,9 @@ static struct tegra_gpio_table gpio_table[] = {
void harmony_pinmux_init(void)
{
platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
if (!of_machine_is_compatible("nvidia,tegra20"))
platform_add_devices(pinmux_devices,
ARRAY_SIZE(pinmux_devices));
tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux));

6
arch/arm/mach-tegra/board-paz00-pinmux.c
View File

@ -16,6 +16,8 @@
#include <linux/kernel.h>
#include <linux/gpio.h>
#include <linux/of.h>
#include <mach/pinmux.h>
#include "gpio-names.h"
@ -158,7 +160,9 @@ static struct tegra_gpio_table gpio_table[] = {
void paz00_pinmux_init(void)
{
platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
if (!of_machine_is_compatible("nvidia,tegra20"))
platform_add_devices(pinmux_devices,
ARRAY_SIZE(pinmux_devices));
tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux));

6
arch/arm/mach-tegra/board-seaboard-pinmux.c
View File

@ -16,6 +16,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/gpio.h>
#include <linux/of.h>
#include <mach/pinmux.h>
#include <mach/pinmux-t2.h>
@ -191,6 +192,7 @@ static struct tegra_gpio_table common_gpio_table[] = {
{ .gpio = TEGRA_GPIO_SD2_POWER, .enable = true },
{ .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true },
{ .gpio = TEGRA_GPIO_POWERKEY, .enable = true },
{ .gpio = TEGRA_GPIO_HP_DET, .enable = true },
{ .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true },
{ .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true },
{ .gpio = TEGRA_GPIO_USB1, .enable = true },
@ -218,7 +220,9 @@ static void __init update_pinmux(struct tegra_pingroup_config *newtbl, int size)
void __init seaboard_common_pinmux_init(void)
{
platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
if (!of_machine_is_compatible("nvidia,tegra20"))
platform_add_devices(pinmux_devices,
ARRAY_SIZE(pinmux_devices));
tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux));

5
arch/arm/mach-tegra/board-trimslice-pinmux.c
View File

@ -16,6 +16,7 @@
#include <linux/gpio.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/of.h>
#include <mach/pinmux.h>
@ -157,7 +158,9 @@ static struct tegra_gpio_table gpio_table[] = {
void __init trimslice_pinmux_init(void)
{
platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
if (!of_machine_is_compatible("nvidia,tegra20"))
platform_add_devices(pinmux_devices,
ARRAY_SIZE(pinmux_devices));
tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux));
tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
}

4
arch/arm/plat-mxc/Kconfig
View File

@ -10,7 +10,7 @@ choice
config ARCH_IMX_V4_V5
bool "i.MX1, i.MX21, i.MX25, i.MX27"
select AUTO_ZRELADDR
select AUTO_ZRELADDR if !ZBOOT_ROM
select ARM_PATCH_PHYS_VIRT
help
This enables support for systems based on the Freescale i.MX ARMv4
@ -26,7 +26,7 @@ config ARCH_IMX_V6_V7
config ARCH_MX5
bool "i.MX50, i.MX51, i.MX53"
select AUTO_ZRELADDR
select AUTO_ZRELADDR if !ZBOOT_ROM
select ARM_PATCH_PHYS_VIRT
help
This enables support for machines using Freescale's i.MX50 and i.MX53

1
arch/arm/plat-mxc/avic.c
View File

@ -22,6 +22,7 @@
#include <linux/io.h>
#include <mach/common.h>
#include <asm/mach/irq.h>
#include <asm/exception.h>
#include <mach/hardware.h>
#include "irq-common.h"

11
arch/arm/plat-mxc/gic.c
View File

@ -28,21 +28,14 @@ asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
if (irqnr == 1023)
break;
if (irqnr > 29 && irqnr < 1021)
if (irqnr > 15 && irqnr < 1021)
handle_IRQ(irqnr, regs);
#ifdef CONFIG_SMP
else if (irqnr < 16) {
else {
writel_relaxed(irqstat, gic_cpu_base_addr +
GIC_CPU_EOI);
handle_IPI(irqnr, regs);
}
#endif
#ifdef CONFIG_LOCAL_TIMERS
else if (irqnr == 29) {
writel_relaxed(irqstat, gic_cpu_base_addr +
GIC_CPU_EOI);
handle_local_timer(regs);
}
#endif
} while (1);
}

3
arch/arm/plat-mxc/include/mach/entry-macro.S
View File

@ -25,6 +25,3 @@
.macro test_for_ipi, irqnr, irqstat, base, tmp
.endm
.macro test_for_ltirq, irqnr, irqstat, base, tmp
.endm

1
arch/arm/plat-mxc/tzic.c
View File

@ -17,6 +17,7 @@
#include <linux/io.h>
#include <asm/mach/irq.h>
#include <asm/exception.h>
#include <mach/hardware.h>
#include <mach/common.h>

4
arch/m68k/Kconfig
View File

@ -4,8 +4,8 @@ config M68K
select HAVE_IDE
select HAVE_AOUT if MMU
select GENERIC_ATOMIC64 if MMU
select HAVE_GENERIC_HARDIRQS if !MMU
select GENERIC_IRQ_SHOW if !MMU
select HAVE_GENERIC_HARDIRQS
select GENERIC_IRQ_SHOW
select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS
config RWSEM_GENERIC_SPINLOCK

9
arch/m68k/Kconfig.bus
View File

@ -2,6 +2,15 @@ if MMU
comment "Bus Support"
config DIO
bool "DIO bus support"
depends on HP300
default y
help
Say Y here to enable support for the "DIO" expansion bus used in
HP300 machines. If you are using such a system you almost certainly
want this.
config NUBUS
bool
depends on MAC

31
arch/m68k/Kconfig.devices
View File

@ -24,6 +24,37 @@ config PROC_HARDWARE
including the model, CPU, MMU, clock speed, BogoMIPS rating,
and memory size.
config NATFEAT
bool "ARAnyM emulator support"
depends on ATARI
help
This option enables support for ARAnyM native features, such as
access to a disk image as /dev/hda.
config NFBLOCK
tristate "NatFeat block device support"
depends on BLOCK && NATFEAT
help
Say Y to include support for the ARAnyM NatFeat block device
which allows direct access to the hard drives without using
the hardware emulation.
config NFCON
tristate "NatFeat console driver"
depends on NATFEAT
help
Say Y to include support for the ARAnyM NatFeat console driver
which allows the console output to be redirected to the stderr
output of ARAnyM.
config NFETH
tristate "NatFeat Ethernet support"
depends on ETHERNET && NATFEAT
help
Say Y to include support for the ARAnyM NatFeat network device
which will emulate a regular ethernet device while presenting an
ethertap device to the host system.
endmenu
menu "Character devices"

292
arch/m68k/amiga/amiints.c
View File

@ -1,43 +1,15 @@
/*
* linux/arch/m68k/amiga/amiints.c -- Amiga Linux interrupt handling code
* Amiga Linux interrupt handling code
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
*
* 11/07/96: rewritten interrupt handling, irq lists are exists now only for
* this sources where it makes sense (VERTB/PORTS/EXTER) and you must
* be careful that dev_id for this sources is unique since this the
* only possibility to distinguish between different handlers for
* free_irq. irq lists also have different irq flags:
* - IRQ_FLG_FAST: handler is inserted at top of list (after other
* fast handlers)
* - IRQ_FLG_SLOW: handler is inserted at bottom of list and before
* they're executed irq level is set to the previous
* one, but handlers don't need to be reentrant, if
* reentrance occurred, slow handlers will be just
* called again.
* The whole interrupt handling for CIAs is moved to cia.c
* /Roman Zippel
*
* 07/08/99: rewamp of the interrupt handling - we now have two types of
* interrupts, normal and fast handlers, fast handlers being
* marked with IRQF_DISABLED and runs with all other interrupts
* disabled. Normal interrupts disable their own source but
* run with all other interrupt sources enabled.
* PORTS and EXTER interrupts are always shared even if the
* drivers do not explicitly mark this when calling
* request_irq which they really should do.
* This is similar to the way interrupts are handled on all
* other architectures and makes a ton of sense besides
* having the advantage of making it easier to share
* drivers.
* /Jes
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/errno.h>
#include <linux/irq.h>
#include <asm/irq.h>
#include <asm/traps.h>
@ -45,20 +17,128 @@
#include <asm/amigaints.h>
#include <asm/amipcmcia.h>
static void amiga_enable_irq(unsigned int irq);
static void amiga_disable_irq(unsigned int irq);
static irqreturn_t ami_int1(int irq, void *dev_id);
static irqreturn_t ami_int3(int irq, void *dev_id);
static irqreturn_t ami_int4(int irq, void *dev_id);
static irqreturn_t ami_int5(int irq, void *dev_id);
static struct irq_controller amiga_irq_controller = {
/*
* Enable/disable a particular machine specific interrupt source.
* Note that this may affect other interrupts in case of a shared interrupt.
* This function should only be called for a _very_ short time to change some
* internal data, that may not be changed by the interrupt at the same time.
*/
static void amiga_irq_enable(struct irq_data *data)
{
amiga_custom.intena = IF_SETCLR | (1 << (data->irq - IRQ_USER));
}
static void amiga_irq_disable(struct irq_data *data)
{
amiga_custom.intena = 1 << (data->irq - IRQ_USER);
}
static struct irq_chip amiga_irq_chip = {
.name = "amiga",
.lock = __SPIN_LOCK_UNLOCKED(amiga_irq_controller.lock),
.enable = amiga_enable_irq,
.disable = amiga_disable_irq,
.irq_enable = amiga_irq_enable,
.irq_disable = amiga_irq_disable,
};
/*
* The builtin Amiga hardware interrupt handlers.
*/
static void ami_int1(unsigned int irq, struct irq_desc *desc)
{
unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
/* if serial transmit buffer empty, interrupt */
if (ints & IF_TBE) {
amiga_custom.intreq = IF_TBE;
generic_handle_irq(IRQ_AMIGA_TBE);
}
/* if floppy disk transfer complete, interrupt */
if (ints & IF_DSKBLK) {
amiga_custom.intreq = IF_DSKBLK;
generic_handle_irq(IRQ_AMIGA_DSKBLK);
}
/* if software interrupt set, interrupt */
if (ints & IF_SOFT) {
amiga_custom.intreq = IF_SOFT;
generic_handle_irq(IRQ_AMIGA_SOFT);
}
}
static void ami_int3(unsigned int irq, struct irq_desc *desc)
{
unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
/* if a blitter interrupt */
if (ints & IF_BLIT) {
amiga_custom.intreq = IF_BLIT;
generic_handle_irq(IRQ_AMIGA_BLIT);
}
/* if a copper interrupt */
if (ints & IF_COPER) {
amiga_custom.intreq = IF_COPER;
generic_handle_irq(IRQ_AMIGA_COPPER);
}
/* if a vertical blank interrupt */
if (ints & IF_VERTB) {
amiga_custom.intreq = IF_VERTB;
generic_handle_irq(IRQ_AMIGA_VERTB);
}
}
static void ami_int4(unsigned int irq, struct irq_desc *desc)
{
unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
/* if audio 0 interrupt */
if (ints & IF_AUD0) {
amiga_custom.intreq = IF_AUD0;
generic_handle_irq(IRQ_AMIGA_AUD0);
}
/* if audio 1 interrupt */
if (ints & IF_AUD1) {
amiga_custom.intreq = IF_AUD1;
generic_handle_irq(IRQ_AMIGA_AUD1);
}
/* if audio 2 interrupt */
if (ints & IF_AUD2) {
amiga_custom.intreq = IF_AUD2;
generic_handle_irq(IRQ_AMIGA_AUD2);
}
/* if audio 3 interrupt */
if (ints & IF_AUD3) {
amiga_custom.intreq = IF_AUD3;
generic_handle_irq(IRQ_AMIGA_AUD3);
}
}
static void ami_int5(unsigned int irq, struct irq_desc *desc)
{
unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
/* if serial receive buffer full interrupt */
if (ints & IF_RBF) {
/* acknowledge of IF_RBF must be done by the serial interrupt */
generic_handle_irq(IRQ_AMIGA_RBF);
}
/* if a disk sync interrupt */
if (ints & IF_DSKSYN) {
amiga_custom.intreq = IF_DSKSYN;
generic_handle_irq(IRQ_AMIGA_DSKSYN);
}
}
/*
* void amiga_init_IRQ(void)
*
@ -72,16 +152,13 @@ static struct irq_controller amiga_irq_controller = {
void __init amiga_init_IRQ(void)
{
if (request_irq(IRQ_AUTO_1, ami_int1, 0, "int1", NULL))
pr_err("Couldn't register int%d\n", 1);
if (request_irq(IRQ_AUTO_3, ami_int3, 0, "int3", NULL))
pr_err("Couldn't register int%d\n", 3);
if (request_irq(IRQ_AUTO_4, ami_int4, 0, "int4", NULL))
pr_err("Couldn't register int%d\n", 4);
if (request_irq(IRQ_AUTO_5, ami_int5, 0, "int5", NULL))
pr_err("Couldn't register int%d\n", 5);
m68k_setup_irq_controller(&amiga_irq_chip, handle_simple_irq, IRQ_USER,
AMI_STD_IRQS);
m68k_setup_irq_controller(&amiga_irq_controller, IRQ_USER, AMI_STD_IRQS);
irq_set_chained_handler(IRQ_AUTO_1, ami_int1);
irq_set_chained_handler(IRQ_AUTO_3, ami_int3);
irq_set_chained_handler(IRQ_AUTO_4, ami_int4);
irq_set_chained_handler(IRQ_AUTO_5, ami_int5);
/* turn off PCMCIA interrupts */
if (AMIGAHW_PRESENT(PCMCIA))
@ -95,120 +172,3 @@ void __init amiga_init_IRQ(void)
cia_init_IRQ(&ciaa_base);
cia_init_IRQ(&ciab_base);
}
/*
* Enable/disable a particular machine specific interrupt source.
* Note that this may affect other interrupts in case of a shared interrupt.
* This function should only be called for a _very_ short time to change some
* internal data, that may not be changed by the interrupt at the same time.
*/
static void amiga_enable_irq(unsigned int irq)
{
amiga_custom.intena = IF_SETCLR | (1 << (irq - IRQ_USER));
}
static void amiga_disable_irq(unsigned int irq)
{
amiga_custom.intena = 1 << (irq - IRQ_USER);
}
/*
* The builtin Amiga hardware interrupt handlers.
*/
static irqreturn_t ami_int1(int irq, void *dev_id)
{
unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
/* if serial transmit buffer empty, interrupt */
if (ints & IF_TBE) {
amiga_custom.intreq = IF_TBE;
m68k_handle_int(IRQ_AMIGA_TBE);
}
/* if floppy disk transfer complete, interrupt */
if (ints & IF_DSKBLK) {
amiga_custom.intreq = IF_DSKBLK;
m68k_handle_int(IRQ_AMIGA_DSKBLK);
}
/* if software interrupt set, interrupt */
if (ints & IF_SOFT) {
amiga_custom.intreq = IF_SOFT;
m68k_handle_int(IRQ_AMIGA_SOFT);
}
return IRQ_HANDLED;
}
static irqreturn_t ami_int3(int irq, void *dev_id)
{
unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
/* if a blitter interrupt */
if (ints & IF_BLIT) {
amiga_custom.intreq = IF_BLIT;
m68k_handle_int(IRQ_AMIGA_BLIT);
}
/* if a copper interrupt */
if (ints & IF_COPER) {
amiga_custom.intreq = IF_COPER;
m68k_handle_int(IRQ_AMIGA_COPPER);
}
/* if a vertical blank interrupt */
if (ints & IF_VERTB) {
amiga_custom.intreq = IF_VERTB;
m68k_handle_int(IRQ_AMIGA_VERTB);
}
return IRQ_HANDLED;
}
static irqreturn_t ami_int4(int irq, void *dev_id)
{
unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
/* if audio 0 interrupt */
if (ints & IF_AUD0) {
amiga_custom.intreq = IF_AUD0;
m68k_handle_int(IRQ_AMIGA_AUD0);
}
/* if audio 1 interrupt */
if (ints & IF_AUD1) {
amiga_custom.intreq = IF_AUD1;
m68k_handle_int(IRQ_AMIGA_AUD1);
}
/* if audio 2 interrupt */
if (ints & IF_AUD2) {
amiga_custom.intreq = IF_AUD2;
m68k_handle_int(IRQ_AMIGA_AUD2);
}
/* if audio 3 interrupt */
if (ints & IF_AUD3) {
amiga_custom.intreq = IF_AUD3;
m68k_handle_int(IRQ_AMIGA_AUD3);
}
return IRQ_HANDLED;
}
static irqreturn_t ami_int5(int irq, void *dev_id)
{
unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
/* if serial receive buffer full interrupt */
if (ints & IF_RBF) {
/* acknowledge of IF_RBF must be done by the serial interrupt */
m68k_handle_int(IRQ_AMIGA_RBF);
}
/* if a disk sync interrupt */
if (ints & IF_DSKSYN) {
amiga_custom.intreq = IF_DSKSYN;
m68k_handle_int(IRQ_AMIGA_DSKSYN);
}
return IRQ_HANDLED;
}

39
arch/m68k/amiga/cia.c
View File

@ -93,13 +93,14 @@ static irqreturn_t cia_handler(int irq, void *dev_id)
amiga_custom.intreq = base->int_mask;
for (; ints; mach_irq++, ints >>= 1) {
if (ints & 1)
m68k_handle_int(mach_irq);
generic_handle_irq(mach_irq);
}
return IRQ_HANDLED;
}
static void cia_enable_irq(unsigned int irq)
static void cia_irq_enable(struct irq_data *data)
{
unsigned int irq = data->irq;
unsigned char mask;
if (irq >= IRQ_AMIGA_CIAB) {
@ -113,19 +114,20 @@ static void cia_enable_irq(unsigned int irq)
}
}
static void cia_disable_irq(unsigned int irq)
static void cia_irq_disable(struct irq_data *data)
{
unsigned int irq = data->irq;
if (irq >= IRQ_AMIGA_CIAB)
cia_able_irq(&ciab_base, 1 << (irq - IRQ_AMIGA_CIAB));
else
cia_able_irq(&ciaa_base, 1 << (irq - IRQ_AMIGA_CIAA));
}
static struct irq_controller cia_irq_controller = {
static struct irq_chip cia_irq_chip = {
.name = "cia",
.lock = __SPIN_LOCK_UNLOCKED(cia_irq_controller.lock),
.enable = cia_enable_irq,
.disable = cia_disable_irq,
.irq_enable = cia_irq_enable,
.irq_disable = cia_irq_disable,
};
/*
@ -134,9 +136,9 @@ static struct irq_controller cia_irq_controller = {
* into this chain.
*/
static void auto_enable_irq(unsigned int irq)
static void auto_irq_enable(struct irq_data *data)
{
switch (irq) {
switch (data->irq) {
case IRQ_AUTO_2:
amiga_custom.intena = IF_SETCLR | IF_PORTS;
break;
@ -146,9 +148,9 @@ static void auto_enable_irq(unsigned int irq)
}
}
static void auto_disable_irq(unsigned int irq)
static void auto_irq_disable(struct irq_data *data)
{
switch (irq) {
switch (data->irq) {
case IRQ_AUTO_2:
amiga_custom.intena = IF_PORTS;
break;
@ -158,24 +160,25 @@ static void auto_disable_irq(unsigned int irq)
}
}
static struct irq_controller auto_irq_controller = {
static struct irq_chip auto_irq_chip = {
.name = "auto",
.lock = __SPIN_LOCK_UNLOCKED(auto_irq_controller.lock),
.enable = auto_enable_irq,
.disable = auto_disable_irq,
.irq_enable = auto_irq_enable,
.irq_disable = auto_irq_disable,
};
void __init cia_init_IRQ(struct ciabase *base)
{
m68k_setup_irq_controller(&cia_irq_controller, base->cia_irq, CIA_IRQS);
m68k_setup_irq_controller(&cia_irq_chip, handle_simple_irq,
base->cia_irq, CIA_IRQS);
/* clear any pending interrupt and turn off all interrupts */
cia_set_irq(base, CIA_ICR_ALL);
cia_able_irq(base, CIA_ICR_ALL);
/* override auto int and install CIA handler */
m68k_setup_irq_controller(&auto_irq_controller, base->handler_irq, 1);
m68k_irq_startup(base->handler_irq);
m68k_setup_irq_controller(&auto_irq_chip, handle_simple_irq,
base->handler_irq, 1);
m68k_irq_startup_irq(base->handler_irq);
if (request_irq(base->handler_irq, cia_handler, IRQF_SHARED,
base->name, base))
pr_err("Couldn't register %s interrupt\n", base->name);

35
arch/m68k/apollo/dn_ints.c
View File

@ -1,19 +1,13 @@
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <asm/irq.h>
#include <asm/traps.h>
#include <asm/apollohw.h>
void dn_process_int(unsigned int irq, struct pt_regs *fp)
unsigned int apollo_irq_startup(struct irq_data *data)
{
__m68k_handle_int(irq, fp);
unsigned int irq = data->irq;
*(volatile unsigned char *)(pica)=0x20;
*(volatile unsigned char *)(picb)=0x20;
}
int apollo_irq_startup(unsigned int irq)
{
if (irq < 8)
*(volatile unsigned char *)(pica+1) &= ~(1 << irq);
else
@ -21,24 +15,33 @@ int apollo_irq_startup(unsigned int irq)
return 0;
}
void apollo_irq_shutdown(unsigned int irq)
void apollo_irq_shutdown(struct irq_data *data)
{
unsigned int irq = data->irq;
if (irq < 8)
*(volatile unsigned char *)(pica+1) |= (1 << irq);
else
*(volatile unsigned char *)(picb+1) |= (1 << (irq - 8));
}
static struct irq_controller apollo_irq_controller = {
void apollo_irq_eoi(struct irq_data *data)
{
*(volatile unsigned char *)(pica) = 0x20;
*(volatile unsigned char *)(picb) = 0x20;
}
static struct irq_chip apollo_irq_chip = {
.name = "apollo",
.lock = __SPIN_LOCK_UNLOCKED(apollo_irq_controller.lock),
.startup = apollo_irq_startup,
.shutdown = apollo_irq_shutdown,
.irq_startup = apollo_irq_startup,
.irq_shutdown = apollo_irq_shutdown,
.irq_eoi = apollo_irq_eoi,
};
void __init dn_init_IRQ(void)
{
m68k_setup_user_interrupt(VEC_USER + 96, 16, dn_process_int);
m68k_setup_irq_controller(&apollo_irq_controller, IRQ_APOLLO, 16);
m68k_setup_user_interrupt(VEC_USER + 96, 16);
m68k_setup_irq_controller(&apollo_irq_chip, handle_fasteoi_irq,
IRQ_APOLLO, 16);
}

274
arch/m68k/atari/ataints.c
View File

@ -60,244 +60,8 @@
* <asm/atariints.h>): Autovector interrupts are 1..7, then follow ST-MFP,
* TT-MFP, SCC, and finally VME interrupts. Vector numbers for the latter can
* be allocated by atari_register_vme_int().
*
* Each interrupt can be of three types:
*
* - SLOW: The handler runs with all interrupts enabled, except the one it
* was called by (to avoid reentering). This should be the usual method.
* But it is currently possible only for MFP ints, since only the MFP
* offers an easy way to mask interrupts.
*
* - FAST: The handler runs with all interrupts disabled. This should be used
* only for really fast handlers, that just do actions immediately
* necessary, and let the rest do a bottom half or task queue.
*
* - PRIORITIZED: The handler can be interrupted by higher-level ints
* (greater IPL, no MFP priorities!). This is the method of choice for ints
* which should be slow, but are not from a MFP.
*
* The feature of more than one handler for one int source is still there, but
* only applicable if all handers are of the same type. To not slow down
* processing of ints with only one handler by the chaining feature, the list
* calling function atari_call_irq_list() is only plugged in at the time the
* second handler is registered.
*
* Implementation notes: For fast-as-possible int handling, there are separate
* entry points for each type (slow/fast/prio). The assembler handler calls
* the irq directly in the usual case, no C wrapper is involved. In case of
* multiple handlers, atari_call_irq_list() is registered as handler and calls
* in turn the real irq's. To ease access from assembler level to the irq
* function pointer and accompanying data, these two are stored in a separate
* array, irq_handler[]. The rest of data (type, name) are put into a second
* array, irq_param, that is accessed from C only. For each slow interrupt (32
* in all) there are separate handler functions, which makes it possible to
* hard-code the MFP register address and value, are necessary to mask the
* int. If there'd be only one generic function, lots of calculations would be
* needed to determine MFP register and int mask from the vector number :-(
*
* Furthermore, slow ints may not lower the IPL below its previous value
* (before the int happened). This is needed so that an int of class PRIO, on
* that this int may be stacked, cannot be reentered. This feature is
* implemented as follows: If the stack frame format is 1 (throwaway), the int
* is not stacked, and the IPL is anded with 0xfbff, resulting in a new level
* 2, which still blocks the HSYNC, but no interrupts of interest. If the
* frame format is 0, the int is nested, and the old IPL value can be found in
* the sr copy in the frame.
*/
#if 0
#define NUM_INT_SOURCES (8 + NUM_ATARI_SOURCES)
typedef void (*asm_irq_handler)(void);
struct irqhandler {
irqreturn_t (*handler)(int, void *, struct pt_regs *);
void *dev_id;
};
struct irqparam {
unsigned long flags;
const char *devname;
};
/*
* Array with irq's and their parameter data. This array is accessed from low
* level assembler code, so an element size of 8 allows usage of index scaling
* addressing mode.
*/
static struct irqhandler irq_handler[NUM_INT_SOURCES];
/*
* This array hold the rest of parameters of int handlers: type
* (slow,fast,prio) and the name of the handler. These values are only
* accessed from C
*/
static struct irqparam irq_param[NUM_INT_SOURCES];
/* check for valid int number (complex, sigh...) */
#define IS_VALID_INTNO(n) \
((n) > 0 && \
/* autovec and ST-MFP ok anyway */ \
(((n) < TTMFP_SOURCE_BASE) || \
/* TT-MFP ok if present */ \
((n) >= TTMFP_SOURCE_BASE && (n) < SCC_SOURCE_BASE && \
ATARIHW_PRESENT(TT_MFP)) || \
/* SCC ok if present and number even */ \
((n) >= SCC_SOURCE_BASE && (n) < VME_SOURCE_BASE && \
!((n) & 1) && ATARIHW_PRESENT(SCC)) || \
/* greater numbers ok if they are registered VME vectors */ \
((n) >= VME_SOURCE_BASE && (n) < VME_SOURCE_BASE + VME_MAX_SOURCES && \
free_vme_vec_bitmap & (1 << ((n) - VME_SOURCE_BASE)))))
/*
* Here start the assembler entry points for interrupts
*/
#define IRQ_NAME(nr) atari_slow_irq_##nr##_handler(void)
#define BUILD_SLOW_IRQ(n) \
asmlinkage void IRQ_NAME(n); \
/* Dummy function to allow asm with operands. */ \
void atari_slow_irq_##n##_dummy (void) { \
__asm__ (__ALIGN_STR "\n" \
"atari_slow_irq_" #n "_handler:\t" \
" addl %6,%5\n" /* preempt_count() += HARDIRQ_OFFSET */ \
SAVE_ALL_INT "\n" \
GET_CURRENT(%%d0) "\n" \
" andb #~(1<<(%c3&7)),%a4:w\n" /* mask this interrupt */ \
/* get old IPL from stack frame */ \
" bfextu %%sp@(%c2){#5,#3},%%d0\n" \
" movew %%sr,%%d1\n" \
" bfins %%d0,%%d1{#21,#3}\n" \
" movew %%d1,%%sr\n" /* set IPL = previous value */ \
" addql #1,%a0\n" \
" lea %a1,%%a0\n" \
" pea %%sp@\n" /* push addr of frame */ \
" movel %%a0@(4),%%sp@-\n" /* push handler data */ \
" pea (%c3+8)\n" /* push int number */ \
" movel %%a0@,%%a0\n" \
" jbsr %%a0@\n" /* call the handler */ \
" addql #8,%%sp\n" \
" addql #4,%%sp\n" \
" orw #0x0600,%%sr\n" \
" andw #0xfeff,%%sr\n" /* set IPL = 6 again */ \
" orb #(1<<(%c3&7)),%a4:w\n" /* now unmask the int again */ \
" jbra ret_from_interrupt\n" \
: : "i" (&kstat_cpu(0).irqs[n+8]), "i" (&irq_handler[n+8]), \
"n" (PT_OFF_SR), "n" (n), \
"i" (n & 8 ? (n & 16 ? &tt_mfp.int_mk_a : &st_mfp.int_mk_a) \
: (n & 16 ? &tt_mfp.int_mk_b : &st_mfp.int_mk_b)), \
"m" (preempt_count()), "di" (HARDIRQ_OFFSET) \
); \
for (;;); /* fake noreturn */ \
}
BUILD_SLOW_IRQ(0);
BUILD_SLOW_IRQ(1);
BUILD_SLOW_IRQ(2);
BUILD_SLOW_IRQ(3);
BUILD_SLOW_IRQ(4);
BUILD_SLOW_IRQ(5);
BUILD_SLOW_IRQ(6);
BUILD_SLOW_IRQ(7);
BUILD_SLOW_IRQ(8);
BUILD_SLOW_IRQ(9);
BUILD_SLOW_IRQ(10);
BUILD_SLOW_IRQ(11);
BUILD_SLOW_IRQ(12);
BUILD_SLOW_IRQ(13);
BUILD_SLOW_IRQ(14);
BUILD_SLOW_IRQ(15);
BUILD_SLOW_IRQ(16);
BUILD_SLOW_IRQ(17);
BUILD_SLOW_IRQ(18);
BUILD_SLOW_IRQ(19);
BUILD_SLOW_IRQ(20);
BUILD_SLOW_IRQ(21);
BUILD_SLOW_IRQ(22);
BUILD_SLOW_IRQ(23);
BUILD_SLOW_IRQ(24);
BUILD_SLOW_IRQ(25);
BUILD_SLOW_IRQ(26);
BUILD_SLOW_IRQ(27);
BUILD_SLOW_IRQ(28);
BUILD_SLOW_IRQ(29);
BUILD_SLOW_IRQ(30);
BUILD_SLOW_IRQ(31);
asm_irq_handler slow_handlers[32] = {
[0] = atari_slow_irq_0_handler,
[1] = atari_slow_irq_1_handler,
[2] = atari_slow_irq_2_handler,
[3] = atari_slow_irq_3_handler,
[4] = atari_slow_irq_4_handler,
[5] = atari_slow_irq_5_handler,
[6] = atari_slow_irq_6_handler,
[7] = atari_slow_irq_7_handler,
[8] = atari_slow_irq_8_handler,
[9] = atari_slow_irq_9_handler,
[10] = atari_slow_irq_10_handler,
[11] = atari_slow_irq_11_handler,
[12] = atari_slow_irq_12_handler,
[13] = atari_slow_irq_13_handler,
[14] = atari_slow_irq_14_handler,
[15] = atari_slow_irq_15_handler,
[16] = atari_slow_irq_16_handler,
[17] = atari_slow_irq_17_handler,
[18] = atari_slow_irq_18_handler,
[19] = atari_slow_irq_19_handler,
[20] = atari_slow_irq_20_handler,
[21] = atari_slow_irq_21_handler,
[22] = atari_slow_irq_22_handler,
[23] = atari_slow_irq_23_handler,
[24] = atari_slow_irq_24_handler,
[25] = atari_slow_irq_25_handler,
[26] = atari_slow_irq_26_handler,
[27] = atari_slow_irq_27_handler,
[28] = atari_slow_irq_28_handler,
[29] = atari_slow_irq_29_handler,
[30] = atari_slow_irq_30_handler,
[31] = atari_slow_irq_31_handler
};
asmlinkage void atari_fast_irq_handler( void );
asmlinkage void atari_prio_irq_handler( void );
/* Dummy function to allow asm with operands. */
void atari_fast_prio_irq_dummy (void) {
__asm__ (__ALIGN_STR "\n"
"atari_fast_irq_handler:\n\t"
"orw #0x700,%%sr\n" /* disable all interrupts */
"atari_prio_irq_handler:\n\t"
"addl %3,%2\n\t" /* preempt_count() += HARDIRQ_OFFSET */
SAVE_ALL_INT "\n\t"
GET_CURRENT(%%d0) "\n\t"
/* get vector number from stack frame and convert to source */
"bfextu %%sp@(%c1){#4,#10},%%d0\n\t"
"subw #(0x40-8),%%d0\n\t"
"jpl 1f\n\t"
"addw #(0x40-8-0x18),%%d0\n"
"1:\tlea %a0,%%a0\n\t"
"addql #1,%%a0@(%%d0:l:4)\n\t"
"lea irq_handler,%%a0\n\t"
"lea %%a0@(%%d0:l:8),%%a0\n\t"
"pea %%sp@\n\t" /* push frame address */
"movel %%a0@(4),%%sp@-\n\t" /* push handler data */
"movel %%d0,%%sp@-\n\t" /* push int number */
"movel %%a0@,%%a0\n\t"
"jsr %%a0@\n\t" /* and call the handler */
"addql #8,%%sp\n\t"
"addql #4,%%sp\n\t"
"jbra ret_from_interrupt"
: : "i" (&kstat_cpu(0).irqs), "n" (PT_OFF_FORMATVEC),
"m" (preempt_count()), "di" (HARDIRQ_OFFSET)
);
for (;;);
}
#endif
/*
* Bitmap for free interrupt vector numbers
* (new vectors starting from 0x70 can be allocated by
@ -320,31 +84,44 @@ extern void atari_microwire_cmd(int cmd);
extern int atari_SCC_reset_done;
static int atari_startup_irq(unsigned int irq)
static unsigned int atari_irq_startup(struct irq_data *data)
{
m68k_irq_startup(irq);
unsigned int irq = data->irq;
m68k_irq_startup(data);
atari_turnon_irq(irq);
atari_enable_irq(irq);
return 0;
}
static void atari_shutdown_irq(unsigned int irq)
static void atari_irq_shutdown(struct irq_data *data)
{
unsigned int irq = data->irq;
atari_disable_irq(irq);
atari_turnoff_irq(irq);
m68k_irq_shutdown(irq);
m68k_irq_shutdown(data);
if (irq == IRQ_AUTO_4)
vectors[VEC_INT4] = falcon_hblhandler;
}
static struct irq_controller atari_irq_controller = {
static void atari_irq_enable(struct irq_data *data)
{
atari_enable_irq(data->irq);
}
static void atari_irq_disable(struct irq_data *data)
{
atari_disable_irq(data->irq);
}
static struct irq_chip atari_irq_chip = {
.name = "atari",
.lock = __SPIN_LOCK_UNLOCKED(atari_irq_controller.lock),
.startup = atari_startup_irq,
.shutdown = atari_shutdown_irq,
.enable = atari_enable_irq,
.disable = atari_disable_irq,
.irq_startup = atari_irq_startup,
.irq_shutdown = atari_irq_shutdown,
.irq_enable = atari_irq_enable,
.irq_disable = atari_irq_disable,
};
/*
@ -360,8 +137,9 @@ static struct irq_controller atari_irq_controller = {
void __init atari_init_IRQ(void)
{
m68k_setup_user_interrupt(VEC_USER, NUM_ATARI_SOURCES - IRQ_USER, NULL);
m68k_setup_irq_controller(&atari_irq_controller, 1, NUM_ATARI_SOURCES - 1);
m68k_setup_user_interrupt(VEC_USER, NUM_ATARI_SOURCES - IRQ_USER);
m68k_setup_irq_controller(&atari_irq_chip, handle_simple_irq, 1,
NUM_ATARI_SOURCES - 1);
/* Initialize the MFP(s) */

2
arch/m68k/bvme6000/config.c
View File

@ -86,7 +86,7 @@ static void bvme6000_get_model(char *model)
*/
static void __init bvme6000_init_IRQ(void)
{
m68k_setup_user_interrupt(VEC_USER, 192, NULL);
m68k_setup_user_interrupt(VEC_USER, 192);
}
void __init config_bvme6000(void)

2
arch/m68k/hp300/time.c
View File

@ -70,7 +70,7 @@ void __init hp300_sched_init(irq_handler_t vector)
asm volatile(" movpw %0,%1@(5)" : : "d" (INTVAL), "a" (CLOCKBASE));
if (request_irq(IRQ_AUTO_6, hp300_tick, IRQ_FLG_STD, "timer tick", vector))
if (request_irq(IRQ_AUTO_6, hp300_tick, 0, "timer tick", vector))
pr_err("Couldn't register timer interrupt\n");
out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */

5
arch/m68k/include/asm/hardirq.h
View File

@ -18,6 +18,11 @@
#ifdef CONFIG_MMU
static inline void ack_bad_irq(unsigned int irq)
{
pr_crit("unexpected IRQ trap at vector %02x\n", irq);
}
/* entry.S is sensitive to the offsets of these fields */
typedef struct {
unsigned int __softirq_pending;

69
arch/m68k/include/asm/irq.h
View File

@ -27,11 +27,6 @@
#ifdef CONFIG_MMU
#include <linux/linkage.h>
#include <linux/hardirq.h>
#include <linux/irqreturn.h>
#include <linux/spinlock_types.h>
/*
* Interrupt source definitions
* General interrupt sources are the level 1-7.
@ -54,10 +49,6 @@
#define IRQ_USER 8
extern unsigned int irq_canonicalize(unsigned int irq);
struct pt_regs;
/*
* various flags for request_irq() - the Amiga now uses the standard
* mechanism like all other architectures - IRQF_DISABLED and
@ -71,57 +62,27 @@ struct pt_regs;
#define IRQ_FLG_STD (0x8000) /* internally used */
#endif
/*
* This structure is used to chain together the ISRs for a particular
* interrupt source (if it supports chaining).
*/
typedef struct irq_node {
irqreturn_t (*handler)(int, void *);
void *dev_id;
struct irq_node *next;
unsigned long flags;
const char *devname;
} irq_node_t;
struct irq_data;
struct irq_chip;
struct irq_desc;
extern unsigned int m68k_irq_startup(struct irq_data *data);
extern unsigned int m68k_irq_startup_irq(unsigned int irq);
extern void m68k_irq_shutdown(struct irq_data *data);
extern void m68k_setup_auto_interrupt(void (*handler)(unsigned int,
struct pt_regs *));
extern void m68k_setup_user_interrupt(unsigned int vec, unsigned int cnt);
extern void m68k_setup_irq_controller(struct irq_chip *,
void (*handle)(unsigned int irq,
struct irq_desc *desc),
unsigned int irq, unsigned int cnt);
/*
* This structure has only 4 elements for speed reasons
*/
struct irq_handler {
int (*handler)(int, void *);
unsigned long flags;
void *dev_id;
const char *devname;
};
struct irq_controller {
const char *name;
spinlock_t lock;
int (*startup)(unsigned int irq);
void (*shutdown)(unsigned int irq);
void (*enable)(unsigned int irq);
void (*disable)(unsigned int irq);
};
extern int m68k_irq_startup(unsigned int);
extern void m68k_irq_shutdown(unsigned int);
/*
* This function returns a new irq_node_t
*/
extern irq_node_t *new_irq_node(void);
extern void m68k_setup_auto_interrupt(void (*handler)(unsigned int, struct pt_regs *));
extern void m68k_setup_user_interrupt(unsigned int vec, unsigned int cnt,
void (*handler)(unsigned int, struct pt_regs *));
extern void m68k_setup_irq_controller(struct irq_controller *, unsigned int, unsigned int);
asmlinkage void m68k_handle_int(unsigned int);
asmlinkage void __m68k_handle_int(unsigned int, struct pt_regs *);
extern unsigned int irq_canonicalize(unsigned int irq);
#else
#define irq_canonicalize(irq) (irq)
#endif /* CONFIG_MMU */
asmlinkage void do_IRQ(int irq, struct pt_regs *regs);
extern atomic_t irq_err_count;
#endif /* _M68K_IRQ_H_ */

2
arch/m68k/include/asm/macintosh.h
View File

@ -12,6 +12,8 @@ extern void mac_reset(void);
extern void mac_poweroff(void);
extern void mac_init_IRQ(void);
extern int mac_irq_pending(unsigned int);
extern void mac_irq_enable(struct irq_data *data);
extern void mac_irq_disable(struct irq_data *data);
/*
* Floppy driver magic hook - probably shouldn't be here

3
arch/m68k/include/asm/q40ints.h
View File

@ -24,6 +24,3 @@
#define Q40_IRQ10_MASK (1<<5)
#define Q40_IRQ14_MASK (1<<6)
#define Q40_IRQ15_MASK (1<<7)
extern unsigned long q40_probe_irq_on (void);
extern int q40_probe_irq_off (unsigned long irqs);

9
arch/m68k/kernel/Makefile
View File

@ -6,16 +6,15 @@ extra-$(CONFIG_MMU) := head.o
extra-$(CONFIG_SUN3) := sun3-head.o
extra-y += vmlinux.lds
obj-y := entry.o m68k_ksyms.o module.o process.o ptrace.o setup.o signal.o \
sys_m68k.o syscalltable.o time.o traps.o
obj-y := entry.o irq.o m68k_ksyms.o module.o process.o ptrace.o setup.o \
signal.o sys_m68k.o syscalltable.o time.o traps.o
obj-$(CONFIG_MMU) += ints.o devres.o vectors.o
devres-$(CONFIG_MMU) = ../../../kernel/irq/devres.o
obj-$(CONFIG_MMU) += ints.o vectors.o
ifndef CONFIG_MMU_SUN3
obj-y += dma.o
endif
ifndef CONFIG_MMU
obj-y += init_task.o irq.o
obj-y += init_task.o
endif

7
arch/m68k/kernel/entry_mm.S
View File

@ -48,7 +48,7 @@
.globl sys_fork, sys_clone, sys_vfork
.globl ret_from_interrupt, bad_interrupt
.globl auto_irqhandler_fixup
.globl user_irqvec_fixup, user_irqhandler_fixup
.globl user_irqvec_fixup
.text
ENTRY(buserr)
@ -207,7 +207,7 @@ ENTRY(auto_inthandler)
movel %sp,%sp@-
movel %d0,%sp@- | put vector # on stack
auto_irqhandler_fixup = . + 2
jsr __m68k_handle_int | process the IRQ
jsr do_IRQ | process the IRQ
addql #8,%sp | pop parameters off stack
ret_from_interrupt:
@ -240,8 +240,7 @@ user_irqvec_fixup = . + 2
movel %sp,%sp@-
movel %d0,%sp@- | put vector # on stack
user_irqhandler_fixup = . + 2
jsr __m68k_handle_int | process the IRQ
jsr do_IRQ | process the IRQ
addql #8,%sp | pop parameters off stack
subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)

325
arch/m68k/kernel/ints.c
View File

@ -4,25 +4,6 @@
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
*
* 07/03/96: Timer initialization, and thus mach_sched_init(),
* removed from request_irq() and moved to init_time().
* We should therefore consider renaming our add_isr() and
* remove_isr() to request_irq() and free_irq()
* respectively, so they are compliant with the other
* architectures. /Jes
* 11/07/96: Changed all add_/remove_isr() to request_/free_irq() calls.
* Removed irq list support, if any machine needs an irq server
* it must implement this itself (as it's already done), instead
* only default handler are used with mach_default_handler.
* request_irq got some flags different from other architectures:
* - IRQ_FLG_REPLACE : Replace an existing handler (the default one
* can be replaced without this flag)
* - IRQ_FLG_LOCK : handler can't be replaced
* There are other machine depending flags, see there
* If you want to replace a default handler you should know what
* you're doing, since it might handle different other irq sources
* which must be served /Roman Zippel
*/
#include <linux/module.h>
@ -47,33 +28,22 @@
#endif
extern u32 auto_irqhandler_fixup[];
extern u32 user_irqhandler_fixup[];
extern u16 user_irqvec_fixup[];
/* table for system interrupt handlers */
static struct irq_node *irq_list[NR_IRQS];
static struct irq_controller *irq_controller[NR_IRQS];
static int irq_depth[NR_IRQS];
static int m68k_first_user_vec;
static struct irq_controller auto_irq_controller = {
static struct irq_chip auto_irq_chip = {
.name = "auto",
.lock = __SPIN_LOCK_UNLOCKED(auto_irq_controller.lock),
.startup = m68k_irq_startup,
.shutdown = m68k_irq_shutdown,
.irq_startup = m68k_irq_startup,
.irq_shutdown = m68k_irq_shutdown,
};
static struct irq_controller user_irq_controller = {
static struct irq_chip user_irq_chip = {
.name = "user",
.lock = __SPIN_LOCK_UNLOCKED(user_irq_controller.lock),
.startup = m68k_irq_startup,
.shutdown = m68k_irq_shutdown,
.irq_startup = m68k_irq_startup,
.irq_shutdown = m68k_irq_shutdown,
};
#define NUM_IRQ_NODES 100
static irq_node_t nodes[NUM_IRQ_NODES];
/*
* void init_IRQ(void)
*
@ -96,7 +66,7 @@ void __init init_IRQ(void)
}
for (i = IRQ_AUTO_1; i <= IRQ_AUTO_7; i++)
irq_controller[i] = &auto_irq_controller;
irq_set_chip_and_handler(i, &auto_irq_chip, handle_simple_irq);
mach_init_IRQ();
}
@ -106,7 +76,7 @@ void __init init_IRQ(void)
* @handler: called from auto vector interrupts
*
* setup the handler to be called from auto vector interrupts instead of the
* standard __m68k_handle_int(), it will be called with irq numbers in the range
* standard do_IRQ(), it will be called with irq numbers in the range
* from IRQ_AUTO_1 - IRQ_AUTO_7.
*/
void __init m68k_setup_auto_interrupt(void (*handler)(unsigned int, struct pt_regs *))
@ -120,217 +90,49 @@ void __init m68k_setup_auto_interrupt(void (*handler)(unsigned int, struct pt_re
* m68k_setup_user_interrupt
* @vec: first user vector interrupt to handle
* @cnt: number of active user vector interrupts
* @handler: called from user vector interrupts
*
* setup user vector interrupts, this includes activating the specified range
* of interrupts, only then these interrupts can be requested (note: this is
* different from auto vector interrupts). An optional handler can be installed
* to be called instead of the default __m68k_handle_int(), it will be called
* with irq numbers starting from IRQ_USER.
* different from auto vector interrupts).
*/
void __init m68k_setup_user_interrupt(unsigned int vec, unsigned int cnt,
void (*handler)(unsigned int, struct pt_regs *))
void __init m68k_setup_user_interrupt(unsigned int vec, unsigned int cnt)
{
int i;
BUG_ON(IRQ_USER + cnt > NR_IRQS);
m68k_first_user_vec = vec;
for (i = 0; i < cnt; i++)
irq_controller[IRQ_USER + i] = &user_irq_controller;
irq_set_chip(IRQ_USER + i, &user_irq_chip);
*user_irqvec_fixup = vec - IRQ_USER;
if (handler)
*user_irqhandler_fixup = (u32)handler;
flush_icache();
}
/**
* m68k_setup_irq_controller
* @contr: irq controller which controls specified irq
* @chip: irq chip which controls specified irq
* @handle: flow handler which handles specified irq
* @irq: first irq to be managed by the controller
* @cnt: number of irqs to be managed by the controller
*
* Change the controller for the specified range of irq, which will be used to
* manage these irq. auto/user irq already have a default controller, which can
* be changed as well, but the controller probably should use m68k_irq_startup/
* m68k_irq_shutdown.
*/
void m68k_setup_irq_controller(struct irq_controller *contr, unsigned int irq,
void m68k_setup_irq_controller(struct irq_chip *chip,
irq_flow_handler_t handle, unsigned int irq,
unsigned int cnt)
{
int i;
for (i = 0; i < cnt; i++)
irq_controller[irq + i] = contr;
for (i = 0; i < cnt; i++) {
irq_set_chip(irq + i, chip);
if (handle)
irq_set_handler(irq + i, handle);
}
}
irq_node_t *new_irq_node(void)
{
irq_node_t *node;
short i;
for (node = nodes, i = NUM_IRQ_NODES-1; i >= 0; node++, i--) {
if (!node->handler) {
memset(node, 0, sizeof(*node));
return node;
}
}
printk ("new_irq_node: out of nodes\n");
return NULL;
}
int setup_irq(unsigned int irq, struct irq_node *node)
{
struct irq_controller *contr;
struct irq_node **prev;
unsigned long flags;
if (irq >= NR_IRQS || !(contr = irq_controller[irq])) {
printk("%s: Incorrect IRQ %d from %s\n",
__func__, irq, node->devname);
return -ENXIO;
}
spin_lock_irqsave(&contr->lock, flags);
prev = irq_list + irq;
if (*prev) {
/* Can't share interrupts unless both agree to */
if (!((*prev)->flags & node->flags & IRQF_SHARED)) {
spin_unlock_irqrestore(&contr->lock, flags);
return -EBUSY;
}
while (*prev)
prev = &(*prev)->next;
}
if (!irq_list[irq]) {
if (contr->startup)
contr->startup(irq);
else
contr->enable(irq);
}
node->next = NULL;
*prev = node;
spin_unlock_irqrestore(&contr->lock, flags);
return 0;
}
int request_irq(unsigned int irq,
irq_handler_t handler,
unsigned long flags, const char *devname, void *dev_id)
{
struct irq_node *node;
int res;
node = new_irq_node();
if (!node)
return -ENOMEM;
node->handler = handler;
node->flags = flags;
node->dev_id = dev_id;
node->devname = devname;
res = setup_irq(irq, node);
if (res)
node->handler = NULL;
return res;
}
EXPORT_SYMBOL(request_irq);
void free_irq(unsigned int irq, void *dev_id)
{
struct irq_controller *contr;
struct irq_node **p, *node;
unsigned long flags;
if (irq >= NR_IRQS || !(contr = irq_controller[irq])) {
printk("%s: Incorrect IRQ %d\n", __func__, irq);
return;
}
spin_lock_irqsave(&contr->lock, flags);
p = irq_list + irq;
while ((node = *p)) {
if (node->dev_id == dev_id)
break;
p = &node->next;
}
if (node) {
*p = node->next;
node->handler = NULL;
} else
printk("%s: Removing probably wrong IRQ %d\n",
__func__, irq);
if (!irq_list[irq]) {
if (contr->shutdown)
contr->shutdown(irq);
else
contr->disable(irq);
}
spin_unlock_irqrestore(&contr->lock, flags);
}
EXPORT_SYMBOL(free_irq);
void enable_irq(unsigned int irq)
{
struct irq_controller *contr;
unsigned long flags;
if (irq >= NR_IRQS || !(contr = irq_controller[irq])) {
printk("%s: Incorrect IRQ %d\n",
__func__, irq);
return;
}
spin_lock_irqsave(&contr->lock, flags);
if (irq_depth[irq]) {
if (!--irq_depth[irq]) {
if (contr->enable)
contr->enable(irq);
}
} else
WARN_ON(1);
spin_unlock_irqrestore(&contr->lock, flags);
}
EXPORT_SYMBOL(enable_irq);
void disable_irq(unsigned int irq)
{
struct irq_controller *contr;
unsigned long flags;
if (irq >= NR_IRQS || !(contr = irq_controller[irq])) {
printk("%s: Incorrect IRQ %d\n",
__func__, irq);
return;
}
spin_lock_irqsave(&contr->lock, flags);
if (!irq_depth[irq]++) {
if (contr->disable)
contr->disable(irq);
}
spin_unlock_irqrestore(&contr->lock, flags);
}
EXPORT_SYMBOL(disable_irq);
void disable_irq_nosync(unsigned int irq) __attribute__((alias("disable_irq")));
EXPORT_SYMBOL(disable_irq_nosync);
int m68k_irq_startup(unsigned int irq)
unsigned int m68k_irq_startup_irq(unsigned int irq)
{
if (irq <= IRQ_AUTO_7)
vectors[VEC_SPUR + irq] = auto_inthandler;
@ -339,8 +141,15 @@ int m68k_irq_startup(unsigned int irq)
return 0;
}
void m68k_irq_shutdown(unsigned int irq)
unsigned int m68k_irq_startup(struct irq_data *data)
{
return m68k_irq_startup_irq(data->irq);
}
void m68k_irq_shutdown(struct irq_data *data)
{
unsigned int irq = data->irq;
if (irq <= IRQ_AUTO_7)
vectors[VEC_SPUR + irq] = bad_inthandler;
else
@ -348,33 +157,6 @@ void m68k_irq_shutdown(unsigned int irq)
}
/*
* Do we need these probe functions on the m68k?
*
* ... may be useful with ISA devices
*/
unsigned long probe_irq_on (void)
{
#ifdef CONFIG_Q40
if (MACH_IS_Q40)
return q40_probe_irq_on();
#endif
return 0;
}
EXPORT_SYMBOL(probe_irq_on);
int probe_irq_off (unsigned long irqs)
{
#ifdef CONFIG_Q40
if (MACH_IS_Q40)
return q40_probe_irq_off(irqs);
#endif
return 0;
}
EXPORT_SYMBOL(probe_irq_off);
unsigned int irq_canonicalize(unsigned int irq)
{
#ifdef CONFIG_Q40
@ -386,52 +168,9 @@ unsigned int irq_canonicalize(unsigned int irq)
EXPORT_SYMBOL(irq_canonicalize);
asmlinkage void m68k_handle_int(unsigned int irq)
{
struct irq_node *node;
kstat_cpu(0).irqs[irq]++;
node = irq_list[irq];
do {
node->handler(irq, node->dev_id);
node = node->next;
} while (node);
}
asmlinkage void __m68k_handle_int(unsigned int irq, struct pt_regs *regs)
{
struct pt_regs *old_regs;
old_regs = set_irq_regs(regs);
m68k_handle_int(irq);
set_irq_regs(old_regs);
}
asmlinkage void handle_badint(struct pt_regs *regs)
{
kstat_cpu(0).irqs[0]++;
printk("unexpected interrupt from %u\n", regs->vector);
atomic_inc(&irq_err_count);
pr_warn("unexpected interrupt from %u\n", regs->vector);
}
int show_interrupts(struct seq_file *p, void *v)
{
struct irq_controller *contr;
struct irq_node *node;
int i = *(loff_t *) v;
/* autovector interrupts */
if (irq_list[i]) {
contr = irq_controller[i];
node = irq_list[i];
seq_printf(p, "%-8s %3u: %10u %s", contr->name, i, kstat_cpu(0).irqs[i], node->devname);
while ((node = node->next))
seq_printf(p, ", %s", node->devname);
seq_puts(p, "\n");
}
return 0;
}
#ifdef CONFIG_PROC_FS
void init_irq_proc(void)
{
/* Insert /proc/irq driver here */
}
#endif

21
arch/m68k/mac/baboon.c
View File

@ -11,6 +11,7 @@
#include <linux/mm.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/traps.h>
#include <asm/bootinfo.h>
@ -20,9 +21,6 @@
/* #define DEBUG_IRQS */
extern void mac_enable_irq(unsigned int);
extern void mac_disable_irq(unsigned int);
int baboon_present;
static volatile struct baboon *baboon;
static unsigned char baboon_disabled;
@ -53,7 +51,7 @@ void __init baboon_init(void)
* Baboon interrupt handler. This works a lot like a VIA.
*/
static irqreturn_t baboon_irq(int irq, void *dev_id)
static void baboon_irq(unsigned int irq, struct irq_desc *desc)
{
int irq_bit, irq_num;
unsigned char events;
@ -64,15 +62,16 @@ static irqreturn_t baboon_irq(int irq, void *dev_id)
(uint) baboon->mb_status);
#endif
if (!(events = baboon->mb_ifr & 0x07))
return IRQ_NONE;
events = baboon->mb_ifr & 0x07;
if (!events)
return;
irq_num = IRQ_BABOON_0;
irq_bit = 1;
do {
if (events & irq_bit) {
baboon->mb_ifr &= ~irq_bit;
m68k_handle_int(irq_num);
generic_handle_irq(irq_num);
}
irq_bit <<= 1;
irq_num++;
@ -82,7 +81,6 @@ static irqreturn_t baboon_irq(int irq, void *dev_id)
/* for now we need to smash all interrupts */
baboon->mb_ifr &= ~events;
#endif
return IRQ_HANDLED;
}
/*
@ -92,8 +90,7 @@ static irqreturn_t baboon_irq(int irq, void *dev_id)
void __init baboon_register_interrupts(void)
{
baboon_disabled = 0;
if (request_irq(IRQ_NUBUS_C, baboon_irq, 0, "baboon", (void *)baboon))
pr_err("Couldn't register baboon interrupt\n");
irq_set_chained_handler(IRQ_NUBUS_C, baboon_irq);
}
/*
@ -111,7 +108,7 @@ void baboon_irq_enable(int irq)
baboon_disabled &= ~(1 << irq_idx);
if (!baboon_disabled)
mac_enable_irq(IRQ_NUBUS_C);
mac_irq_enable(irq_get_irq_data(IRQ_NUBUS_C));
}
void baboon_irq_disable(int irq)
@ -124,7 +121,7 @@ void baboon_irq_disable(int irq)
baboon_disabled |= 1 << irq_idx;
if (baboon_disabled)
mac_disable_irq(IRQ_NUBUS_C);
mac_irq_disable(irq_get_irq_data(IRQ_NUBUS_C));
}
void baboon_irq_clear(int irq)

10
arch/m68k/mac/iop.c
View File

@ -305,15 +305,13 @@ void __init iop_register_interrupts(void)
{
if (iop_ism_present) {
if (oss_present) {
if (request_irq(OSS_IRQLEV_IOPISM, iop_ism_irq,
IRQ_FLG_LOCK, "ISM IOP",
(void *) IOP_NUM_ISM))
if (request_irq(OSS_IRQLEV_IOPISM, iop_ism_irq, 0,
"ISM IOP", (void *)IOP_NUM_ISM))
pr_err("Couldn't register ISM IOP interrupt\n");
oss_irq_enable(IRQ_MAC_ADB);
} else {
if (request_irq(IRQ_VIA2_0, iop_ism_irq,
IRQ_FLG_LOCK|IRQ_FLG_FAST, "ISM IOP",
(void *) IOP_NUM_ISM))
if (request_irq(IRQ_VIA2_0, iop_ism_irq, 0, "ISM IOP",
(void *)IOP_NUM_ISM))
pr_err("Couldn't register ISM IOP interrupt\n");
}
if (!iop_alive(iop_base[IOP_NUM_ISM])) {

24
arch/m68k/mac/macints.c
View File

@ -190,14 +190,10 @@ irqreturn_t mac_debug_handler(int, void *);
/* #define DEBUG_MACINTS */
void mac_enable_irq(unsigned int irq);
void mac_disable_irq(unsigned int irq);
static struct irq_controller mac_irq_controller = {
static struct irq_chip mac_irq_chip = {
.name = "mac",
.lock = __SPIN_LOCK_UNLOCKED(mac_irq_controller.lock),
.enable = mac_enable_irq,
.disable = mac_disable_irq,
.irq_enable = mac_irq_enable,
.irq_disable = mac_irq_disable,
};
void __init mac_init_IRQ(void)
@ -205,7 +201,7 @@ void __init mac_init_IRQ(void)
#ifdef DEBUG_MACINTS
printk("mac_init_IRQ(): Setting things up...\n");
#endif
m68k_setup_irq_controller(&mac_irq_controller, IRQ_USER,
m68k_setup_irq_controller(&mac_irq_chip, handle_simple_irq, IRQ_USER,
NUM_MAC_SOURCES - IRQ_USER);
/* Make sure the SONIC interrupt is cleared or things get ugly */
#ifdef SHUTUP_SONIC
@ -241,16 +237,17 @@ void __init mac_init_IRQ(void)
}
/*
* mac_enable_irq - enable an interrupt source
* mac_disable_irq - disable an interrupt source
* mac_irq_enable - enable an interrupt source
* mac_irq_disable - disable an interrupt source
* mac_clear_irq - clears a pending interrupt
* mac_pending_irq - Returns the pending status of an IRQ (nonzero = pending)
* mac_irq_pending - returns the pending status of an IRQ (nonzero = pending)
*
* These routines are just dispatchers to the VIA/OSS/PSC routines.
*/
void mac_enable_irq(unsigned int irq)
void mac_irq_enable(struct irq_data *data)
{
int irq = data->irq;
int irq_src = IRQ_SRC(irq);
switch(irq_src) {
@ -283,8 +280,9 @@ void mac_enable_irq(unsigned int irq)
}
}
void mac_disable_irq(unsigned int irq)
void mac_irq_disable(struct irq_data *data)
{
int irq = data->irq;
int irq_src = IRQ_SRC(irq);
switch(irq_src) {

54
arch/m68k/mac/oss.c
View File

@ -19,6 +19,7 @@
#include <linux/mm.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/bootinfo.h>
#include <asm/macintosh.h>
@ -29,10 +30,7 @@
int oss_present;
volatile struct mac_oss *oss;
static irqreturn_t oss_irq(int, void *);
static irqreturn_t oss_nubus_irq(int, void *);
extern irqreturn_t via1_irq(int, void *);
extern void via1_irq(unsigned int irq, struct irq_desc *desc);
/*
* Initialize the OSS
@ -59,26 +57,6 @@ void __init oss_init(void)
oss->irq_level[OSS_VIA1] = OSS_IRQLEV_VIA1;
}
/*
* Register the OSS and NuBus interrupt dispatchers.
*/
void __init oss_register_interrupts(void)
{
if (request_irq(OSS_IRQLEV_SCSI, oss_irq, IRQ_FLG_LOCK,
"scsi", (void *) oss))
pr_err("Couldn't register %s interrupt\n", "scsi");
if (request_irq(OSS_IRQLEV_NUBUS, oss_nubus_irq, IRQ_FLG_LOCK,
"nubus", (void *) oss))
pr_err("Couldn't register %s interrupt\n", "nubus");
if (request_irq(OSS_IRQLEV_SOUND, oss_irq, IRQ_FLG_LOCK,
"sound", (void *) oss))
pr_err("Couldn't register %s interrupt\n", "sound");
if (request_irq(OSS_IRQLEV_VIA1, via1_irq, IRQ_FLG_LOCK,
"via1", (void *) via1))
pr_err("Couldn't register %s interrupt\n", "via1");
}
/*
* Initialize OSS for Nubus access
*/
@ -92,17 +70,17 @@ void __init oss_nubus_init(void)
* and SCSI; everything else is routed to its own autovector IRQ.
*/
static irqreturn_t oss_irq(int irq, void *dev_id)
static void oss_irq(unsigned int irq, struct irq_desc *desc)
{
int events;
events = oss->irq_pending & (OSS_IP_SOUND|OSS_IP_SCSI);
if (!events)
return IRQ_NONE;
return;
#ifdef DEBUG_IRQS
if ((console_loglevel == 10) && !(events & OSS_IP_SCSI)) {
printk("oss_irq: irq %d events = 0x%04X\n", irq,
printk("oss_irq: irq %u events = 0x%04X\n", irq,
(int) oss->irq_pending);
}
#endif
@ -113,11 +91,10 @@ static irqreturn_t oss_irq(int irq, void *dev_id)
/* FIXME: call sound handler */
} else if (events & OSS_IP_SCSI) {
oss->irq_pending &= ~OSS_IP_SCSI;
m68k_handle_int(IRQ_MAC_SCSI);
generic_handle_irq(IRQ_MAC_SCSI);
} else {
/* FIXME: error check here? */
}
return IRQ_HANDLED;
}
/*
@ -126,13 +103,13 @@ static irqreturn_t oss_irq(int irq, void *dev_id)
* Unlike the VIA/RBV this is on its own autovector interrupt level.
*/
static irqreturn_t oss_nubus_irq(int irq, void *dev_id)
static void oss_nubus_irq(unsigned int irq, struct irq_desc *desc)
{
int events, irq_bit, i;
events = oss->irq_pending & OSS_IP_NUBUS;
if (!events)
return IRQ_NONE;
return;
#ifdef DEBUG_NUBUS_INT
if (console_loglevel > 7) {
@ -148,10 +125,21 @@ static irqreturn_t oss_nubus_irq(int irq, void *dev_id)
irq_bit >>= 1;
if (events & irq_bit) {
oss->irq_pending &= ~irq_bit;
m68k_handle_int(NUBUS_SOURCE_BASE + i);
generic_handle_irq(NUBUS_SOURCE_BASE + i);
}
} while(events & (irq_bit - 1));
return IRQ_HANDLED;
}
/*
* Register the OSS and NuBus interrupt dispatchers.
*/
void __init oss_register_interrupts(void)
{
irq_set_chained_handler(OSS_IRQLEV_SCSI, oss_irq);
irq_set_chained_handler(OSS_IRQLEV_NUBUS, oss_nubus_irq);
irq_set_chained_handler(OSS_IRQLEV_SOUND, oss_irq);
irq_set_chained_handler(OSS_IRQLEV_VIA1, via1_irq);
}
/*

49
arch/m68k/mac/psc.c
View File

@ -18,6 +18,7 @@
#include <linux/mm.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/traps.h>
#include <asm/bootinfo.h>
@ -30,8 +31,6 @@
int psc_present;
volatile __u8 *psc;
irqreturn_t psc_irq(int, void *);
/*
* Debugging dump, used in various places to see what's going on.
*/
@ -111,53 +110,53 @@ void __init psc_init(void)
}
}
/*
* Register the PSC interrupt dispatchers for autovector interrupts 3-6.
*/
void __init psc_register_interrupts(void)
{
if (request_irq(IRQ_AUTO_3, psc_irq, 0, "psc3", (void *) 0x30))
pr_err("Couldn't register psc%d interrupt\n", 3);
if (request_irq(IRQ_AUTO_4, psc_irq, 0, "psc4", (void *) 0x40))
pr_err("Couldn't register psc%d interrupt\n", 4);
if (request_irq(IRQ_AUTO_5, psc_irq, 0, "psc5", (void *) 0x50))
pr_err("Couldn't register psc%d interrupt\n", 5);
if (request_irq(IRQ_AUTO_6, psc_irq, 0, "psc6", (void *) 0x60))
pr_err("Couldn't register psc%d interrupt\n", 6);
}
/*
* PSC interrupt handler. It's a lot like the VIA interrupt handler.
*/
irqreturn_t psc_irq(int irq, void *dev_id)
static void psc_irq(unsigned int irq, struct irq_desc *desc)
{
int pIFR = pIFRbase + ((int) dev_id);
int pIER = pIERbase + ((int) dev_id);
unsigned int offset = (unsigned int)irq_desc_get_handler_data(desc);
int pIFR = pIFRbase + offset;
int pIER = pIERbase + offset;
int irq_num;
unsigned char irq_bit, events;
#ifdef DEBUG_IRQS
printk("psc_irq: irq %d pIFR = 0x%02X pIER = 0x%02X\n",
printk("psc_irq: irq %u pIFR = 0x%02X pIER = 0x%02X\n",
irq, (int) psc_read_byte(pIFR), (int) psc_read_byte(pIER));
#endif
events = psc_read_byte(pIFR) & psc_read_byte(pIER) & 0xF;
if (!events)
return IRQ_NONE;
return;
irq_num = irq << 3;
irq_bit = 1;
do {
if (events & irq_bit) {
psc_write_byte(pIFR, irq_bit);
m68k_handle_int(irq_num);
generic_handle_irq(irq_num);
}
irq_num++;
irq_bit <<= 1;
} while (events >= irq_bit);
return IRQ_HANDLED;
}
/*
* Register the PSC interrupt dispatchers for autovector interrupts 3-6.
*/
void __init psc_register_interrupts(void)
{
irq_set_chained_handler(IRQ_AUTO_3, psc_irq);
irq_set_handler_data(IRQ_AUTO_3, (void *)0x30);
irq_set_chained_handler(IRQ_AUTO_4, psc_irq);
irq_set_handler_data(IRQ_AUTO_4, (void *)0x40);
irq_set_chained_handler(IRQ_AUTO_5, psc_irq);
irq_set_handler_data(IRQ_AUTO_5, (void *)0x50);
irq_set_chained_handler(IRQ_AUTO_6, psc_irq);
irq_set_handler_data(IRQ_AUTO_6, (void *)0x60);
}
void psc_irq_enable(int irq) {

74
arch/m68k/mac/via.c
View File

@ -28,6 +28,7 @@
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/irq.h>
#include <asm/bootinfo.h>
#include <asm/macintosh.h>
@ -77,9 +78,6 @@ static int gIER,gIFR,gBufA,gBufB;
static u8 nubus_disabled;
void via_debug_dump(void);
irqreturn_t via1_irq(int, void *);
irqreturn_t via2_irq(int, void *);
irqreturn_t via_nubus_irq(int, void *);
void via_irq_enable(int irq);
void via_irq_disable(int irq);
void via_irq_clear(int irq);
@ -281,39 +279,10 @@ void __init via_init_clock(irq_handler_t func)
via1[vT1CL] = MAC_CLOCK_LOW;
via1[vT1CH] = MAC_CLOCK_HIGH;
if (request_irq(IRQ_MAC_TIMER_1, func, IRQ_FLG_LOCK, "timer", func))
if (request_irq(IRQ_MAC_TIMER_1, func, 0, "timer", func))
pr_err("Couldn't register %s interrupt\n", "timer");
}
/*
* Register the interrupt dispatchers for VIA or RBV machines only.
*/
void __init via_register_interrupts(void)
{
if (via_alt_mapping) {
if (request_irq(IRQ_AUTO_1, via1_irq,
IRQ_FLG_LOCK|IRQ_FLG_FAST, "software",
(void *) via1))
pr_err("Couldn't register %s interrupt\n", "software");
if (request_irq(IRQ_AUTO_6, via1_irq,
IRQ_FLG_LOCK|IRQ_FLG_FAST, "via1",
(void *) via1))
pr_err("Couldn't register %s interrupt\n", "via1");
} else {
if (request_irq(IRQ_AUTO_1, via1_irq,
IRQ_FLG_LOCK|IRQ_FLG_FAST, "via1",
(void *) via1))
pr_err("Couldn't register %s interrupt\n", "via1");
}
if (request_irq(IRQ_AUTO_2, via2_irq, IRQ_FLG_LOCK|IRQ_FLG_FAST,
"via2", (void *) via2))
pr_err("Couldn't register %s interrupt\n", "via2");
if (request_irq(IRQ_MAC_NUBUS, via_nubus_irq,
IRQ_FLG_LOCK|IRQ_FLG_FAST, "nubus", (void *) via2))
pr_err("Couldn't register %s interrupt\n", "nubus");
}
/*
* Debugging dump, used in various places to see what's going on.
*/
@ -446,48 +415,46 @@ void __init via_nubus_init(void)
* via6522.c :-), disable/pending masks added.
*/
irqreturn_t via1_irq(int irq, void *dev_id)
void via1_irq(unsigned int irq, struct irq_desc *desc)
{
int irq_num;
unsigned char irq_bit, events;
events = via1[vIFR] & via1[vIER] & 0x7F;
if (!events)
return IRQ_NONE;
return;
irq_num = VIA1_SOURCE_BASE;
irq_bit = 1;
do {
if (events & irq_bit) {
via1[vIFR] = irq_bit;
m68k_handle_int(irq_num);
generic_handle_irq(irq_num);
}
++irq_num;
irq_bit <<= 1;
} while (events >= irq_bit);
return IRQ_HANDLED;
}
irqreturn_t via2_irq(int irq, void *dev_id)
static void via2_irq(unsigned int irq, struct irq_desc *desc)
{
int irq_num;
unsigned char irq_bit, events;
events = via2[gIFR] & via2[gIER] & 0x7F;
if (!events)
return IRQ_NONE;
return;
irq_num = VIA2_SOURCE_BASE;
irq_bit = 1;
do {
if (events & irq_bit) {
via2[gIFR] = irq_bit | rbv_clear;
m68k_handle_int(irq_num);
generic_handle_irq(irq_num);
}
++irq_num;
irq_bit <<= 1;
} while (events >= irq_bit);
return IRQ_HANDLED;
}
/*
@ -495,7 +462,7 @@ irqreturn_t via2_irq(int irq, void *dev_id)
* VIA2 dispatcher as a fast interrupt handler.
*/
irqreturn_t via_nubus_irq(int irq, void *dev_id)
void via_nubus_irq(unsigned int irq, struct irq_desc *desc)
{
int slot_irq;
unsigned char slot_bit, events;
@ -506,7 +473,7 @@ irqreturn_t via_nubus_irq(int irq, void *dev_id)
else
events &= ~via2[vDirA];
if (!events)
return IRQ_NONE;
return;
do {
slot_irq = IRQ_NUBUS_F;
@ -514,7 +481,7 @@ irqreturn_t via_nubus_irq(int irq, void *dev_id)
do {
if (events & slot_bit) {
events &= ~slot_bit;
m68k_handle_int(slot_irq);
generic_handle_irq(slot_irq);
}
--slot_irq;
slot_bit >>= 1;
@ -528,7 +495,24 @@ irqreturn_t via_nubus_irq(int irq, void *dev_id)
else
events &= ~via2[vDirA];
} while (events);
return IRQ_HANDLED;
}
/*
* Register the interrupt dispatchers for VIA or RBV machines only.
*/
void __init via_register_interrupts(void)
{
if (via_alt_mapping) {
/* software interrupt */
irq_set_chained_handler(IRQ_AUTO_1, via1_irq);
/* via1 interrupt */
irq_set_chained_handler(IRQ_AUTO_6, via1_irq);
} else {
irq_set_chained_handler(IRQ_AUTO_1, via1_irq);
}
irq_set_chained_handler(IRQ_AUTO_2, via2_irq);
irq_set_chained_handler(IRQ_MAC_NUBUS, via_nubus_irq);
}
void via_irq_enable(int irq) {

5
arch/m68k/mvme147/config.c
View File

@ -81,7 +81,7 @@ static void mvme147_get_model(char *model)
void __init mvme147_init_IRQ(void)
{
m68k_setup_user_interrupt(VEC_USER, 192, NULL);
m68k_setup_user_interrupt(VEC_USER, 192);
}
void __init config_mvme147(void)
@ -114,8 +114,7 @@ static irqreturn_t mvme147_timer_int (int irq, void *dev_id)
void mvme147_sched_init (irq_handler_t timer_routine)
{
tick_handler = timer_routine;
if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, IRQ_FLG_REPLACE,
"timer 1", NULL))
if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, 0, "timer 1", NULL))
pr_err("Couldn't register timer interrupt\n");
/* Init the clock with a value */

2
arch/m68k/mvme16x/config.c
View File

@ -117,7 +117,7 @@ static void mvme16x_get_hardware_list(struct seq_file *m)
static void __init mvme16x_init_IRQ (void)
{
m68k_setup_user_interrupt(VEC_USER, 192, NULL);
m68k_setup_user_interrupt(VEC_USER, 192);
}
#define pcc2chip ((volatile u_char *)0xfff42000)

60
arch/m68k/q40/q40ints.c
View File

@ -15,10 +15,10 @@
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <asm/ptrace.h>
#include <asm/system.h>
#include <asm/irq.h>
#include <asm/traps.h>
#include <asm/q40_master.h>
@ -35,35 +35,36 @@
*/
static void q40_irq_handler(unsigned int, struct pt_regs *fp);
static void q40_enable_irq(unsigned int);
static void q40_disable_irq(unsigned int);
static void q40_irq_enable(struct irq_data *data);
static void q40_irq_disable(struct irq_data *data);
unsigned short q40_ablecount[35];
unsigned short q40_state[35];
static int q40_irq_startup(unsigned int irq)
static unsigned int q40_irq_startup(struct irq_data *data)
{
unsigned int irq = data->irq;
/* test for ISA ints not implemented by HW */
switch (irq) {
case 1: case 2: case 8: case 9:
case 11: case 12: case 13:
printk("%s: ISA IRQ %d not implemented by HW\n", __func__, irq);
return -ENXIO;
/* FIXME return -ENXIO; */
}
return 0;
}
static void q40_irq_shutdown(unsigned int irq)
static void q40_irq_shutdown(struct irq_data *data)
{
}
static struct irq_controller q40_irq_controller = {
static struct irq_chip q40_irq_chip = {
.name = "q40",
.lock = __SPIN_LOCK_UNLOCKED(q40_irq_controller.lock),
.startup = q40_irq_startup,
.shutdown = q40_irq_shutdown,
.enable = q40_enable_irq,
.disable = q40_disable_irq,
.irq_startup = q40_irq_startup,
.irq_shutdown = q40_irq_shutdown,
.irq_enable = q40_irq_enable,
.irq_disable = q40_irq_disable,
};
/*
@ -81,13 +82,14 @@ static int disabled;
void __init q40_init_IRQ(void)
{
m68k_setup_irq_controller(&q40_irq_controller, 1, Q40_IRQ_MAX);
m68k_setup_irq_controller(&q40_irq_chip, handle_simple_irq, 1,
Q40_IRQ_MAX);
/* setup handler for ISA ints */
m68k_setup_auto_interrupt(q40_irq_handler);
m68k_irq_startup(IRQ_AUTO_2);
m68k_irq_startup(IRQ_AUTO_4);
m68k_irq_startup_irq(IRQ_AUTO_2);
m68k_irq_startup_irq(IRQ_AUTO_4);
/* now enable some ints.. */
master_outb(1, EXT_ENABLE_REG); /* ISA IRQ 5-15 */
@ -218,11 +220,11 @@ static void q40_irq_handler(unsigned int irq, struct pt_regs *fp)
switch (irq) {
case 4:
case 6:
__m68k_handle_int(Q40_IRQ_SAMPLE, fp);
do_IRQ(Q40_IRQ_SAMPLE, fp);
return;
}
if (mir & Q40_IRQ_FRAME_MASK) {
__m68k_handle_int(Q40_IRQ_FRAME, fp);
do_IRQ(Q40_IRQ_FRAME, fp);
master_outb(-1, FRAME_CLEAR_REG);
}
if ((mir & Q40_IRQ_SER_MASK) || (mir & Q40_IRQ_EXT_MASK)) {
@ -257,7 +259,7 @@ static void q40_irq_handler(unsigned int irq, struct pt_regs *fp)
goto iirq;
}
q40_state[irq] |= IRQ_INPROGRESS;
__m68k_handle_int(irq, fp);
do_IRQ(irq, fp);
q40_state[irq] &= ~IRQ_INPROGRESS;
/* naively enable everything, if that fails than */
@ -288,25 +290,29 @@ static void q40_irq_handler(unsigned int irq, struct pt_regs *fp)
mir = master_inb(IIRQ_REG);
/* should test whether keyboard irq is really enabled, doing it in defhand */
if (mir & Q40_IRQ_KEYB_MASK)
__m68k_handle_int(Q40_IRQ_KEYBOARD, fp);
do_IRQ(Q40_IRQ_KEYBOARD, fp);
return;
}
void q40_enable_irq(unsigned int irq)
void q40_irq_enable(struct irq_data *data)
{
unsigned int irq = data->irq;
if (irq >= 5 && irq <= 15) {
mext_disabled--;
if (mext_disabled > 0)
printk("q40_enable_irq : nested disable/enable\n");
printk("q40_irq_enable : nested disable/enable\n");
if (mext_disabled == 0)
master_outb(1, EXT_ENABLE_REG);
}
}
void q40_disable_irq(unsigned int irq)
void q40_irq_disable(struct irq_data *data)
{
unsigned int irq = data->irq;
/* disable ISA iqs : only do something if the driver has been
* verified to be Q40 "compatible" - right now IDE, NE2K
* Any driver should not attempt to sleep across disable_irq !!
@ -319,13 +325,3 @@ void q40_disable_irq(unsigned int irq)
printk("disable_irq nesting count %d\n",mext_disabled);
}
}
unsigned long q40_probe_irq_on(void)
{
printk("irq probing not working - reconfigure the driver to avoid this\n");
return -1;
}
int q40_probe_irq_off(unsigned long irqs)
{
return -1;
}

46
arch/m68k/sun3/sun3ints.c
View File

@ -51,25 +51,29 @@ void sun3_disable_irq(unsigned int irq)
static irqreturn_t sun3_int7(int irq, void *dev_id)
{
*sun3_intreg |= (1 << irq);
if (!(kstat_cpu(0).irqs[irq] % 2000))
sun3_leds(led_pattern[(kstat_cpu(0).irqs[irq] % 16000) / 2000]);
unsigned int cnt;
cnt = kstat_irqs_cpu(irq, 0);
if (!(cnt % 2000))
sun3_leds(led_pattern[cnt % 16000 / 2000]);
return IRQ_HANDLED;
}
static irqreturn_t sun3_int5(int irq, void *dev_id)
{
unsigned int cnt;
#ifdef CONFIG_SUN3
intersil_clear();
#endif
*sun3_intreg |= (1 << irq);
#ifdef CONFIG_SUN3
intersil_clear();
#endif
xtime_update(1);
update_process_times(user_mode(get_irq_regs()));
if (!(kstat_cpu(0).irqs[irq] % 20))
sun3_leds(led_pattern[(kstat_cpu(0).irqs[irq] % 160) / 20]);
cnt = kstat_irqs_cpu(irq, 0);
if (!(cnt % 20))
sun3_leds(led_pattern[cnt % 160 / 20]);
return IRQ_HANDLED;
}
@ -79,29 +83,33 @@ static irqreturn_t sun3_vec255(int irq, void *dev_id)
return IRQ_HANDLED;
}
static void sun3_inthandle(unsigned int irq, struct pt_regs *fp)
static void sun3_irq_enable(struct irq_data *data)
{
*sun3_intreg &= ~(1 << irq);
sun3_enable_irq(data->irq);
};
__m68k_handle_int(irq, fp);
}
static void sun3_irq_disable(struct irq_data *data)
{
sun3_disable_irq(data->irq);
};
static struct irq_controller sun3_irq_controller = {
static struct irq_chip sun3_irq_chip = {
.name = "sun3",
.lock = __SPIN_LOCK_UNLOCKED(sun3_irq_controller.lock),
.startup = m68k_irq_startup,
.shutdown = m68k_irq_shutdown,
.enable = sun3_enable_irq,
.disable = sun3_disable_irq,
.irq_startup = m68k_irq_startup,
.irq_shutdown = m68k_irq_shutdown,
.irq_enable = sun3_irq_enable,
.irq_disable = sun3_irq_disable,
.irq_mask = sun3_irq_disable,
.irq_unmask = sun3_irq_enable,
};
void __init sun3_init_IRQ(void)
{
*sun3_intreg = 1;
m68k_setup_auto_interrupt(sun3_inthandle);
m68k_setup_irq_controller(&sun3_irq_controller, IRQ_AUTO_1, 7);
m68k_setup_user_interrupt(VEC_USER, 128, NULL);
m68k_setup_irq_controller(&sun3_irq_chip, handle_level_irq, IRQ_AUTO_1,
7);
m68k_setup_user_interrupt(VEC_USER, 128);
if (request_irq(IRQ_AUTO_5, sun3_int5, 0, "int5", NULL))
pr_err("Couldn't register %s interrupt\n", "int5");

4
arch/mips/Makefile
View File

@ -286,11 +286,11 @@ CLEAN_FILES += vmlinux.32 vmlinux.64
archprepare:
ifdef CONFIG_MIPS32_N32
@echo ' Checking missing-syscalls for N32'
$(Q)$(MAKE) $(build)=. missing-syscalls ccflags-y="-mabi=n32"
$(Q)$(MAKE) $(build)=. missing-syscalls missing_syscalls_flags="-mabi=n32"
endif
ifdef CONFIG_MIPS32_O32
@echo ' Checking missing-syscalls for O32'
$(Q)$(MAKE) $(build)=. missing-syscalls ccflags-y="-mabi=32"
$(Q)$(MAKE) $(build)=. missing-syscalls missing_syscalls_flags="-mabi=32"
endif
install:

8
arch/mips/kernel/perf_event_mipsxx.c
View File

@ -623,7 +623,7 @@ static int mipspmu_event_init(struct perf_event *event)
if (!atomic_inc_not_zero(&active_events)) {
if (atomic_read(&active_events) > MIPS_MAX_HWEVENTS) {
atomic_dec(&active_events);
return -ENOSPC;
return -EINVAL;
}
mutex_lock(&pmu_reserve_mutex);
@ -732,15 +732,15 @@ static int validate_group(struct perf_event *event)
memset(&fake_cpuc, 0, sizeof(fake_cpuc));
if (!validate_event(&fake_cpuc, leader))
return -ENOSPC;
return -EINVAL;
list_for_each_entry(sibling, &leader->sibling_list, group_entry) {
if (!validate_event(&fake_cpuc, sibling))
return -ENOSPC;
return -EINVAL;
}
if (!validate_event(&fake_cpuc, event))
return -ENOSPC;
return -EINVAL;
return 0;
}

236
arch/powerpc/boot/dts/charon.dts Normal file
View File

@ -0,0 +1,236 @@
/*
* charon board Device Tree Source
*
* Copyright (C) 2007 Semihalf
* Marian Balakowicz <m8@semihalf.com>
*
* Copyright (C) 2010 DENX Software Engineering GmbH
* Heiko Schocher <hs@denx.de>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/dts-v1/;
/ {
model = "anon,charon";
compatible = "anon,charon";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&mpc5200_pic>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,5200@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <0x4000>; // L1, 16K
i-cache-size = <0x4000>; // L1, 16K
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000>; // 128MB
};
soc5200@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc5200-immr";
ranges = <0 0xf0000000 0x0000c000>;
reg = <0xf0000000 0x00000100>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
compatible = "fsl,mpc5200-cdm";
reg = <0x200 0x38>;
};
mpc5200_pic: interrupt-controller@500 {
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
compatible = "fsl,mpc5200-pic";
reg = <0x500 0x80>;
};
timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
reg = <0x600 0x10>;
interrupts = <1 9 0>;
fsl,has-wdt;
};
can@900 {
compatible = "fsl,mpc5200-mscan";
interrupts = <2 17 0>;
reg = <0x900 0x80>;
};
can@980 {
compatible = "fsl,mpc5200-mscan";
interrupts = <2 18 0>;
reg = <0x980 0x80>;
};
gpio_simple: gpio@b00 {
compatible = "fsl,mpc5200-gpio";
reg = <0xb00 0x40>;
interrupts = <1 7 0>;
gpio-controller;
#gpio-cells = <2>;
};
usb@1000 {
compatible = "fsl,mpc5200-ohci","ohci-be";
reg = <0x1000 0xff>;
interrupts = <2 6 0>;
};
dma-controller@1200 {
device_type = "dma-controller";
compatible = "fsl,mpc5200-bestcomm";
reg = <0x1200 0x80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 10 0 3 11 0
3 12 0 3 13 0 3 14 0 3 15 0>;
};
xlb@1f00 {
compatible = "fsl,mpc5200-xlb";
reg = <0x1f00 0x100>;
};
serial@2000 { // PSC1
compatible = "fsl,mpc5200-psc-uart";
reg = <0x2000 0x100>;
interrupts = <2 1 0>;
};
serial@2400 { // PSC3
compatible = "fsl,mpc5200-psc-uart";
reg = <0x2400 0x100>;
interrupts = <2 3 0>;
};
ethernet@3000 {
compatible = "fsl,mpc5200-fec";
reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
fixed-link = <1 1 100 0 0>;
};
mdio@3000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200-mdio";
reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
};
ata@3a00 {
compatible = "fsl,mpc5200-ata";
reg = <0x3a00 0x100>;
interrupts = <2 7 0>;
};
i2c@3d00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200-i2c","fsl-i2c";
reg = <0x3d00 0x40>;
interrupts = <2 15 0>;
};
i2c@3d40 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200-i2c","fsl-i2c";
reg = <0x3d40 0x40>;
interrupts = <2 16 0>;
dtt@28 {
compatible = "national,lm80";
reg = <0x28>;
};
rtc@68 {
compatible = "dallas,ds1374";
reg = <0x68>;
};
};
sram@8000 {
compatible = "fsl,mpc5200-sram";
reg = <0x8000 0x4000>;
};
};
localbus {
compatible = "fsl,mpc5200-lpb","simple-bus";
#address-cells = <2>;
#size-cells = <1>;
ranges = < 0 0 0xfc000000 0x02000000
1 0 0xe0000000 0x04000000 // CS1 range, SM501
3 0 0xe8000000 0x00080000>;
flash@0,0 {
compatible = "cfi-flash";
reg = <0 0 0x02000000>;
bank-width = <4>;
device-width = <2>;
#size-cells = <1>;
#address-cells = <1>;
};
display@1,0 {
compatible = "smi,sm501";
reg = <1 0x00000000 0x00800000
1 0x03e00000 0x00200000>;
mode = "640x480-32@60";
interrupts = <1 1 3>;
little-endian;
};
mram0@3,0 {
compatible = "mtd-ram";
reg = <3 0x00000 0x80000>;
bank-width = <1>;
};
};
pci@f0000d00 {
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
compatible = "fsl,mpc5200-pci";
reg = <0xf0000d00 0x100>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3
0xc000 0 0 2 &mpc5200_pic 0 0 3
0xc000 0 0 3 &mpc5200_pic 0 0 3
0xc000 0 0 4 &mpc5200_pic 0 0 3>;
clock-frequency = <0>; // From boot loader
interrupts = <2 8 0 2 9 0 2 10 0>;
bus-range = <0 0>;
ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000
0x02000000 0 0x90000000 0x90000000 0 0x10000000
0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
};
};

20
arch/powerpc/configs/52xx/tqm5200_defconfig
View File

@ -1,9 +1,10 @@
CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_SPARSE_IRQ=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_EXPERT=y
CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_KALLSYMS is not set
# CONFIG_EPOLL is not set
@ -17,7 +18,6 @@ CONFIG_PPC_MPC5200_SIMPLE=y
CONFIG_PPC_MPC5200_BUGFIX=y
# CONFIG_PPC_PMAC is not set
CONFIG_PPC_BESTCOMM=y
CONFIG_SPARSE_IRQ=y
CONFIG_PM=y
# CONFIG_PCI is not set
CONFIG_NET=y
@ -38,17 +38,18 @@ CONFIG_MTD=y
CONFIG_MTD_CONCAT=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_OF_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_ROM=y
CONFIG_MTD_PHYSMAP_OF=y
CONFIG_MTD_PLATRAM=y
CONFIG_PROC_DEVICETREE=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=32768
# CONFIG_MISC_DEVICES is not set
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_SG=y
CONFIG_ATA=y
@ -56,13 +57,11 @@ CONFIG_PATA_MPC52xx=y
CONFIG_PATA_PLATFORM=y
CONFIG_NETDEVICES=y
CONFIG_LXT_PHY=y
CONFIG_FIXED_PHY=y
CONFIG_NET_ETHERNET=y
CONFIG_FEC_MPC52xx=y
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
# CONFIG_INPUT is not set
# CONFIG_SERIO is not set
# CONFIG_VT is not set
CONFIG_SERIAL_MPC52xx=y
CONFIG_SERIAL_MPC52xx_CONSOLE=y
CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD=115200
@ -70,7 +69,13 @@ CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD=115200
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MPC=y
CONFIG_SENSORS_LM80=y
CONFIG_WATCHDOG=y
CONFIG_MFD_SM501=y
CONFIG_FB=y
CONFIG_FB_FOREIGN_ENDIAN=y
CONFIG_FB_SM501=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_USB=y
CONFIG_USB_DEVICEFS=y
# CONFIG_USB_DEVICE_CLASS is not set
@ -80,10 +85,10 @@ CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
CONFIG_USB_STORAGE=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_DS1307=y
CONFIG_RTC_DRV_DS1374=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
CONFIG_INOTIFY=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_PROC_KCORE=y
@ -102,7 +107,6 @@ CONFIG_DEBUG_KERNEL=y
CONFIG_DETECT_HUNG_TASK=y
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_DEBUG_INFO=y
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_PCBC=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set

4
arch/powerpc/configs/ppc64_defconfig
View File

@ -485,3 +485,7 @@ CONFIG_CRYPTO_TWOFISH=m
CONFIG_CRYPTO_LZO=m
# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_HW is not set
CONFIG_VIRTUALIZATION=y
CONFIG_KVM_BOOK3S_64=m
CONFIG_KVM_BOOK3S_64_HV=y
CONFIG_VHOST_NET=m

4
arch/powerpc/configs/pseries_defconfig
View File

@ -362,3 +362,7 @@ CONFIG_CRYPTO_TWOFISH=m
CONFIG_CRYPTO_LZO=m
# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_HW is not set
CONFIG_VIRTUALIZATION=y
CONFIG_KVM_BOOK3S_64=m
CONFIG_KVM_BOOK3S_64_HV=y
CONFIG_VHOST_NET=m

4
arch/powerpc/include/asm/floppy.h
View File

@ -108,10 +108,10 @@ static int fd_request_irq(void)
{
if (can_use_virtual_dma)
return request_irq(FLOPPY_IRQ, floppy_hardint,
IRQF_DISABLED, "floppy", NULL);
0, "floppy", NULL);
else
return request_irq(FLOPPY_IRQ, floppy_interrupt,
IRQF_DISABLED, "floppy", NULL);
0, "floppy", NULL);
}
static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io)

2
arch/powerpc/include/asm/lv1call.h
View File

@ -316,7 +316,7 @@ LV1_CALL(gpu_context_free, 1, 0, 218 )
LV1_CALL(gpu_context_iomap, 5, 0, 221 )
LV1_CALL(gpu_context_attribute, 6, 0, 225 )
LV1_CALL(gpu_context_intr, 1, 1, 227 )
LV1_CALL(gpu_attribute, 5, 0, 228 )
LV1_CALL(gpu_attribute, 3, 0, 228 )
LV1_CALL(get_rtc, 0, 2, 232 )
LV1_CALL(set_ppe_periodic_tracer_frequency, 1, 0, 240 )
LV1_CALL(start_ppe_periodic_tracer, 5, 0, 241 )

4
arch/powerpc/include/asm/xics.h
View File

@ -15,8 +15,8 @@
#define DEFAULT_PRIORITY 5
/*
* Mark IPIs as higher priority so we can take them inside interrupts that
* arent marked IRQF_DISABLED
* Mark IPIs as higher priority so we can take them inside interrupts
* FIXME: still true now?
*/
#define IPI_PRIORITY 4

6
arch/powerpc/kernel/exceptions-64s.S
View File

@ -267,7 +267,7 @@ vsx_unavailable_pSeries_1:
#ifdef CONFIG_CBE_RAS
STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
#endif /* CONFIG_CBE_RAS */
STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
@ -275,7 +275,7 @@ vsx_unavailable_pSeries_1:
#ifdef CONFIG_CBE_RAS
STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
#endif /* CONFIG_CBE_RAS */
STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
@ -283,7 +283,7 @@ vsx_unavailable_pSeries_1:
#ifdef CONFIG_CBE_RAS
STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
#endif /* CONFIG_CBE_RAS */
. = 0x3000

2
arch/powerpc/kernel/smp.c
View File

@ -187,7 +187,7 @@ int smp_request_message_ipi(int virq, int msg)
return 1;
}
#endif
err = request_irq(virq, smp_ipi_action[msg], IRQF_DISABLED|IRQF_PERCPU,
err = request_irq(virq, smp_ipi_action[msg], IRQF_PERCPU,
smp_ipi_name[msg], 0);
WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n",
virq, smp_ipi_name[msg], err);

2
arch/powerpc/kvm/book3s_hv_rmhandlers.S
View File

@ -1263,7 +1263,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206)
addi r6,r5,VCORE_NAPPING_THREADS
31: lwarx r4,0,r6
or r4,r4,r0
popcntw r7,r4
PPC_POPCNTW(r7,r4)
cmpw r7,r8
bge 2f
stwcx. r4,0,r6

30
arch/powerpc/mm/mem.c
View File

@ -34,6 +34,7 @@
#include <linux/suspend.h>
#include <linux/memblock.h>
#include <linux/hugetlb.h>
#include <linux/slab.h>
#include <asm/pgalloc.h>
#include <asm/prom.h>
@ -555,3 +556,32 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
book3e_hugetlb_preload(vma->vm_mm, address, *ptep);
#endif
}
/*
* System memory should not be in /proc/iomem but various tools expect it
* (eg kdump).
*/
static int add_system_ram_resources(void)
{
struct memblock_region *reg;
for_each_memblock(memory, reg) {
struct resource *res;
unsigned long base = reg->base;
unsigned long size = reg->size;
res = kzalloc(sizeof(struct resource), GFP_KERNEL);
WARN_ON(!res);
if (res) {
res->name = "System RAM";
res->start = base;
res->end = base + size - 1;
res->flags = IORESOURCE_MEM;
WARN_ON(request_resource(&iomem_resource, res) < 0);
}
}
return 0;
}
subsys_initcall(add_system_ram_resources);

24
arch/powerpc/mm/numa.c
View File

@ -315,7 +315,10 @@ static int __init find_min_common_depth(void)
struct device_node *root;
const char *vec5;
root = of_find_node_by_path("/rtas");
if (firmware_has_feature(FW_FEATURE_OPAL))
root = of_find_node_by_path("/ibm,opal");
else
root = of_find_node_by_path("/rtas");
if (!root)
root = of_find_node_by_path("/");
@ -344,12 +347,19 @@ static int __init find_min_common_depth(void)
#define VEC5_AFFINITY_BYTE 5
#define VEC5_AFFINITY 0x80
chosen = of_find_node_by_path("/chosen");
if (chosen) {
vec5 = of_get_property(chosen, "ibm,architecture-vec-5", NULL);
if (vec5 && (vec5[VEC5_AFFINITY_BYTE] & VEC5_AFFINITY)) {
dbg("Using form 1 affinity\n");
form1_affinity = 1;
if (firmware_has_feature(FW_FEATURE_OPAL))
form1_affinity = 1;
else {
chosen = of_find_node_by_path("/chosen");
if (chosen) {
vec5 = of_get_property(chosen,
"ibm,architecture-vec-5", NULL);
if (vec5 && (vec5[VEC5_AFFINITY_BYTE] &
VEC5_AFFINITY)) {
dbg("Using form 1 affinity\n");
form1_affinity = 1;
}
}
}

1
arch/powerpc/platforms/52xx/mpc5200_simple.c
View File

@ -50,6 +50,7 @@ static void __init mpc5200_simple_setup_arch(void)
/* list of the supported boards */
static const char *board[] __initdata = {
"anon,charon",
"intercontrol,digsy-mtc",
"manroland,mucmc52",
"manroland,uc101",

2
arch/powerpc/platforms/cell/beat.c
View File

@ -230,7 +230,7 @@ static int __init beat_register_event(void)
}
ev->virq = virq;
rc = request_irq(virq, ev->handler, IRQF_DISABLED,
rc = request_irq(virq, ev->handler, 0,
ev->typecode, NULL);
if (rc != 0) {
printk(KERN_ERR "Beat: failed to request virtual IRQ"

2
arch/powerpc/platforms/cell/celleb_scc_pciex.c
View File

@ -514,7 +514,7 @@ static __init int celleb_setup_pciex(struct device_node *node,
virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
oirq.size);
if (request_irq(virq, pciex_handle_internal_irq,
IRQF_DISABLED, "pciex", (void *)phb)) {
0, "pciex", (void *)phb)) {
pr_err("PCIEXC:Failed to request irq\n");
goto error;
}

3
arch/powerpc/platforms/cell/iommu.c
View File

@ -412,8 +412,7 @@ static void cell_iommu_enable_hardware(struct cbe_iommu *iommu)
IIC_IRQ_IOEX_ATI | (iommu->nid << IIC_IRQ_NODE_SHIFT));
BUG_ON(virq == NO_IRQ);
ret = request_irq(virq, ioc_interrupt, IRQF_DISABLED,
iommu->name, iommu);
ret = request_irq(virq, ioc_interrupt, 0, iommu->name, iommu);
BUG_ON(ret);
/* set the IOC segment table origin register (and turn on the iommu) */

2
arch/powerpc/platforms/cell/pmu.c
View File

@ -392,7 +392,7 @@ static int __init cbe_init_pm_irq(void)
}
rc = request_irq(irq, cbe_pm_irq,
IRQF_DISABLED, "cbe-pmu-0", NULL);
0, "cbe-pmu-0", NULL);
if (rc) {
printk("ERROR: Request for irq on node %d failed\n",
node);

9
arch/powerpc/platforms/cell/spu_base.c
View File

@ -442,8 +442,7 @@ static int spu_request_irqs(struct spu *spu)
snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
spu->number);
ret = request_irq(spu->irqs[0], spu_irq_class_0,
IRQF_DISABLED,
spu->irq_c0, spu);
0, spu->irq_c0, spu);
if (ret)
goto bail0;
}
@ -451,8 +450,7 @@ static int spu_request_irqs(struct spu *spu)
snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
spu->number);
ret = request_irq(spu->irqs[1], spu_irq_class_1,
IRQF_DISABLED,
spu->irq_c1, spu);
0, spu->irq_c1, spu);
if (ret)
goto bail1;
}
@ -460,8 +458,7 @@ static int spu_request_irqs(struct spu *spu)
snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
spu->number);
ret = request_irq(spu->irqs[2], spu_irq_class_2,
IRQF_DISABLED,
spu->irq_c2, spu);
0, spu->irq_c2, spu);
if (ret)
goto bail2;
}

1
arch/powerpc/platforms/powermac/pic.c
View File

@ -272,7 +272,6 @@ static struct irqaction xmon_action = {
static struct irqaction gatwick_cascade_action = {
.handler = gatwick_action,
.flags = IRQF_DISABLED,
.name = "cascade",
};

4
arch/powerpc/platforms/powermac/smp.c
View File

@ -200,7 +200,7 @@ static int psurge_secondary_ipi_init(void)
if (psurge_secondary_virq)
rc = request_irq(psurge_secondary_virq, psurge_ipi_intr,
IRQF_DISABLED|IRQF_PERCPU, "IPI", NULL);
IRQF_PERCPU, "IPI", NULL);
if (rc)
pr_err("Failed to setup secondary cpu IPI\n");
@ -408,7 +408,7 @@ static int __init smp_psurge_kick_cpu(int nr)
static struct irqaction psurge_irqaction = {
.handler = psurge_ipi_intr,
.flags = IRQF_DISABLED|IRQF_PERCPU,
.flags = IRQF_PERCPU,
.name = "primary IPI",
};

2
arch/powerpc/platforms/ps3/device-init.c
View File

@ -825,7 +825,7 @@ static int ps3_probe_thread(void *data)
spin_lock_init(&dev.lock);
res = request_irq(irq, ps3_notification_interrupt, IRQF_DISABLED,
res = request_irq(irq, ps3_notification_interrupt, 0,
"ps3_notification", &dev);
if (res) {
pr_err("%s:%u: request_irq failed %d\n", __func__, __LINE__,

32
arch/powerpc/platforms/ps3/repository.c
View File

@ -184,7 +184,7 @@ int ps3_repository_read_bus_type(unsigned int bus_index,
enum ps3_bus_type *bus_type)
{
int result;
u64 v1;
u64 v1 = 0;
result = read_node(PS3_LPAR_ID_PME,
make_first_field("bus", bus_index),
@ -199,7 +199,7 @@ int ps3_repository_read_bus_num_dev(unsigned int bus_index,
unsigned int *num_dev)
{
int result;
u64 v1;
u64 v1 = 0;
result = read_node(PS3_LPAR_ID_PME,
make_first_field("bus", bus_index),
@ -239,7 +239,7 @@ int ps3_repository_read_dev_type(unsigned int bus_index,
unsigned int dev_index, enum ps3_dev_type *dev_type)
{
int result;
u64 v1;
u64 v1 = 0;
result = read_node(PS3_LPAR_ID_PME,
make_first_field("bus", bus_index),
@ -256,8 +256,8 @@ int ps3_repository_read_dev_intr(unsigned int bus_index,
enum ps3_interrupt_type *intr_type, unsigned int *interrupt_id)
{
int result;
u64 v1;
u64 v2;
u64 v1 = 0;
u64 v2 = 0;
result = read_node(PS3_LPAR_ID_PME,
make_first_field("bus", bus_index),
@ -275,7 +275,7 @@ int ps3_repository_read_dev_reg_type(unsigned int bus_index,
enum ps3_reg_type *reg_type)
{
int result;
u64 v1;
u64 v1 = 0;
result = read_node(PS3_LPAR_ID_PME,
make_first_field("bus", bus_index),
@ -615,7 +615,7 @@ int ps3_repository_read_stor_dev_num_regions(unsigned int bus_index,
unsigned int dev_index, unsigned int *num_regions)
{
int result;
u64 v1;
u64 v1 = 0;
result = read_node(PS3_LPAR_ID_PME,
make_first_field("bus", bus_index),
@ -631,7 +631,7 @@ int ps3_repository_read_stor_dev_region_id(unsigned int bus_index,
unsigned int *region_id)
{
int result;
u64 v1;
u64 v1 = 0;
result = read_node(PS3_LPAR_ID_PME,
make_first_field("bus", bus_index),
@ -786,7 +786,7 @@ int ps3_repository_read_mm_info(u64 *rm_base, u64 *rm_size, u64 *region_total)
int ps3_repository_read_num_spu_reserved(unsigned int *num_spu_reserved)
{
int result;
u64 v1;
u64 v1 = 0;
result = read_node(PS3_LPAR_ID_CURRENT,
make_first_field("bi", 0),
@ -805,7 +805,7 @@ int ps3_repository_read_num_spu_reserved(unsigned int *num_spu_reserved)
int ps3_repository_read_num_spu_resource_id(unsigned int *num_resource_id)
{
int result;
u64 v1;
u64 v1 = 0;
result = read_node(PS3_LPAR_ID_CURRENT,
make_first_field("bi", 0),
@ -827,8 +827,8 @@ int ps3_repository_read_spu_resource_id(unsigned int res_index,
enum ps3_spu_resource_type *resource_type, unsigned int *resource_id)
{
int result;
u64 v1;
u64 v2;
u64 v1 = 0;
u64 v2 = 0;
result = read_node(PS3_LPAR_ID_CURRENT,
make_first_field("bi", 0),
@ -854,7 +854,7 @@ static int ps3_repository_read_boot_dat_address(u64 *address)
int ps3_repository_read_boot_dat_size(unsigned int *size)
{
int result;
u64 v1;
u64 v1 = 0;
result = read_node(PS3_LPAR_ID_CURRENT,
make_first_field("bi", 0),
@ -869,7 +869,7 @@ int ps3_repository_read_boot_dat_size(unsigned int *size)
int ps3_repository_read_vuart_av_port(unsigned int *port)
{
int result;
u64 v1;
u64 v1 = 0;
result = read_node(PS3_LPAR_ID_CURRENT,
make_first_field("bi", 0),
@ -884,7 +884,7 @@ int ps3_repository_read_vuart_av_port(unsigned int *port)
int ps3_repository_read_vuart_sysmgr_port(unsigned int *port)
{
int result;
u64 v1;
u64 v1 = 0;
result = read_node(PS3_LPAR_ID_CURRENT,
make_first_field("bi", 0),
@ -919,7 +919,7 @@ int ps3_repository_read_boot_dat_info(u64 *lpar_addr, unsigned int *size)
int ps3_repository_read_num_be(unsigned int *num_be)
{
int result;
u64 v1;
u64 v1 = 0;
result = read_node(PS3_LPAR_ID_PME,
make_first_field("ben", 0),

2
arch/powerpc/sysdev/mpic.c
View File

@ -800,8 +800,6 @@ static void mpic_end_ipi(struct irq_data *d)
* IPIs are marked IRQ_PER_CPU. This has the side effect of
* preventing the IRQ_PENDING/IRQ_INPROGRESS logic from
* applying to them. We EOI them late to avoid re-entering.
* We mark IPI's with IRQF_DISABLED as they must run with
* irqs disabled.
*/
mpic_eoi(mpic);
}

2
arch/powerpc/sysdev/ppc4xx_soc.c
View File

@ -115,7 +115,7 @@ static int __init ppc4xx_l2c_probe(void)
}
/* Install error handler */
if (request_irq(irq, l2c_error_handler, IRQF_DISABLED, "L2C", 0) < 0) {
if (request_irq(irq, l2c_error_handler, 0, "L2C", 0) < 0) {
printk(KERN_ERR "Cannot install L2C error handler"
", cache is not enabled\n");
of_node_put(np);

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