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ARM: dts: pxa*: Make the serial ports compatible with xscale-uart 

Some drivers that claim to support mrvl,mmp-uart default to a reg-shift
of two, some don't. Be explicit to be on a safe side.

With that in place, a XScale serial port driver is perfectly capable of
supporting the MMP serial port. Add a compatible string.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200320174107.29406-4-lkundrak@v3.sk
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Lubomir Rintel 2020-03-20 18:41:00 +01:00 committed by Greg Kroah-Hartman
parent 8524e2a939
commit d6a14ce6cd
2 changed files with 12 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
arch/arm/boot/dts/pxa168.dtsi
View File

@ -56,8 +56,9 @@
};
uart1: serial@d4017000 {
compatible = "mrvl,mmp-uart";
compatible = "mrvl,mmp-uart", "intel,xscale-uart";
reg = <0xd4017000 0x1000>;
reg-shift = <2>;
interrupts = <27>;
clocks = <&soc_clocks PXA168_CLK_UART0>;
resets = <&soc_clocks PXA168_CLK_UART0>;
@ -65,8 +66,9 @@
};
uart2: serial@d4018000 {
compatible = "mrvl,mmp-uart";
compatible = "mrvl,mmp-uart", "intel,xscale-uart";
reg = <0xd4018000 0x1000>;
reg-shift = <2>;
interrupts = <28>;
clocks = <&soc_clocks PXA168_CLK_UART1>;
resets = <&soc_clocks PXA168_CLK_UART1>;
@ -74,8 +76,9 @@
};
uart3: serial@d4026000 {
compatible = "mrvl,mmp-uart";
compatible = "mrvl,mmp-uart", "intel,xscale-uart";
reg = <0xd4026000 0x1000>;
reg-shift = <2>;
interrupts = <29>;
clocks = <&soc_clocks PXA168_CLK_UART2>;
resets = <&soc_clocks PXA168_CLK_UART2>;

9
arch/arm/boot/dts/pxa910.dtsi
View File

@ -68,8 +68,9 @@
};
uart1: serial@d4017000 {
compatible = "mrvl,mmp-uart";
compatible = "mrvl,mmp-uart", "intel,xscale-uart";
reg = <0xd4017000 0x1000>;
reg-shift = <2>;
interrupts = <27>;
clocks = <&soc_clocks PXA910_CLK_UART0>;
resets = <&soc_clocks PXA910_CLK_UART0>;
@ -77,8 +78,9 @@
};
uart2: serial@d4018000 {
compatible = "mrvl,mmp-uart";
compatible = "mrvl,mmp-uart", "intel,xscale-uart";
reg = <0xd4018000 0x1000>;
reg-shift = <2>;
interrupts = <28>;
clocks = <&soc_clocks PXA910_CLK_UART1>;
resets = <&soc_clocks PXA910_CLK_UART1>;
@ -86,8 +88,9 @@
};
uart3: serial@d4036000 {
compatible = "mrvl,mmp-uart";
compatible = "mrvl,mmp-uart", "intel,xscale-uart";
reg = <0xd4036000 0x1000>;
reg-shift = <2>;
interrupts = <59>;
clocks = <&soc_clocks PXA910_CLK_UART2>;
resets = <&soc_clocks PXA910_CLK_UART2>;