PCI: layerscape: Factor out SCFG related function
For the LS1021a PCIe controller, some status registers are located in SCFG, unlike other Layerscape devices. Move SCFG-related code to ls1021_pcie_host_init() and rename ls_pcie_link_up() to ls1021_pcie_link_up() because LTSSM status is also in SCFG. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -34,6 +34,10 @@
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/* Symbol Timer Register and Filter Mask Register 1 */
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#define PCIE_STRFMR1 0x71c
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struct ls_pcie_drvdata {
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struct pcie_host_ops *ops;
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};
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struct ls_pcie {
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struct list_head node;
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struct device *dev;
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@ -41,6 +45,7 @@ struct ls_pcie {
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void __iomem *dbi;
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struct regmap *scfg;
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struct pcie_port pp;
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const struct ls_pcie_drvdata *drvdata;
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int index;
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int msi_irq;
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};
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@ -57,11 +62,14 @@ static bool ls_pcie_is_bridge(struct ls_pcie *pcie)
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return header_type == PCI_HEADER_TYPE_BRIDGE;
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}
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static int ls_pcie_link_up(struct pcie_port *pp)
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static int ls1021_pcie_link_up(struct pcie_port *pp)
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{
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u32 state;
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struct ls_pcie *pcie = to_ls_pcie(pp);
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if (!pcie->scfg)
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return 0;
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regmap_read(pcie->scfg, SCFG_PEXMSCPORTSR(pcie->index), &state);
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state = (state >> LTSSM_STATE_SHIFT) & LTSSM_STATE_MASK;
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@ -71,10 +79,25 @@ static int ls_pcie_link_up(struct pcie_port *pp)
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return 1;
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}
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static void ls_pcie_host_init(struct pcie_port *pp)
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static void ls1021_pcie_host_init(struct pcie_port *pp)
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{
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struct ls_pcie *pcie = to_ls_pcie(pp);
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u32 val;
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u32 val, index[2];
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pcie->scfg = syscon_regmap_lookup_by_phandle(pp->dev->of_node,
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"fsl,pcie-scfg");
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if (IS_ERR(pcie->scfg)) {
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dev_err(pp->dev, "No syscfg phandle specified\n");
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pcie->scfg = NULL;
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return;
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}
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if (of_property_read_u32_array(pp->dev->of_node,
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"fsl,pcie-scfg", index, 2)) {
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pcie->scfg = NULL;
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return;
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}
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pcie->index = index[1];
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dw_pcie_setup_rc(pp);
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@ -87,11 +110,21 @@ static void ls_pcie_host_init(struct pcie_port *pp)
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iowrite32(val, pcie->dbi + PCIE_STRFMR1);
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}
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static struct pcie_host_ops ls_pcie_host_ops = {
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.link_up = ls_pcie_link_up,
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.host_init = ls_pcie_host_init,
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static struct pcie_host_ops ls1021_pcie_host_ops = {
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.link_up = ls1021_pcie_link_up,
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.host_init = ls1021_pcie_host_init,
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};
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static struct ls_pcie_drvdata ls1021_drvdata = {
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.ops = &ls1021_pcie_host_ops,
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};
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static const struct of_device_id ls_pcie_of_match[] = {
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{ .compatible = "fsl,ls1021a-pcie", .data = &ls1021_drvdata },
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{ },
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};
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MODULE_DEVICE_TABLE(of, ls_pcie_of_match);
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static int ls_add_pcie_port(struct ls_pcie *pcie)
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{
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struct pcie_port *pp;
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@ -101,7 +134,7 @@ static int ls_add_pcie_port(struct ls_pcie *pcie)
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pp->dev = pcie->dev;
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pp->dbi_base = pcie->dbi;
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pp->root_bus_nr = -1;
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pp->ops = &ls_pcie_host_ops;
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pp->ops = pcie->drvdata->ops;
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ret = dw_pcie_host_init(pp);
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if (ret) {
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@ -114,11 +147,15 @@ static int ls_add_pcie_port(struct ls_pcie *pcie)
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static int __init ls_pcie_probe(struct platform_device *pdev)
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{
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const struct of_device_id *match;
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struct ls_pcie *pcie;
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struct resource *dbi_base;
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u32 index[2];
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int ret;
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match = of_match_device(ls_pcie_of_match, &pdev->dev);
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if (!match)
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return -ENODEV;
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pcie = devm_kzalloc(&pdev->dev, sizeof(*pcie), GFP_KERNEL);
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if (!pcie)
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return -ENOMEM;
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@ -132,18 +169,7 @@ static int __init ls_pcie_probe(struct platform_device *pdev)
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return PTR_ERR(pcie->dbi);
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}
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pcie->scfg = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
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"fsl,pcie-scfg");
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if (IS_ERR(pcie->scfg)) {
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dev_err(&pdev->dev, "No syscfg phandle specified\n");
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return PTR_ERR(pcie->scfg);
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}
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ret = of_property_read_u32_array(pdev->dev.of_node,
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"fsl,pcie-scfg", index, 2);
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if (ret)
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return ret;
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pcie->index = index[1];
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pcie->drvdata = match->data;
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if (!ls_pcie_is_bridge(pcie))
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return -ENODEV;
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@ -157,12 +183,6 @@ static int __init ls_pcie_probe(struct platform_device *pdev)
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return 0;
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}
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static const struct of_device_id ls_pcie_of_match[] = {
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{ .compatible = "fsl,ls1021a-pcie" },
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{ },
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};
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MODULE_DEVICE_TABLE(of, ls_pcie_of_match);
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static struct platform_driver ls_pcie_driver = {
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.driver = {
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.name = "layerscape-pcie",
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