ARM: dts: Fix pinctrl mask for omap3
The wake-up interrupt bit is available on omap3/4/5 processors unlike what we claim. Without fixing it we cannot use it on omap3 and the system configured for wake-up events will just hang on wake-up. Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Benoît Cousson <bcousson@baylibre.com> Cc: devicetree@vger.kernel.org Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -108,7 +108,7 @@
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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#size-cells = <0>;
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pinctrl-single,register-width = <16>;
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pinctrl-single,register-width = <16>;
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pinctrl-single,function-mask = <0x7f1f>;
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pinctrl-single,function-mask = <0xff1f>;
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};
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};
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omap3_pmx_wkup: pinmux@0x48002a00 {
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omap3_pmx_wkup: pinmux@0x48002a00 {
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@ -117,7 +117,7 @@
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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#size-cells = <0>;
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pinctrl-single,register-width = <16>;
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pinctrl-single,register-width = <16>;
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pinctrl-single,function-mask = <0x7f1f>;
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pinctrl-single,function-mask = <0xff1f>;
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};
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};
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gpio1: gpio@48310000 {
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gpio1: gpio@48310000 {
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@ -28,7 +28,7 @@
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#define OMAP_PULL_UP (1 << 4)
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#define OMAP_PULL_UP (1 << 4)
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#define OMAP_ALTELECTRICALSEL (1 << 5)
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#define OMAP_ALTELECTRICALSEL (1 << 5)
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/* 34xx specific mux bit defines */
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/* omap3/4/5 specific mux bit defines */
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#define OMAP_INPUT_EN (1 << 8)
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#define OMAP_INPUT_EN (1 << 8)
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#define OMAP_OFF_EN (1 << 9)
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#define OMAP_OFF_EN (1 << 9)
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#define OMAP_OFFOUT_EN (1 << 10)
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#define OMAP_OFFOUT_EN (1 << 10)
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@ -36,8 +36,6 @@
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#define OMAP_OFF_PULL_EN (1 << 12)
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#define OMAP_OFF_PULL_EN (1 << 12)
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#define OMAP_OFF_PULL_UP (1 << 13)
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#define OMAP_OFF_PULL_UP (1 << 13)
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#define OMAP_WAKEUP_EN (1 << 14)
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#define OMAP_WAKEUP_EN (1 << 14)
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/* 44xx specific mux bit defines */
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#define OMAP_WAKEUP_EVENT (1 << 15)
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#define OMAP_WAKEUP_EVENT (1 << 15)
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/* Active pin states */
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/* Active pin states */
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@ -23,7 +23,7 @@
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#define PULL_UP (1 << 4)
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#define PULL_UP (1 << 4)
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#define ALTELECTRICALSEL (1 << 5)
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#define ALTELECTRICALSEL (1 << 5)
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/* 34xx specific mux bit defines */
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/* omap3/4/5 specific mux bit defines */
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#define INPUT_EN (1 << 8)
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#define INPUT_EN (1 << 8)
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#define OFF_EN (1 << 9)
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#define OFF_EN (1 << 9)
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#define OFFOUT_EN (1 << 10)
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#define OFFOUT_EN (1 << 10)
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@ -31,8 +31,6 @@
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#define OFF_PULL_EN (1 << 12)
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#define OFF_PULL_EN (1 << 12)
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#define OFF_PULL_UP (1 << 13)
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#define OFF_PULL_UP (1 << 13)
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#define WAKEUP_EN (1 << 14)
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#define WAKEUP_EN (1 << 14)
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/* 44xx specific mux bit defines */
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#define WAKEUP_EVENT (1 << 15)
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#define WAKEUP_EVENT (1 << 15)
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/* Active pin states */
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/* Active pin states */
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