bcm63xx_enet: do not write to random DMA channel on BCM6345
The DMA controller regs actually point to DMA channel 0, so the write to ENETDMA_CFG_REG will actually modify a random DMA channel. Since DMA controller registers do not exist on BCM6345, guard the write with the usual check for dma_has_sram. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1062,7 +1062,8 @@ static int bcm_enet_open(struct net_device *dev)
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val = enet_readl(priv, ENET_CTL_REG);
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val |= ENET_CTL_ENABLE_MASK;
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enet_writel(priv, val, ENET_CTL_REG);
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enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
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if (priv->dma_has_sram)
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enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
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enet_dmac_writel(priv, priv->dma_chan_en_mask,
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ENETDMAC_CHANCFG, priv->rx_chan);
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