Blackfin arch: use the [CS]SYNC() macros which include anomaly workarounds rather than __builtin_bfin_[cs]sync()

Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
This commit is contained in:
Mike Frysinger 2007-07-25 11:57:42 +08:00 committed by Bryan Wu
parent 60e9356d77
commit d5148ffa60
6 changed files with 15 additions and 15 deletions

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@ -68,7 +68,7 @@ static inline unsigned int ctr_read(void)
unsigned int tmp; unsigned int tmp;
tmp = bfin_read_PFCTL(); tmp = bfin_read_PFCTL();
__builtin_bfin_csync(); CSYNC();
return tmp; return tmp;
} }
@ -76,21 +76,21 @@ static inline unsigned int ctr_read(void)
static inline void ctr_write(unsigned int val) static inline void ctr_write(unsigned int val)
{ {
bfin_write_PFCTL(val); bfin_write_PFCTL(val);
__builtin_bfin_csync(); CSYNC();
} }
static inline void count_read(unsigned int *count) static inline void count_read(unsigned int *count)
{ {
count[0] = bfin_read_PFCNTR0(); count[0] = bfin_read_PFCNTR0();
count[1] = bfin_read_PFCNTR1(); count[1] = bfin_read_PFCNTR1();
__builtin_bfin_csync(); CSYNC();
} }
static inline void count_write(unsigned int *count) static inline void count_write(unsigned int *count)
{ {
bfin_write_PFCNTR0(count[0]); bfin_write_PFCNTR0(count[0]);
bfin_write_PFCNTR1(count[1]); bfin_write_PFCNTR1(count[1]);
__builtin_bfin_csync(); CSYNC();
} }
extern int pm_overflow_handler(int irq, struct pt_regs *regs); extern int pm_overflow_handler(int irq, struct pt_regs *regs);

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@ -173,12 +173,12 @@ void kgdb_put_debug_char(int chr)
uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT]; uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
while (!(UART_GET_LSR(uart) & THRE)) { while (!(UART_GET_LSR(uart) & THRE)) {
__builtin_bfin_ssync(); SSYNC();
} }
UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB)); UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
__builtin_bfin_ssync(); SSYNC();
UART_PUT_CHAR(uart, (unsigned char)chr); UART_PUT_CHAR(uart, (unsigned char)chr);
__builtin_bfin_ssync(); SSYNC();
} }
int kgdb_get_debug_char(void) int kgdb_get_debug_char(void)
@ -192,12 +192,12 @@ int kgdb_get_debug_char(void)
uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT]; uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
while(!(UART_GET_LSR(uart) & DR)) { while(!(UART_GET_LSR(uart) & DR)) {
__builtin_bfin_ssync(); SSYNC();
} }
UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB)); UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
__builtin_bfin_ssync(); SSYNC();
chr = UART_GET_CHAR(uart); chr = UART_GET_CHAR(uart);
__builtin_bfin_ssync(); SSYNC();
return chr; return chr;
} }
@ -1203,7 +1203,7 @@ static int __init bfin_serial_init(void)
IRQF_DISABLED, "BFIN_UART_RX", uart); IRQF_DISABLED, "BFIN_UART_RX", uart);
pr_info("Request irq for kgdb uart port\n"); pr_info("Request irq for kgdb uart port\n");
UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI); UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
__builtin_bfin_ssync(); SSYNC();
t.c_cflag = CS8|B57600; t.c_cflag = CS8|B57600;
t.c_iflag = 0; t.c_iflag = 0;
t.c_oflag = 0; t.c_oflag = 0;

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@ -65,7 +65,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
bfin_write32(SIC_IWR, IWR_ENABLE(0)); bfin_write32(SIC_IWR, IWR_ENABLE(0));
bfin_write16(VR_CTL, val); bfin_write16(VR_CTL, val);
__builtin_bfin_ssync(); SSYNC();
local_irq_save(flags); local_irq_save(flags);
asm("IDLE;"); asm("IDLE;");

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@ -57,7 +57,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
bfin_write32(SIC_IWR, IWR_ENABLE(0)); bfin_write32(SIC_IWR, IWR_ENABLE(0));
bfin_write16(VR_CTL, val); bfin_write16(VR_CTL, val);
__builtin_bfin_ssync(); SSYNC();
local_irq_save(flags); local_irq_save(flags);
asm("IDLE;"); asm("IDLE;");

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@ -60,7 +60,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
bfin_write32(SIC_IWR2, 0); bfin_write32(SIC_IWR2, 0);
bfin_write16(VR_CTL, val); bfin_write16(VR_CTL, val);
__builtin_bfin_ssync(); SSYNC();
local_irq_save(flags); local_irq_save(flags);
asm("IDLE;"); asm("IDLE;");

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@ -67,7 +67,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
bfin_write32(SICA_IWR1, 0); bfin_write32(SICA_IWR1, 0);
bfin_write16(VR_CTL, val); bfin_write16(VR_CTL, val);
__builtin_bfin_ssync(); SSYNC();
local_irq_save(flags); local_irq_save(flags);
asm("IDLE;"); asm("IDLE;");