Merge branch 'next-eeh' into next-sriov
Merge in Gavin EEH fixes
This commit is contained in:
commit
d4ed11aa48
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@ -328,6 +328,13 @@ int eeh_add_to_parent_pe(struct eeh_dev *edev)
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{
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struct eeh_pe *pe, *parent;
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/* Check if the PE number is valid */
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if (!eeh_has_flag(EEH_VALID_PE_ZERO) && !edev->pe_config_addr) {
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pr_err("%s: Invalid PE#0 for edev 0x%x on PHB#%d\n",
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__func__, edev->config_addr, edev->phb->global_number);
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return -EINVAL;
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}
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/*
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* Search the PE has been existing or not according
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* to the PE address. If that has been existing, the
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@ -336,12 +343,6 @@ int eeh_add_to_parent_pe(struct eeh_dev *edev)
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*/
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pe = eeh_pe_get(edev);
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if (pe && !(pe->type & EEH_PE_INVALID)) {
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if (!edev->pe_config_addr) {
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pr_err("%s: PE with addr 0x%x already exists\n",
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__func__, edev->config_addr);
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return -EEXIST;
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}
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/* Mark the PE as type of PCI bus */
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pe->type = EEH_PE_BUS;
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edev->pe = pe;
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@ -2462,7 +2462,8 @@ static void pnv_ioda_setup_pe_seg(struct pci_controller *hose,
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region.start += phb->ioda.io_segsize;
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index++;
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}
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} else if (res->flags & IORESOURCE_MEM) {
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} else if ((res->flags & IORESOURCE_MEM) &&
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!pnv_pci_is_mem_pref_64(res->flags)) {
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region.start = res->start -
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hose->mem_offset[0] -
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phb->ioda.m32_pci_base;
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