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arm64: tegra: Enable DFLL clock on Smaug 

Enable DFLL clock for Smaug board.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Joseph Lo 2019-01-04 11:07:01 +08:00 committed by Thierry Reding
parent f9c8bcc002
commit d4eb7653a8
1 changed files with 12 additions and 0 deletions
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12
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
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@ -1698,6 +1698,18 @@
status = "okay";
};
clock@70110000 {
status = "okay";
nvidia,cf = <6>;
nvidia,ci = <0>;
nvidia,cg = <2>;
nvidia,droop-ctrl = <0x00000f00>;
nvidia,force-mode = <1>;
nvidia,i2c-fs-rate = <400000>;
nvidia,sample-rate = <12500>;
vdd-cpu-supply = <&max77621_cpu>;
};
aconnect@702c0000 {
status = "okay";