bus: omap_l3_noc: fix masterid detection
As per Documentation (OMAP4+), then masterid is infact encoded as follows: "L3_TARG_STDERRLOG_MSTADDR[7:0] STDERRLOG_MSTADDR stores the NTTP master address. The master address is the concatenation of Prefix & Initiator ConnID. It is defined on 8 bits. The 6 MSBs are used to distinguish the different initiators." So, when we matchup currently with the master ID list, we never get a proper match other than when MPU is the master (thanks to 0). Now, on other platforms such as AM437x, this tends to be bits[5:0]. Fix this by using the relevant 6MSBits to identify the master ID for standard and custom errors. Reported-by: Darren Etheridge <detheridge@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Darren Etheridge <detheridge@ti.com> Tested-by: Sekhar Nori <nsekhar@ti.com>
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@ -127,7 +127,11 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
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L3_TARG_STDERRLOG_MSTADDR;
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L3_TARG_STDERRLOG_MSTADDR;
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std_err_main = readl_relaxed(l3_targ_stderr);
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std_err_main = readl_relaxed(l3_targ_stderr);
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masterid = readl_relaxed(l3_targ_mstaddr);
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/* STDERRLOG_MSTADDR Stores the NTTP master address. */
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masterid = (readl_relaxed(l3_targ_mstaddr) &
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l3->mst_addr_mask) >>
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__ffs(l3->mst_addr_mask);
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switch (std_err_main & CUSTOM_ERROR) {
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switch (std_err_main & CUSTOM_ERROR) {
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case STANDARD_ERROR:
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case STANDARD_ERROR:
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@ -84,6 +84,7 @@ struct l3_flagmux_data {
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* @l3_masters: array pointing to master data containing name and register
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* @l3_masters: array pointing to master data containing name and register
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* offset for the master.
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* offset for the master.
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* @num_master: number of masters
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* @num_master: number of masters
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* @mst_addr_mask: Mask representing MSTADDR information of NTTP packet
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* @debug_irq: irq number of the debug interrupt (populated runtime)
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* @debug_irq: irq number of the debug interrupt (populated runtime)
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* @app_irq: irq number of the application interrupt (populated runtime)
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* @app_irq: irq number of the application interrupt (populated runtime)
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*/
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*/
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@ -96,6 +97,7 @@ struct omap_l3 {
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struct l3_masters_data *l3_masters;
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struct l3_masters_data *l3_masters;
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int num_masters;
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int num_masters;
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u32 mst_addr_mask;
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int debug_irq;
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int debug_irq;
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int app_irq;
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int app_irq;
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@ -200,6 +202,8 @@ static const struct omap_l3 omap_l3_data = {
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.num_modules = ARRAY_SIZE(omap_l3_flagmux),
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.num_modules = ARRAY_SIZE(omap_l3_flagmux),
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.l3_masters = omap_l3_masters,
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.l3_masters = omap_l3_masters,
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.num_masters = ARRAY_SIZE(omap_l3_masters),
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.num_masters = ARRAY_SIZE(omap_l3_masters),
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/* The 6 MSBs of register field used to distinguish initiator */
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.mst_addr_mask = 0xFC,
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};
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};
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#endif /* __OMAP_L3_NOC_H */
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#endif /* __OMAP_L3_NOC_H */
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