PCI: rcar: Add gen2 device tree support
Add device tree probing support to the 'pci-rcar-gen2' driver. [Sergei: numerous fixes/cleanups/additions] [bhelgaas: whitespace fix] Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Arnd Bergmann <arnd@arndb.de>
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@ -0,0 +1,66 @@
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Renesas AHB to PCI bridge
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-------------------------
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This is the bridge used internally to connect the USB controllers to the
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AHB. There is one bridge instance per USB port connected to the internal
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OHCI and EHCI controllers.
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Required properties:
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- compatible: "renesas,pci-r8a7790" for the R8A7790 SoC;
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"renesas,pci-r8a7791" for the R8A7791 SoC.
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- reg: A list of physical regions to access the device: the first is
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the operational registers for the OHCI/EHCI controllers and the
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second is for the bridge configuration and control registers.
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- interrupts: interrupt for the device.
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- clocks: The reference to the device clock.
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- bus-range: The PCI bus number range; as this is a single bus, the range
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should be specified as the same value twice.
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- #address-cells: must be 3.
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- #size-cells: must be 2.
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- #interrupt-cells: must be 1.
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- interrupt-map: standard property used to define the mapping of the PCI
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interrupts to the GIC interrupts.
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- interrupt-map-mask: standard property that helps to define the interrupt
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mapping.
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Example SoC configuration:
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pci0: pci@ee090000 {
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compatible = "renesas,pci-r8a7790";
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clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
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reg = <0x0 0xee090000 0x0 0xc00>,
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<0x0 0xee080000 0x0 0x1100>;
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interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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bus-range = <0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0xff00 0 0 0x7>;
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interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
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0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
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0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
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pci@0,1 {
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reg = <0x800 0 0 0 0>;
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device_type = "pci";
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phys = <&usbphy 0 0>;
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phy-names = "usb";
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};
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pci@0,2 {
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reg = <0x1000 0 0 0 0>;
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device_type = "pci";
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phys = <&usbphy 0 0>;
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phy-names = "usb";
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};
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};
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Example board setup:
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&pci0 {
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status = "okay";
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pinctrl-0 = <&usb0_pins>;
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pinctrl-names = "default";
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};
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@ -99,6 +99,7 @@ struct rcar_pci_priv {
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struct resource io_res;
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struct resource mem_res;
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struct resource *cfg_res;
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unsigned busnr;
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int irq;
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unsigned long window_size;
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};
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@ -318,8 +319,8 @@ static int rcar_pci_setup(int nr, struct pci_sys_data *sys)
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pci_add_resource(&sys->resources, &priv->io_res);
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pci_add_resource(&sys->resources, &priv->mem_res);
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/* Setup bus number based on platform device id */
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sys->busnr = to_platform_device(priv->dev)->id;
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/* Setup bus number based on platform device id / of bus-range */
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sys->busnr = priv->busnr;
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return 1;
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}
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@ -372,6 +373,23 @@ static int rcar_pci_probe(struct platform_device *pdev)
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priv->window_size = SZ_1G;
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if (pdev->dev.of_node) {
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struct resource busnr;
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int ret;
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ret = of_pci_parse_bus_range(pdev->dev.of_node, &busnr);
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if (ret < 0) {
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dev_err(&pdev->dev, "failed to parse bus-range\n");
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return ret;
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}
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priv->busnr = busnr.start;
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if (busnr.end != busnr.start)
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dev_warn(&pdev->dev, "only one bus number supported\n");
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} else {
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priv->busnr = pdev->id;
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}
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hw_private[0] = priv;
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memset(&hw, 0, sizeof(hw));
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hw.nr_controllers = ARRAY_SIZE(hw_private);
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@ -383,11 +401,20 @@ static int rcar_pci_probe(struct platform_device *pdev)
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return 0;
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}
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static struct of_device_id rcar_pci_of_match[] = {
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{ .compatible = "renesas,pci-r8a7790", },
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{ .compatible = "renesas,pci-r8a7791", },
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{ },
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};
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MODULE_DEVICE_TABLE(of, rcar_pci_of_match);
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static struct platform_driver rcar_pci_driver = {
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.driver = {
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.name = "pci-rcar-gen2",
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.owner = THIS_MODULE,
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.suppress_bind_attrs = true,
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.of_match_table = rcar_pci_of_match,
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},
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.probe = rcar_pci_probe,
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};
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