powerpc/8xx: Drop CONFIG_8xx_COPYBACK option
CONFIG_8xx_COPYBACK was there to help disabling copyback cache mode for debuging hardware. But nobody will design new boards with 8xx now. All 8xx platforms select it, so make it the default and remove the option. Also remove the Mx_RESETVAL values which are pretty useless and hide the real value while reading code. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/bcc968cda075516eb76e2f25e09821f582c566b4.1589866984.git.christophe.leroy@csgroup.eu
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@ -10,7 +10,6 @@ CONFIG_EXPERT=y
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# CONFIG_BLK_DEV_BSG is not set
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CONFIG_PARTITION_ADVANCED=y
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CONFIG_PPC_ADDER875=y
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CONFIG_8xx_COPYBACK=y
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CONFIG_GEN_RTC=y
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CONFIG_HZ_1000=y
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# CONFIG_SECCOMP is not set
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@ -12,7 +12,6 @@ CONFIG_EXPERT=y
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# CONFIG_BLK_DEV_BSG is not set
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CONFIG_PARTITION_ADVANCED=y
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CONFIG_PPC_EP88XC=y
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CONFIG_8xx_COPYBACK=y
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CONFIG_GEN_RTC=y
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CONFIG_HZ_100=y
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# CONFIG_SECCOMP is not set
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@ -12,7 +12,6 @@ CONFIG_EXPERT=y
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# CONFIG_BLK_DEV_BSG is not set
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CONFIG_PARTITION_ADVANCED=y
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CONFIG_MPC86XADS=y
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CONFIG_8xx_COPYBACK=y
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CONFIG_GEN_RTC=y
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CONFIG_HZ_1000=y
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CONFIG_MATH_EMULATION=y
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@ -11,7 +11,6 @@ CONFIG_EXPERT=y
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# CONFIG_VM_EVENT_COUNTERS is not set
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# CONFIG_BLK_DEV_BSG is not set
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CONFIG_PARTITION_ADVANCED=y
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CONFIG_8xx_COPYBACK=y
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CONFIG_GEN_RTC=y
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CONFIG_HZ_100=y
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# CONFIG_SECCOMP is not set
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@ -15,7 +15,6 @@ CONFIG_MODULE_SRCVERSION_ALL=y
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# CONFIG_BLK_DEV_BSG is not set
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CONFIG_PARTITION_ADVANCED=y
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CONFIG_TQM8XX=y
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CONFIG_8xx_COPYBACK=y
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# CONFIG_8xx_CPU15 is not set
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CONFIG_GEN_RTC=y
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CONFIG_HZ_100=y
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@ -19,7 +19,6 @@
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#define MI_RSV4I 0x08000000 /* Reserve 4 TLB entries */
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#define MI_PPCS 0x02000000 /* Use MI_RPN prob/priv state */
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#define MI_IDXMASK 0x00001f00 /* TLB index to be loaded */
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#define MI_RESETVAL 0x00000000 /* Value of register at reset */
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/* These are the Ks and Kp from the PowerPC books. For proper operation,
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* Ks = 0, Kp = 1.
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@ -95,7 +94,6 @@
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#define MD_TWAM 0x04000000 /* Use 4K page hardware assist */
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#define MD_PPCS 0x02000000 /* Use MI_RPN prob/priv state */
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#define MD_IDXMASK 0x00001f00 /* TLB index to be loaded */
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#define MD_RESETVAL 0x04000000 /* Value of register at reset */
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#define SPRN_M_CASID 793 /* Address space ID (context) to match */
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#define MC_ASIDMASK 0x0000000f /* Bits used for ASID value */
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@ -779,10 +779,7 @@ start_here:
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initial_mmu:
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li r8, 0
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mtspr SPRN_MI_CTR, r8 /* remove PINNED ITLB entries */
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lis r10, MD_RESETVAL@h
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#ifndef CONFIG_8xx_COPYBACK
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oris r10, r10, MD_WTDEF@h
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#endif
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lis r10, MD_TWAM@h
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mtspr SPRN_MD_CTR, r10 /* remove PINNED DTLB entries */
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tlbia /* Invalidate all TLB entries */
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@ -857,17 +854,7 @@ initial_mmu:
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mtspr SPRN_DC_CST, r8
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lis r8, IDC_ENABLE@h
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mtspr SPRN_IC_CST, r8
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#ifdef CONFIG_8xx_COPYBACK
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mtspr SPRN_DC_CST, r8
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#else
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/* For a debug option, I left this here to easily enable
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* the write through cache mode
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*/
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lis r8, DC_SFWT@h
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mtspr SPRN_DC_CST, r8
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lis r8, IDC_ENABLE@h
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mtspr SPRN_DC_CST, r8
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#endif
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/* Disable debug mode entry on breakpoints */
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mfspr r8, SPRN_DER
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#ifdef CONFIG_PERF_EVENTS
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@ -98,15 +98,6 @@ menu "MPC8xx CPM Options"
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# 8xx specific questions.
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comment "Generic MPC8xx Options"
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config 8xx_COPYBACK
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bool "Copy-Back Data Cache (else Writethrough)"
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help
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Saying Y here will cause the cache on an MPC8xx processor to be used
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in Copy-Back mode. If you say N here, it is used in Writethrough
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mode.
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If in doubt, say Y here.
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config 8xx_GPIO
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bool "GPIO API Support"
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select GPIOLIB
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