platform/x86: ISST: Add Intel Speed Select mmio interface
Added MMIO interface to read/write specific offsets in PUNIT PCI device which export core priortization. This MMIO interface can be used using ioctl interface on /dev/isst_interface using IOCTL ISST_IF_IO_CMD. This MMIO interface is used by the intel-speed-select tool under tools/x86/power to enumerate and set core priority. The MMIO offsets and semantics of the message can be checked from the source code of the tool. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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@ -5,3 +5,4 @@
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#
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obj-$(CONFIG_INTEL_SPEED_SELECT_INTERFACE) += isst_if_common.o
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obj-$(CONFIG_INTEL_SPEED_SELECT_INTERFACE) += isst_if_mmio.o
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@ -206,6 +206,7 @@ static long isst_if_def_ioctl(struct file *file, unsigned int cmd,
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{
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void __user *argp = (void __user *)arg;
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struct isst_if_cmd_cb cmd_cb;
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struct isst_if_cmd_cb *cb;
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long ret = -ENOTTY;
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switch (cmd) {
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@ -218,6 +219,11 @@ static long isst_if_def_ioctl(struct file *file, unsigned int cmd,
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cmd_cb.cmd_callback = isst_if_proc_phyid_req;
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ret = isst_if_exec_multi_cmd(argp, &cmd_cb);
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break;
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case ISST_IF_IO_CMD:
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cb = &punit_callbacks[ISST_IF_DEV_MMIO];
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if (cb->registered)
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ret = isst_if_exec_multi_cmd(argp, cb);
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break;
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default:
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break;
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}
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@ -10,6 +10,8 @@
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#ifndef __ISST_IF_COMMON_H
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#define __ISST_IF_COMMON_H
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#define INTEL_RAPL_PRIO_DEVID_0 0x3451
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/*
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* Validate maximum commands in a single request.
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* This is enough to handle command to every core in one ioctl, or all
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@ -0,0 +1,131 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Intel Speed Select Interface: MMIO Interface
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* Copyright (c) 2019, Intel Corporation.
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* All rights reserved.
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*
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* Author: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/sched/signal.h>
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#include <linux/uaccess.h>
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#include <uapi/linux/isst_if.h>
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#include "isst_if_common.h"
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struct isst_if_device {
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void __iomem *punit_mmio;
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struct mutex mutex;
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};
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static long isst_if_mmio_rd_wr(u8 *cmd_ptr, int *write_only, int resume)
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{
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struct isst_if_device *punit_dev;
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struct isst_if_io_reg *io_reg;
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struct pci_dev *pdev;
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io_reg = (struct isst_if_io_reg *)cmd_ptr;
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if (io_reg->reg < 0x04 || io_reg->reg > 0xD0)
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return -EINVAL;
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if (io_reg->read_write && !capable(CAP_SYS_ADMIN))
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return -EPERM;
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pdev = isst_if_get_pci_dev(io_reg->logical_cpu, 0, 0, 1);
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if (!pdev)
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return -EINVAL;
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punit_dev = pci_get_drvdata(pdev);
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if (!punit_dev)
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return -EINVAL;
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/*
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* Ensure that operation is complete on a PCI device to avoid read
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* write race by using per PCI device mutex.
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*/
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mutex_lock(&punit_dev->mutex);
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if (io_reg->read_write) {
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writel(io_reg->value, punit_dev->punit_mmio+io_reg->reg);
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*write_only = 1;
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} else {
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io_reg->value = readl(punit_dev->punit_mmio+io_reg->reg);
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*write_only = 0;
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}
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mutex_unlock(&punit_dev->mutex);
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return 0;
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}
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static const struct pci_device_id isst_if_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, INTEL_RAPL_PRIO_DEVID_0)},
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{ 0 },
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};
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MODULE_DEVICE_TABLE(pci, isst_if_ids);
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static int isst_if_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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struct isst_if_device *punit_dev;
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struct isst_if_cmd_cb cb;
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u32 mmio_base, pcu_base;
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u64 base_addr;
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int ret;
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punit_dev = devm_kzalloc(&pdev->dev, sizeof(*punit_dev), GFP_KERNEL);
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if (!punit_dev)
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return -ENOMEM;
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ret = pcim_enable_device(pdev);
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if (ret)
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return ret;
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ret = pci_read_config_dword(pdev, 0xD0, &mmio_base);
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if (ret)
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return ret;
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ret = pci_read_config_dword(pdev, 0xFC, &pcu_base);
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if (ret)
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return ret;
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pcu_base &= GENMASK(10, 0);
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base_addr = (u64)mmio_base << 23 | (u64) pcu_base << 12;
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punit_dev->punit_mmio = devm_ioremap(&pdev->dev, base_addr, 256);
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if (!punit_dev->punit_mmio)
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return -ENOMEM;
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mutex_init(&punit_dev->mutex);
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pci_set_drvdata(pdev, punit_dev);
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memset(&cb, 0, sizeof(cb));
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cb.cmd_size = sizeof(struct isst_if_io_reg);
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cb.offset = offsetof(struct isst_if_io_regs, io_reg);
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cb.cmd_callback = isst_if_mmio_rd_wr;
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cb.owner = THIS_MODULE;
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ret = isst_if_cdev_register(ISST_IF_DEV_MMIO, &cb);
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if (ret)
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mutex_destroy(&punit_dev->mutex);
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return ret;
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}
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static void isst_if_remove(struct pci_dev *pdev)
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{
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struct isst_if_device *punit_dev;
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punit_dev = pci_get_drvdata(pdev);
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isst_if_cdev_unregister(ISST_IF_DEV_MBOX);
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mutex_destroy(&punit_dev->mutex);
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}
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static struct pci_driver isst_if_pci_driver = {
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.name = "isst_if_pci",
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.id_table = isst_if_ids,
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.probe = isst_if_probe,
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.remove = isst_if_remove,
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};
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module_pci_driver(isst_if_pci_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Intel speed select interface mmio driver");
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@ -63,7 +63,40 @@ struct isst_if_cpu_maps {
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struct isst_if_cpu_map cpu_map[1];
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};
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/**
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* struct isst_if_io_reg - Read write PUNIT IO register
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* @read_write: Value 0: Read, 1: Write
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* @logical_cpu: Logical CPU number to get target PCI device.
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* @reg: PUNIT register offset
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* @value: For write operation value to write and for
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* for read placeholder read value
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*
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* Structure to specify read/write data to PUNIT registers.
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*/
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struct isst_if_io_reg {
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__u32 read_write; /* Read:0, Write:1 */
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__u32 logical_cpu;
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__u32 reg;
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__u32 value;
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};
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/**
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* struct isst_if_io_regs - structure for IO register commands
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* @cmd_count: Number of io reg commands in io_reg[]
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* @io_reg[]: Holds one or more io_reg command structure
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*
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* This structure used with ioctl ISST_IF_IO_CMD to send
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* one or more read/write commands to PUNIT. Here IOCTL return value
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* indicates number of requests sent or error number if no requests have
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* been sent.
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*/
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struct isst_if_io_regs {
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__u32 req_count;
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struct isst_if_io_reg io_reg[1];
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};
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#define ISST_IF_MAGIC 0xFE
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#define ISST_IF_GET_PLATFORM_INFO _IOR(ISST_IF_MAGIC, 0, struct isst_if_platform_info *)
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#define ISST_IF_GET_PHY_ID _IOWR(ISST_IF_MAGIC, 1, struct isst_if_cpu_map *)
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#define ISST_IF_IO_CMD _IOW(ISST_IF_MAGIC, 2, struct isst_if_io_regs *)
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#endif
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